Address Filter

PHY_CFG_ADDRESS_FILTER

This section describes, how to configure the node's address and PAN ID. This enables the address filter in both, Basic and Extended, Operating Modes. The address filter parses the addressing field of the MHR of an incoming frame. If the addressing field matches the configured node's addresses and PAN ID according to the filter rules described in section 7.2.3.5 of the datasheet, an TRX_IRQ_AMI interrupt is generated, if this interrupt is enabled.

Parameters:

	panid	The 16 bit PAN ID of the network the node belongs to.
	short_addr	The node's 16 bit short address.
	ext_addr	The node's 64 bit IEEE address, which is also refered to as "extended address".

The splitting of the parameters into register values is described in section Handling of Multibyte Variables.

Code example

    /* AT86RF231::[CONFIG] */
    trx_reg_write(RG_PAN_ID_0, panid_7_0);
    trx_reg_write(RG_PAN_ID_1, panid_15_8);
    trx_reg_write(RG_SHORT_ADDR_0, short_addr_7_0);
    trx_reg_write(RG_SHORT_ADDR_1, short_addr_15_8);
    trx_reg_write(RG_IEEE_ADDR_0, ext_addr_7_0);
    trx_reg_write(RG_IEEE_ADDR_1, ext_addr_15_8);
    trx_reg_write(RG_IEEE_ADDR_2, ext_addr_23_16);
    trx_reg_write(RG_IEEE_ADDR_3, ext_addr_31_24);
    trx_reg_write(RG_IEEE_ADDR_4, ext_addr_39_32);
    trx_reg_write(RG_IEEE_ADDR_5, ext_addr_47_40);
    trx_reg_write(RG_IEEE_ADDR_6, ext_addr_55_48);
    trx_reg_write(RG_IEEE_ADDR_7, ext_addr_63_56);

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