| clkrate | This parameter represents the frequency value of the CLKM signal, which is generated at pin TRX_PIN_CLKM (see table below).
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/* AT86RF231::[ACTIVE] */ trx_bit_write(SR_CLKM_SHA_SEL, 0); trx_bit_write(SR_CLKM_CTRL, clkrate);
prep_clkchange() function is MCU dependent and is responsible to bring the MCU to a state, where a clock change is allowed. After asserting TRX_PIN_SLP_TR = HIGH the CLKM signal delivers 35 (refer to tTR3) cycles before it is turned off (CLKM = LOW, see also PHY_STATE_TRX_OFF__SLEEP).
/* AT86RF231::TRX_OFF */ trx_bit_write(SR_CLKM_SHA_SEL, 1); trx_bit_write(SR_CLKM_CTRL, clkrate); trx_pinset_slptr(1); /* AT86RF231::SLEEP */ prep_clkchange(); trx_pinset_slptr(0); delay(tTR2); /* AT86RF231::TRX_OFF */
1.5.2