Frame Receive Procedure (RX_AACK)

This section describes how the parameters for the Extended Operating Mode are configured and how frames are received in the RX_AACK mode.

In the RX_AACK operating mode, described in section 7.2.3 (RX_AACK_ON Receive with Automatic ACK) of the AT86RF231 datasheet, incoming frames pass the address filter and are checked for a valid FCS. If the received frame passes these checks, the TRX_IRQ_TRX_END interrupt is generated at the end of the received frame and an optional required acknowledgement frame is transmitted.

This section describes how the parameters for the Extended Operating Mode are configured and how frames are received in the RX_AACK mode.

Parameters:
coord  This bit specifies, whether the radio transceiver is operated as PAN coordinator {1} or as device {0}.
slmode  This bit specifies, whether the radio transceiver is operated in slotted {1} or unslotted {0} operation mode, as described in PHY_DATA_INDICATION_RX_AACK_SLOTTED.
pending_data This bit specifies, whether the device has pending data. During generation of an acknowledgment, the radio transceiver will copy this bit into the frame pending subfield of the frame control field in response to a data request MAC command.
Return values:
tracstat Result of a RX_AACK transaction from sub register SR_TRAC_STATUS :
  • TRAC_SUCCESS : The frame reception was successful.
  • TRAC_SUCCESS_WAIT_FOR_ACK : This value occurs if the parameter slmode is set to 1 and the received frame requests an acknowledgement. In this case the sending of the acknowledgement frame needs to be initiated from the microcontroller by pulling TRX_PIN_SLP_TR.
  • TRAC_INVALID : The ongoing transaction was aborted.
Note:
The Extended Operating Mode of the radio transceiver is designed to handle the requirements given by the IEEE 802.15.4 standard. However, to a certain extend it is possible to use the RX_AACK mode for proprietary and non-standard compliant operations. This is described in Examples for non-IEEE-802.15.4-compliant RX_AACK Configurations. The necessary configuration bits are described in Extended Configuration of RX_AACK mode.
Use Cases:


PHY_CONFIG_RX_AACK

The following sequence should be used to configure the RX_AACK mode.

inline_mscgraph_76
Code example
    /* AT86RF231::[CONFIG] */
    trx_bit_write(SR_AACK_I_AM_COORD, coord);
    trx_bit_write(SR_SLOTTED_OPERATION, slmode);

PHY_SET_PD

The following sequence is used to set the pending data bit SR_AACK_SET_PD in an automatically generated acknowledgement frame. After the reception of a data request MAC command frame requesting an ACK, the content of the sub register SR_AACK_SET_PD is copied into the frame pending subfield bit of the generated acknowledgement frame. However, after the reception of a data frame or other MAC command frames, the radio will set the frame pending subfield to 0 (compare IEEE 802.15.4-2006, section 7.2.2.3.1).

Note:
In order to set the pending data bit when the radio transceiver is in state BUSY_RX_AACK, the sequence PHY_SET_PD_BUSY is used.
inline_mscgraph_77
Code example
    /* AT86RF231::[ACTIVE] */
    trx_bit_write(SR_AACK_SET_PD, pending_data);

PHY_SET_PD_BUSY

The following sequence is used to set the pending data bit SR_AACK_SET_PD during BUSY_RX_AACK. After TRX_IRQ_AMI the frame can be uploaded using the Frame Buffer Empty Indicator sequence. Once the TRX_IRQ_TRX_END occured and the frame upload finished, the frame can be evaluated. Thus, SR_AACK_SET_PD can be set as desired within tTxAck in order to take effect with the automatically generated acknowledgement frame.

inline_mscgraph_78
Code example
    /* AT86RF231::BUSY_RX_AACK */
    /* TRX_IRQ_AMI occurs here */
    frm = trx_frame_read_blm();
    /* TRX_IRQ_TRX_END occurs here */
    proc_frm(frm);
    trx_bit_write(SR_AACK_SET_PD, pending_data);

PHY_DATA_INDICATION_RX_AACK_UNSLOTTED

The result of a RX_AACK transaction is stored in the sub register SR_TRAC_STATUS after the TRX_IRQ_TRX_END interrupt. For unslotted mode, the following return values are valid:

The transmission of the ACK frame starts tWaitAck after the end of the frame reception. The complete ACK frame is on air after tAckDone.

The internal timing for the ACK frame processing in RX_AACK mode is shown below:

  == RX ==:======================= TX =========================:======= RX =======
         0         12                                          34  time  [symbols]
     +---|         |---+---+---+---+---+---+---+---+---+---+---|
   --| F |---------|   Preamble    |SFD|PHR|   ACK frame       |------------------>
     +---|         |---+---+---+---+---+---+---+---+---+---+---|
         |         |                                           |
         t0        t1                                          t2

 

Note:
inline_mscgraph_79
Code example
    /* AT86RF231::RX_AACK_ON && AT86RF231::BUSY_RX_AACK */
    delay(tFrame);
    tracstat = trx_bit_read(SR_TRAC_STATUS);
    frm = trx_frame_read();
    /* AT86RF231::RX_AACK_ON */

PHY_DATA_INDICATION_RX_AACK_SLOTTED

Section 7.5.6.4.2. of IEEE 802.15.4-2006 standard states that "The transmission of an acknowledgment frame in the CAP shall commence either aTurnaroundTime symbols after the reception of the last symbol of the data or MAC command frame or at a backoff slot boundary." AT86RF231 supports both ACK transmission modes. In order to activate the ACK transmission on slot boundaries the SR_SLOTTED_OPERATION bit needs to be set. If an ACK frame has to be transmitted, the radio transceiver expects a rising edge on TRX_PIN_SLP_TR to actually start the transmission.

The result of a RX_AACK transaction is stored in the sub register SR_TRAC_STATUS after the TRX_IRQ_TRX_END interrupt.

The internal timing for the ACK frame processing in RX_AACK mode is shown below:

  == RX ==:== IDLE ==:=================== TX ====================:======== RX =======
         0         tack                                        22+tack  time [symbols]
     +---|           |---+---+---+---+---+---+---+---+---+---+---|
   --| F |----|------|  Preamble     |SFD|PHR|   ACK frame       |------------------>
     +---|           |---+---+---+---+---+---+---+---+---+---+---|
         |    |      |                                           |
        t0a  t1a    t2a                                         t3a

 

Note:
Usually, the frame upload is started after time t1a. If tSlWait is larger than the upload duration, the frame upload can alternatively be done between t0a and t1a.
inline_mscgraph_80
Code example
    /* AT86RF231::RX_AACK_ON && AT86RF231::BUSY_RX_AACK */
    delay(tFrame);
    tracstat = trx_bit_read(SR_TRAC_STATUS);
    ASSERT(tracstat==SUCCESS_WAIT_FOR_ACK);
    trx_pinset_slptr(1);
    trx_pinset_slptr(0);
    frm = trx_frame_read();
    /* AT86RF231::RX_AACK_ON */

Generated on Mon Jan 12 18:32:18 2009 for SWPM AT86RF231 by  doxygen 1.5.2