Microcontroller Interface

The interface between the microcontroller and the radio transceiver consists of a SPI interface (/SEL, MOSI, MISO, SCLK), the clock output pin (CLKM), the interrupt pins (IRQ/DIG2) and control pins (/RST, SLP_TR).

Microcontroller to AT86RF231 Interface

Serial Peripheral Interface (SPI)

SPI Interface (MISO, MOSI, /SEL, SCLK)

SPI stands for Serial Peripheral Interface and is a synchronous bidirectional serial data bus, refer to section 6.2 of the datasheet. The microcontroller has to be configured as SPI master in order to control the radio transceiver with the following primitives:

• Register read and write access
• Frame buffer read and write access
• SRAM read and write access
• AES module access

GPIO

Clock Pin TRX_PIN_CLKM (CLKM)

The TRX_PIN_CLKM pin can provide a clock signal, which is derived from the radio transceiver clock. This signal can be used as clock source for a timer or as main clock for the microcontroller.

Interrupt Pin TRX_PIN_IRQ (IRQ)

The IRQ pin (TRX_PIN_IRQ) is an output pin of the radio transceiver and can be used as an interrupt source for the microcontroller. Per default it changes from LOW to HIGH, if an asynchronous radio transceiver event occurs and it stays at HIGH level, until the interrupt cause is determined by reading the register RG_IRQ_STATUS. The polarity of the interrupt pin can be configured as described in IRQ Polarity Configuration.

Control Pin TRX_PIN_SLP_TR (SLP_TR)

The function of the control pin SLP_TR is state dependent and has to be configured as an output pin of the microcontroller (see function trx_pinset_slptr()). The following effects occur when switching SLP_TR:

Transceiver Status	Transition	Description	Pin behavior
PLL_ON	L->H	Start frame transmission	TRX_PIN_SLP_TR is only sensitive on the rising edge
TX_ARET_ON	L->H	Start TX_ARET transaction	TRX_PIN_SLP_TR is only sensitive on the rising edge
TRX_OFF	L->H	Set the radio transceiver into SLEEP state, TRX_PIN_CLKM disabled	only as long as the pin is logical high
RX_ON	L->H	Set the radio transceiver into RX_ON_NOCLK state and disables CLKM	only as long as the pin is logical high
RX_AACK_ON	L->H	Set the radio transceiver into RX_AACK_ON_NOCLK state and disables CLKM	only as long as the pin is logical high
SLEEP	H->L	Takes the radio transceiver back into TRX_OFF state, level sensitive	TRX_PIN_SLP_TR is only sensitive on the falling edge
RX_ON_NOCLK	H->L	Set the radio transceiver into RX_ON state and enables CLKM	fall back into RX_ON with falling edge
RX_AACK_ON_NOCLK	H->L	Set the radio transceiver into RX_AACK_ON state and enables CLKM	fall back into RX_AACK_ON with falling edge

Control Pin TRX_PIN_RST (/RST)

The low active control pin TRX_PIN_RST is used to reset the radio transceiver and has to be configured as an output pin of the microcontroller (see trx_pinset_reset).

• If TRX_PIN_RST = LOW, the radio transceiver is hold in reset.
• If TRX_PIN_RST = HIGH, the radio transceiver is released from reset.

During normal operation, this pin is set to HIGH.

Pin DIG2

The TRX_PIN_DIG2 pin has different functionalities depending on register settings:

SR_ANT_EXT_SW_EN	SR_IRQ_2_EXT_EN	Function
0	0	The pull-down resistor of pin DIG2 is enabled.
0	1	Signal IRQ_2 (RX_START) for RX Frame Time Stamping is enabled.
1	0	Antenna Diversity RF switch control is active.
1	1	The RX Frame Time Stamping is enabled.

Note:

SR_ANT_EXT_SW_EN and SR_IRQ_2_EXT_EN shall never be set to 1 concurrently.

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