00001
00038 #ifndef CHIP_SYSCLK_H_INCLUDED
00039 #define CHIP_SYSCLK_H_INCLUDED
00040
00041 #include <chip/regs.h>
00042
00048
00049
00050 #define SYSCLK_ADC 0x0001 //!< A/D Converter
00051 #define SYSCLK_SPI 0x0004 //!< SPI controller
00052 #define SYSCLK_TC1 0x0008 //!< Timer/Counter 1
00053 #define SYSCLK_TC0 0x0020 //!< Timer/Counter 0
00054 #define SYSCLK_TC2 0x0040 //!< Timer/Counter 2
00055 #define SYSCLK_TWI 0x0080 //!< TWI controller
00056 #define SYSCLK_USART1 0x0101 //!< USART 1
00057
00058 #define SYSCLK_USART0 SYSCLK_USART1
00059 #define SYSCLK_TC3 0x0108 //!< Timer/counter 3
00060 #define SYSCLK_USB 0x0180 //!< USB controller
00061
00062
00063 #ifndef __ASSEMBLY__
00064
00065 #include <assert.h>
00066 #include <interrupt.h>
00067 #include <stdint.h>
00068
00070
00071
00077 static inline void sysclk_enable_module(uint16_t id)
00078 {
00079 irqflags_t iflags;
00080 uint8_t reg_offset;
00081 uint8_t mask;
00082
00083 assert(id <= SYSCLK_USB);
00084
00085 reg_offset = id >> 8;
00086
00087 iflags = cpu_irq_save();
00088 mask = avr_read_reg8(PRR0 + reg_offset);
00089 mask &= ~(id & 0xff);
00090 avr_write_reg8(PRR0 + reg_offset, mask);
00091 cpu_irq_restore(iflags);
00092 }
00093
00099 static inline void sysclk_disable_module(uint16_t id)
00100 {
00101 irqflags_t iflags;
00102 uint8_t reg_offset;
00103 uint8_t mask;
00104
00105 assert(id <= SYSCLK_USB);
00106
00107 reg_offset = id >> 8;
00108
00109 iflags = cpu_irq_save();
00110 mask = avr_read_reg8(PRR0 + reg_offset);
00111 mask |= (id & 0xff);
00112 avr_write_reg8(PRR0 + reg_offset, mask);
00113 cpu_irq_restore(iflags);
00114 }
00115
00117
00118 static inline void sysclk_init(void)
00119 {
00120 avr_write_reg8(PRR0, 0xed);
00121 avr_write_reg8(PRR1, 0x89);
00122 }
00123
00124 #endif
00125
00127
00128 #endif