00001
00039 #ifndef CHIP_IRQ_MAP_H_INCLUDED
00040 #define CHIP_IRQ_MAP_H_INCLUDED
00041
00042 #define INT0_IRQ 2
00043 #define INT1_IRQ 3
00044 #define INT2_IRQ 4
00045 #define INT3_IRQ 5
00046 #define INT4_IRQ 6
00047 #define INT5_IRQ 7
00048 #define INT6_IRQ 8
00049 #define INT7_IRQ 9
00050 #define PCINT0_IRQ 10
00051 #define USB_GEN_IRQ 11
00052 #define USB_EP_IRQ 12
00053 #define WDT_IRQ 13
00054 #define TIMER2_COMPA_IRQ 14
00055 #define TIMER2_COMPB_IRQ 15
00056 #define TIMER2_OVF_IRQ 16
00057 #define TIMER1_CAPT_IRQ 17
00058 #define TIMER1_COMPA_IRQ 18
00059 #define TIMER1_COMPB_IRQ 19
00060 #define TIMER1_COMPC_IRQ 20
00061 #define TIMER1_OVF_IRQ 21
00062 #define TIMER0_COMPA_IRQ 22
00063 #define TIMER0_COMPB_IRQ 23
00064 #define TIMER0_OVF_IRQ 24
00065 #define SPI_STC_IRQ 25
00066 #define USART1_RX_IRQ 26
00067 #define USART1_UDRE_IRQ 27
00068 #define USART1_TX_IRQ 28
00070 #define USART0_RX_IRQ USART1_RX_IRQ
00071
00072 #define USART0_UDRE_IRQ USART1_UDRE_IRQ
00073
00074 #define USART0_TX_IRQ USART1_TX_IRQ
00075 #define ANALOG_COMP_IRQ 29
00076 #define ADC_IRQ 30
00077 #define EE_READY_IRQ 31
00078 #define TIMER3_CAPT_IRQ 32
00079 #define TIMER3_COMPA_IRQ 33
00080 #define TIMER3_COMPB_IRQ 34
00081 #define TIMER3_COMPC_IRQ 35
00082 #define TIMER3_OVF_IRQ 36
00083 #define TWI_IRQ 37
00084 #define SPM_READY_IRQ 38
00086 #endif