Register definitions for the AT90USB1287. More...
#include <arch/io.h>Go to the source code of this file.
Defines | |
| #define | AVR_BF_SPCR_MODE_OFFSET 2 |
| Mode covering CPHA and CPOL. | |
| #define | AVR_REG_MCUSR 0x54 |
| MCU reset cause register. | |
| #define | AVR_BF_MCUSR_PORF_OFFSET 0 |
| Power-on reset flag. | |
| #define | AVR_BF_MCUSR_EXTRF_OFFSET 1 |
| External reset flag. | |
| #define | AVR_BF_MCUSR_BORF_OFFSET 2 |
| Brown-out reset flag. | |
| #define | AVR_BF_MCUSR_WDRF_OFFSET 3 |
| Watchdog reset flag. | |
| #define | AVR_BF_MCUSR_JTRF_OFFSET 4 |
| JTAG reset flag. | |
| #define | AVR_REG_MCUCR 0x55 |
| MCU control register. | |
| #define | AVR_BF_MCUCR_IVCE_OFFSET 0 |
| Interrupt vector change enable. | |
| #define | AVR_BF_MCUCR_IVSL_OFFSET 1 |
| Interrupt vector select. | |
| #define | AVR_BF_MCUCR_PUD_OFFSET 4 |
| Pull-up disable on all I/O pins. | |
| #define | AVR_BF_MCUCR_JTD_OFFSET 7 |
| JTAG interface disable. | |
Register definitions for the AT90USB1287.
Copyright (C) 2009 Atmel Corporation. All rights reserved.
Definition in file regs.h.
| #define AVR_BF_MCUCR_IVCE_OFFSET 0 |
| #define AVR_BF_MCUCR_PUD_OFFSET 4 |
| #define AVR_BF_SPCR_MODE_OFFSET 2 |
1.6.3