include/regs/xmega_clk.h File Reference

Xmega Clock register definitions. More...

#include <chip/memory-map.h>
#include <io.h>

Go to the source code of this file.

Defines
Register Offsets
#define	XMEGA_CLK_CTRL   0x00
	System Clock Control.
#define	XMEGA_CLK_PSCTRL   0x01
	System Clock Prescaler.
#define	XMEGA_CLK_LOCK   0x02
	Clock System Lock.
#define	XMEGA_CLK_RTCCTRL   0x03
	RTC Control.
Bitfields in CTRL
#define	XMEGA_CLK_SCLKSEL_START   0
#define	XMEGA_CLK_SCLKSEL_SIZE   3
Bitfields in PSCTRL
#define	XMEGA_CLK_PSBCDIV_START   0
	Prescaler B/C Division Factor.
#define	XMEGA_CLK_PSBCDIV_SIZE   2
	Prescaler B/C Division Factor.
#define	XMEGA_CLK_PSADIV_START   0
	Prescaler A Division Factor.
#define	XMEGA_CLK_PSADIV_SIZE   0
	Prescaler A Division Factor.
Bitfields in LOCK
#define	XMEGA_CLK_LOCK_BIT   0
	Clock System Lock.
#define	XMEGA_CLK_RTCEN_BIT   0
	RTC Clock Source Enable.
#define	XMEGA_CLK_RTCSRC_START   1
	RTC Clock Source.
#define	XMEGA_CLK_RTCSRC_SIZE   3
	RTC Clock Source.
Prescaler A Division Factor
#define	XMEGA_CLK_PSADIV_1   0
	No division.
#define	XMEGA_CLK_PSADIV_2   1
	Divide by 2.
#define	XMEGA_CLK_PSADIV_4   3
	Divide by 2.
#define	XMEGA_CLK_PSADIV_8   5
	Divide by 2.
#define	XMEGA_CLK_PSADIV_16   7
	Divide by 2.
#define	XMEGA_CLK_PSADIV_32   9
	Divide by 2.
#define	XMEGA_CLK_PSADIV_64   11
	Divide by 2.
#define	XMEGA_CLK_PSADIV_128   13
	Divide by 2.
#define	XMEGA_CLK_PSADIV_256   15
	Divide by 2.
#define	XMEGA_CLK_PSADIV_512   17
	Divide by 2.
Prescaler B/C Division Factor
#define	XMEGA_CLK_PSBCDIV_1_1   0
	No division / No division.
#define	XMEGA_CLK_PSBCDIV_1_2   1
	No division / Divide by 2.
#define	XMEGA_CLK_PSBCDIV_4_1   2
	Divide by 4 / No division.
#define	XMEGA_CLK_PSBCDIV_2_2   3
	Divide by 2 / Divide by 2.
Bit manipulation macros
#define	CLK_BIT(name)   (1U << XMEGA_CLK_##name##_BIT)
	Create a mask with bit name set.
#define	CLK_BF(name, value)   ((value) << XMEGA_CLK_##name##_START)
	Create a mask with bitfield name set to value.
#define	CLK_BFMASK(name)
	Create a mask of the bitfield name.
#define	CLK_BFEXT(name, regval)
	Extract the value of bitfield name from regval.
#define	CLK_BFINS(name, value, regval)
	Return regval with bitfield name set to value.
Register access macros
#define	clk_read_reg(reg)   _clk_read_reg(reg)
	Read the value of CLK register reg.
#define	_clk_read_reg(reg)   mmio_read8((void *)(CLK_BASE + XMEGA_CLK_##reg))
#define	clk_write_reg(reg, value)   _clk_write_reg(reg, value)
	Write value to CLK register reg.
#define	_clk_write_reg(reg, value)   mmio_write8((void *)(CLK_BASE + XMEGA_CLK_##reg), (value))
#define	clk_write_ccp_reg(reg, value)   _clk_write_ccp_reg(reg, value)
	Write value to CCP-protected CLK register reg.
#define	_clk_write_ccp_reg(reg, value)   mmio_ccp_write8((void *)(CLK_BASE + XMEGA_CLK_##reg), (value))

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Detailed Description

Xmega Clock register definitions.

Copyright (C) 2009 Atmel Corporation. All rights reserved.

Definition in file xmega_clk.h.