I/O Ports Register Definitions
[Internal Register Definitions]
|
Register Offsets | |
|
| |
| #define | PORT_DIR 0x00 |
| Data Direction. | |
| #define | PORT_DIRSET 0x01 |
| Data Direction Set. | |
| #define | PORT_DIRCLR 0x02 |
| Data Direction Clear. | |
| #define | PORT_DIRTGL 0x03 |
| Data Direction Toggle. | |
| #define | PORT_OUT 0x04 |
| Data Output Value. | |
| #define | PORT_OUTSET 0x05 |
| Data Output Value Set. | |
| #define | PORT_OUTCLR 0x06 |
| Data Output Value Clear. | |
| #define | PORT_OUTTGL 0x07 |
| Data Output Value Toggle. | |
| #define | PORT_IN 0x08 |
| Data Input Value. | |
| #define | PORT_INTCTRL 0x09 |
| Interrupt Control. | |
| #define | PORT_INT0MASK 0x0A |
| Interrupt 0 Mask. | |
| #define | PORT_INT1MASK 0x0B |
| Interrupt 1 Mask. | |
| #define | PORT_INTFLAGS 0x0C |
| Interrupt Flags. | |
| #define | PORT_PIN0CTRL 0x10 |
| Pin 0 Configuration. | |
| #define | PORT_PIN1CTRL 0x11 |
| Pin 1 Configuration. | |
| #define | PORT_PIN2CTRL 0x12 |
| Pin 2 Configuration. | |
| #define | PORT_PIN3CTRL 0x13 |
| Pin 3 Configuration. | |
| #define | PORT_PIN4CTRL 0x14 |
| Pin 4 Configuration. | |
| #define | PORT_PIN5CTRL 0x15 |
| Pin 5 Configuration. | |
| #define | PORT_PIN6CTRL 0x16 |
| Pin 6 Configuration. | |
| #define | PORT_PIN7CTRL 0x17 |
| Pin 7 Configuration. | |
Bitfields in INTCTRL | |
|
| |
| #define | PORT_INTCTRL_INT0LVL_START 0 |
| Interrupt 0 Level. | |
| #define | PORT_INTCTRL_INT0LVL_SIZE 2 |
| Interrupt 0 Level. | |
| #define | PORT_INTCTRL_INT1LVL_START 2 |
| Interrupt 1 Level. | |
| #define | PORT_INTCTRL_INT1LVL_SIZE 2 |
| Interrupt 1 Level. | |
Bitfields in INTFLAGS | |
|
| |
| #define | PORT_INTFLAGS_INT0IF_BIT 0 |
| Interrupt 0 Flag. | |
| #define | PORT_INTFLAGS_INT1IF_BIT 1 |
| Interrupt 1 Flag. | |
Bitfields in PINCTRL | |
|
| |
| #define | PORT_PINCTRL_ISC_START 0 |
| Input/Sense Configuration. | |
| #define | PORT_PINCTRL_ISC_SIZE 3 |
| Input/Sense Configuration. | |
| #define | PORT_PINCTRL_OPC_START 3 |
| Output and Pull Configuration. | |
| #define | PORT_PINCTRL_OPC_SIZE 3 |
| Output and Pull Configuration. | |
| #define | PORT_PINCTRL_INVEN_BIT 6 |
| Inverted I/O Enable. | |
| #define | PORT_PINCTRL_SRLEN_BIT 7 |
| Slew Rate Limit Enable. | |
PINCTRL_OPC Bitfield Values | |
|
| |
| #define | PORT_PINCTRL_TOTEM 0x0 |
| Totempole/(N/A). | |
| #define | PORT_PINCTRL_BUSKEEPER 0x1 |
| Totempole/Bus keeper. | |
| #define | PORT_PINCTRL_PULLDOWN 0x2 |
| Totempole/Pull-down (on input). | |
| #define | PORT_PINCTRL_PULLUP 0x3 |
| Totempole/Pull-up (on input). | |
| #define | PORT_PINCTRL_WIREDOR 0x4 |
| Wired OR/(N/A). | |
| #define | PORT_PINCTRL_WIREDAND 0x5 |
| Wired AND/(N/A). | |
| #define | PORT_PINCTRL_WIREDORPULL 0x6 |
| Wired OR/Pull-down. | |
| #define | PORT_PINCTRL_WIREDANDPULL 0x7 |
| Wired AND/Pull-up. | |
PINCTRL_ISC Bitfield Values | |
|
| |
| #define | PORT_PINCTRL_ISC_BOTHEDGES 0x0 |
| Sense Both Edges. | |
| #define | PORT_PINCTRL_ISC_RISING 0x1 |
| Sense Rising Edge. | |
| #define | PORT_PINCTRL_ISC_FALLING 0x2 |
| Sense Falling Edge. | |
| #define | PORT_PINCTRL_ISC_LEVEL 0x3 |
| Sense Low Level. | |
| #define | PORT_PINCTRL_ISC_INPUT_DISABLE 0x7 |
| Input Buffer Disabled. | |
Bit manipulation macros | |
|
| |
| #define | PORT_BIT(name) (1U << PORT_##name##_BIT) |
| Create a mask with bit name set. | |
| #define | PORT_BF(name, value) ((value) << PORT_##name##_START) |
| Create a mask with bitfield name set to value. | |
| #define | PORT_BFMASK(name) (((1U << %s_##name##_SIZE) - 1) << %s_##name##_START) |
| Create a mask of the bitfield name. | |
| #define | PORT_BFEXT(name, regval) |
| Extract the value of bitfield name from regval. | |
| #define | PORT_BFINS(name, value, regval) |
| Return regval with bitfield name set to value. | |
Register access macros | |
|
| |
| #define | port_read_reg(base, reg) mmio_read8((void *)((uintptr_t)(base) + PORT_##reg)) |
| Read the value of PORT register reg. | |
| #define | port_write_reg(base, reg, value) mmio_write8((void *)((uintptr_t)(base) + PORT_##reg), (value)) |
| Write value to PORT register reg. | |
Define Documentation
| #define PORT_BF | ( | name, | |||
| value | ) | ((value) << PORT_##name##_START) |
Create a mask with bitfield name set to value.
Definition at line 127 of file xmega_port.h.
| #define PORT_BFEXT | ( | name, | |||
| regval | ) |
(((regval) >> PORT_##name##_START) \
& ((1U << PORT_##name##_SIZE) - 1))
Extract the value of bitfield name from regval.
Definition at line 133 of file xmega_port.h.
| #define PORT_BFINS | ( | name, | |||
| value, | |||||
| regval | ) |
(((regval) & ~(((1U << PORT_##name##_SIZE) - 1) \
<< PORT_##name##_START)) \
| PORT_BF(name, value))
Return regval with bitfield name set to value.
Definition at line 137 of file xmega_port.h.
| #define PORT_BFMASK | ( | name | ) | (((1U << %s_##name##_SIZE) - 1) << %s_##name##_START) |
Create a mask of the bitfield name.
Definition at line 130 of file xmega_port.h.
| #define PORT_BIT | ( | name | ) | (1U << PORT_##name##_BIT) |
Create a mask with bit name set.
Definition at line 124 of file xmega_port.h.
| #define PORT_DIR 0x00 |
Data Direction.
Definition at line 53 of file xmega_port.h.
| #define PORT_DIRCLR 0x02 |
Data Direction Clear.
Definition at line 55 of file xmega_port.h.
| #define PORT_DIRSET 0x01 |
Data Direction Set.
Definition at line 54 of file xmega_port.h.
| #define PORT_DIRTGL 0x03 |
Data Direction Toggle.
Definition at line 56 of file xmega_port.h.
| #define PORT_IN 0x08 |
Data Input Value.
Definition at line 61 of file xmega_port.h.
| #define PORT_INT0MASK 0x0A |
Interrupt 0 Mask.
Definition at line 63 of file xmega_port.h.
| #define PORT_INT1MASK 0x0B |
Interrupt 1 Mask.
Definition at line 64 of file xmega_port.h.
| #define PORT_INTCTRL 0x09 |
Interrupt Control.
Definition at line 62 of file xmega_port.h.
| #define PORT_INTCTRL_INT0LVL_SIZE 2 |
Interrupt 0 Level.
Definition at line 79 of file xmega_port.h.
| #define PORT_INTCTRL_INT0LVL_START 0 |
Interrupt 0 Level.
Definition at line 78 of file xmega_port.h.
| #define PORT_INTCTRL_INT1LVL_SIZE 2 |
Interrupt 1 Level.
Definition at line 81 of file xmega_port.h.
| #define PORT_INTCTRL_INT1LVL_START 2 |
Interrupt 1 Level.
Definition at line 80 of file xmega_port.h.
| #define PORT_INTFLAGS 0x0C |
Interrupt Flags.
Definition at line 65 of file xmega_port.h.
| #define PORT_INTFLAGS_INT0IF_BIT 0 |
Interrupt 0 Flag.
Definition at line 86 of file xmega_port.h.
| #define PORT_INTFLAGS_INT1IF_BIT 1 |
Interrupt 1 Flag.
Definition at line 87 of file xmega_port.h.
| #define PORT_OUT 0x04 |
Data Output Value.
Definition at line 57 of file xmega_port.h.
| #define PORT_OUTCLR 0x06 |
Data Output Value Clear.
Definition at line 59 of file xmega_port.h.
| #define PORT_OUTSET 0x05 |
Data Output Value Set.
Definition at line 58 of file xmega_port.h.
| #define PORT_OUTTGL 0x07 |
Data Output Value Toggle.
Definition at line 60 of file xmega_port.h.
| #define PORT_PIN0CTRL 0x10 |
Pin 0 Configuration.
Definition at line 66 of file xmega_port.h.
| #define PORT_PIN1CTRL 0x11 |
Pin 1 Configuration.
Definition at line 67 of file xmega_port.h.
| #define PORT_PIN2CTRL 0x12 |
Pin 2 Configuration.
Definition at line 68 of file xmega_port.h.
| #define PORT_PIN3CTRL 0x13 |
Pin 3 Configuration.
Definition at line 69 of file xmega_port.h.
| #define PORT_PIN4CTRL 0x14 |
Pin 4 Configuration.
Definition at line 70 of file xmega_port.h.
| #define PORT_PIN5CTRL 0x15 |
Pin 5 Configuration.
Definition at line 71 of file xmega_port.h.
| #define PORT_PIN6CTRL 0x16 |
Pin 6 Configuration.
Definition at line 72 of file xmega_port.h.
| #define PORT_PIN7CTRL 0x17 |
Pin 7 Configuration.
Definition at line 73 of file xmega_port.h.
| #define PORT_PINCTRL_BUSKEEPER 0x1 |
Totempole/Bus keeper.
Definition at line 103 of file xmega_port.h.
| #define PORT_PINCTRL_INVEN_BIT 6 |
Inverted I/O Enable.
Definition at line 96 of file xmega_port.h.
| #define PORT_PINCTRL_ISC_BOTHEDGES 0x0 |
Sense Both Edges.
Definition at line 114 of file xmega_port.h.
| #define PORT_PINCTRL_ISC_FALLING 0x2 |
Sense Falling Edge.
Definition at line 116 of file xmega_port.h.
| #define PORT_PINCTRL_ISC_INPUT_DISABLE 0x7 |
Input Buffer Disabled.
Definition at line 118 of file xmega_port.h.
| #define PORT_PINCTRL_ISC_LEVEL 0x3 |
Sense Low Level.
Definition at line 117 of file xmega_port.h.
| #define PORT_PINCTRL_ISC_RISING 0x1 |
Sense Rising Edge.
Definition at line 115 of file xmega_port.h.
| #define PORT_PINCTRL_ISC_SIZE 3 |
Input/Sense Configuration.
Definition at line 93 of file xmega_port.h.
| #define PORT_PINCTRL_ISC_START 0 |
Input/Sense Configuration.
Definition at line 92 of file xmega_port.h.
| #define PORT_PINCTRL_OPC_SIZE 3 |
Output and Pull Configuration.
Definition at line 95 of file xmega_port.h.
| #define PORT_PINCTRL_OPC_START 3 |
Output and Pull Configuration.
Definition at line 94 of file xmega_port.h.
| #define PORT_PINCTRL_PULLDOWN 0x2 |
Totempole/Pull-down (on input).
Definition at line 104 of file xmega_port.h.
| #define PORT_PINCTRL_PULLUP 0x3 |
Totempole/Pull-up (on input).
Definition at line 105 of file xmega_port.h.
| #define PORT_PINCTRL_SRLEN_BIT 7 |
Slew Rate Limit Enable.
Definition at line 97 of file xmega_port.h.
| #define PORT_PINCTRL_TOTEM 0x0 |
Totempole/(N/A).
Definition at line 102 of file xmega_port.h.
| #define PORT_PINCTRL_WIREDAND 0x5 |
Wired AND/(N/A).
Definition at line 107 of file xmega_port.h.
| #define PORT_PINCTRL_WIREDANDPULL 0x7 |
Wired AND/Pull-up.
Definition at line 109 of file xmega_port.h.
| #define PORT_PINCTRL_WIREDOR 0x4 |
Wired OR/(N/A).
Definition at line 106 of file xmega_port.h.
| #define PORT_PINCTRL_WIREDORPULL 0x6 |
Wired OR/Pull-down.
Definition at line 108 of file xmega_port.h.
| #define port_read_reg | ( | base, | |||
| reg | ) | mmio_read8((void *)((uintptr_t)(base) + PORT_##reg)) |
Read the value of PORT register reg.
Definition at line 146 of file xmega_port.h.
| #define port_write_reg | ( | base, | |||
| reg, | |||||
| value | ) | mmio_write8((void *)((uintptr_t)(base) + PORT_##reg), (value)) |
Write value to PORT register reg.
Definition at line 149 of file xmega_port.h.
Referenced by gpio_toggle_value(), and port_select_gpio().
