Programmable Multilevel Interrupt Controller
Defines |
| #define | pmic_enable_low_lvl_int() pmic_write_reg8(CTRL, pmic_read_reg8(CTRL) | PMIC_CTRL_LOLVLEN) |
| | Enable low level interrupts.
|
| #define | pmic_enable_medium_lvl_int() pmic_write_reg8(CTRL, pmic_read_reg8(CTRL) | PMIC_CTRL_MEDLVLEN) |
| | Enable medium level interrupts.
|
| #define | pmic_enable_high_lvl_int() pmic_write_reg8(CTRL, pmic_read_reg8(CTRL) | PMIC_CTRL_HILVLEN) |
| | Enable high level interrupts.
|
| #define | pmic_disable_low_lvl_int() pmic_write_reg8(CTRL, pmic_read_reg8(CTRL) & ~PMIC_CTRL_LOLVLEN) |
| | Disable low level interrupts.
|
| #define | pmic_disable_medium_lvl_int() pmic_write_reg8(CTRL, pmic_read_reg8(CTRL) & ~PMIC_CTRL_MEDLVLEN) |
| | Disable medium level interrupts.
|
| #define | pmic_disable_high_lvl_int() pmic_write_reg8(CTRL, pmic_read_reg8(CTRL) & ~PMIC_CTRL_HILVLEN) |
| | Disable high level interrupts.
|
Detailed Description
The Programmable Multilevel Interrupt Controller (PMIC) is available on the XMEGA devices. All peripherals can define three different priority levels for interrupts; high, medium or low. Medium level interrupts may interrupt low level interrupt service routines. High level interrupts may interrupt both low and medium level interrupt service routines. Low level interrupts have an optional round robin scheme to make sure all interrupts are serviced within a certain amount of time.
An interrupt level (low, medium or high) must be enabled in the PIMC, in addition to the global interrupt enable and the interrupt enable in the peripheral itself, before an interrupt of that level is able to trigger the according interrupt service routine.
To enable the interrupt in the peripheral itself, the desired interrupt level must be configured in the peripheral. According defines for the different levels are also available in this driver (e.g. for low level interrupt use PMIC_INTLVL_LOW).
Define Documentation
| #define pmic_disable_high_lvl_int |
( |
|
) |
pmic_write_reg8(CTRL, pmic_read_reg8(CTRL) & ~PMIC_CTRL_HILVLEN) |
Disable high level interrupts.
Definition at line 96 of file pmic.h.
| #define pmic_disable_low_lvl_int |
( |
|
) |
pmic_write_reg8(CTRL, pmic_read_reg8(CTRL) & ~PMIC_CTRL_LOLVLEN) |
Disable low level interrupts.
Definition at line 88 of file pmic.h.
| #define pmic_disable_medium_lvl_int |
( |
|
) |
pmic_write_reg8(CTRL, pmic_read_reg8(CTRL) & ~PMIC_CTRL_MEDLVLEN) |
Disable medium level interrupts.
Definition at line 92 of file pmic.h.
| #define pmic_enable_high_lvl_int |
( |
|
) |
pmic_write_reg8(CTRL, pmic_read_reg8(CTRL) | PMIC_CTRL_HILVLEN) |
Enable high level interrupts.
Definition at line 84 of file pmic.h.
| #define pmic_enable_low_lvl_int |
( |
|
) |
pmic_write_reg8(CTRL, pmic_read_reg8(CTRL) | PMIC_CTRL_LOLVLEN) |
Enable low level interrupts.
Definition at line 76 of file pmic.h.
| #define pmic_enable_medium_lvl_int |
( |
|
) |
pmic_write_reg8(CTRL, pmic_read_reg8(CTRL) | PMIC_CTRL_MEDLVLEN) |
Enable medium level interrupts.
Definition at line 80 of file pmic.h.
