ATxmega SPI registers. More...
#include <io.h>Go to the source code of this file.
Defines | |
Register Offset | |
| #define | SPI_CTRL 0 |
| Control Register. | |
| #define | SPI_INTCTRL 1 |
| Interrupt Control Register. | |
| #define | SPI_STATUS 2 |
| Status Register. | |
| #define | SPI_DATA 3 |
| Data Register. | |
| #define | SPI_CTRL_PRESCALER_START 0 |
| Clock Prescaler. | |
| #define | SPI_CTRL_PRESCALER_SIZE 2 |
| Clock Prescaler. | |
| #define | SPI_CTRL_MODE_START 2 |
| Mode. | |
| #define | SPI_CTRL_MODE_SIZE 2 |
| Mode. | |
| #define | SPI_CTRL_MASTER_BIT 4 |
| Master/Slave Select. | |
| #define | SPI_CTRL_DORD_BIT 5 |
| Data Order. | |
| #define | SPI_CTRL_ENABLE_BIT 6 |
| Enable. | |
| #define | SPI_CTRL_CLK2X_BIT 7 |
| Clock Double. | |
| #define | SPI_INTCTRL_INTLVL_START 0 |
| Interrupt Level. | |
| #define | SPI_INTCTRL_INTLVL_SIZE 2 |
| Interrupt Level. | |
| #define | SPI_STATUS_WRCOL_BIT 6 |
| Write Collision Flag. | |
| #define | SPI_STATUS_IF_BIT 7 |
| Interrupt Flag. | |
Bit manipulation macros | |
| #define | SPI_BIT(name) (1 << SPI_##name##_BIT) |
| Create a mask with bit name set. | |
| #define | SPI_BF(name, value) |
| Create a mask with bitfield name set to value. | |
| #define | SPI_BFEXT(name, value) |
| Extract the value of bitfield name from regval. | |
| #define | SPI_BFINS(name, value, old) |
| Return regval with bitfield name set to value. | |
Register access macros | |
| #define | spi_write_reg(spi, reg, value) mmio_write8((void *)((uintptr_t)(spi) + SPI_##reg), value) |
| Write value to SPI register reg. | |
| #define | spi_read_reg(spi, reg) mmio_read8((void *)((uintptr_t)(spi) + SPI_##reg)) |
| Read the value of SPI register reg. | |
ATxmega SPI registers.
Copyright (C) 2009 Atmel Corporation. All rights reserved.
Definition in file xmega_spi.h.
1.6.3