00001
00038 #include <board.h>
00039 #include <gpio.h>
00040 #ifdef __ICCAVR__
00041 #include <pmic.h>
00042 #endif
00043
00044 #ifdef CONFIG_TOUCH_RESISTIVE
00045 # include <board/touch/resistive/touch.h>
00046 #endif
00047 #ifdef CONFIG_EXTRAM_SDRAM
00048 # include <board/sdram.h>
00049 #endif
00050
00051 void board_init(void)
00052 {
00053
00054 port_select_gpio((void *)PORTE_BASE, 0xff, PORT_DIR_OUTPUT
00055 | PORT_INIT_HIGH);
00056
00057 #ifdef CONFIG_XPLAIN_UARTD0
00058 port_select_gpio_pin(27, PORT_DIR_OUTPUT | PORT_INIT_HIGH);
00059 #endif
00060
00061 #ifdef CONFIG_XPLAIN_UARTD1
00062 port_select_gpio_pin(31, PORT_DIR_OUTPUT | PORT_INIT_HIGH);
00063 #endif
00064
00065 port_select_gpio_pin(19, PORT_DIR_OUTPUT | PORT_INIT_HIGH);
00066
00067
00068
00069
00070
00071 port_select_gpio_pin(21, PORT_DIR_OUTPUT);
00072 port_select_gpio_pin(23, PORT_DIR_OUTPUT);
00073
00074
00075
00076
00077 port_select_gpio((void *)PORTF_BASE, 0xFF,
00078 PORT_DIR_INPUT | PORT_BOTHEDGES | PORT_PULL_UP);
00079
00080
00081 #ifdef CONFIG_TOUCH_RESISTIVE
00082 board_enable_touch_adc();
00083 #endif
00084
00085
00086
00087
00088
00089
00090
00091 #ifdef __ICCAVR__
00092 pmic_enable_low_lvl_int();
00093 pmic_enable_medium_lvl_int();
00094 pmic_enable_high_lvl_int();
00095 #endif
00096
00097
00098 #ifdef CONFIG_EXTRAM_SDRAM
00099
00100 port_write_reg(PORTH_BASE, OUT, 0x0f);
00101 port_write_reg(PORTH_BASE, DIR, 0xff);
00102 port_write_reg(PORTK_BASE, DIR, 0xff);
00103 port_write_reg(PORTJ_BASE, DIR, 0xf0);
00104
00105 board_enable_sdram();
00106 #endif
00107 }