Xmega Oscillator Register Definitions
[Internal Register Definitions]
|
Register Offsets | |
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| |
| #define | XMEGA_OSC_CTRL 0x00 |
| Oscillator Control. | |
| #define | XMEGA_OSC_STATUS 0x01 |
| Oscillator Status. | |
| #define | XMEGA_OSC_XOSCCTRL 0x02 |
| XOSC Control. | |
| #define | XMEGA_OSC_XOSCFAIL 0x03 |
| XOSC Failure Detection. | |
| #define | XMEGA_OSC_RC32KCAL 0x04 |
| 32 kHz Oscillator Calibration | |
| #define | XMEGA_OSC_PLLCTRL 0x05 |
| PLL Control. | |
| #define | XMEGA_OSC_DFLLCTRL 0x06 |
| DFLL Control. | |
Bitfields in CTRL | |
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| |
| #define | XMEGA_OSC_RC2MEN_BIT 0 |
| 2 MHz RCOSC Enable | |
| #define | XMEGA_OSC_RC32MEN_BIT 1 |
| 32 MHz RCOSC Enable | |
| #define | XMEGA_OSC_RC32KEN_BIT 2 |
| 32 kHz RCOSC Enable | |
| #define | XMEGA_OSC_XOSCEN_BIT 3 |
| External Oscillator Enable. | |
| #define | XMEGA_OSC_PLLEN_BIT 4 |
| PLL Enable. | |
Bitfields in STATUS | |
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| |
| #define | XMEGA_OSC_RC2MRDY_BI 0 |
| 2 MHz RCOSC Enable | |
| #define | XMEGA_OSC_RC32MRDY_BIT 1 |
| 32 MHz RCOSC Enable | |
| #define | XMEGA_OSC_RC32KRDY_BIT 2 |
| 32 kHz RCOSC Enable | |
| #define | XMEGA_OSC_XOSCRDY_BIT 3 |
| External Oscillator Enable. | |
| #define | XMEGA_OSC_PLLRDY_BIT 4 |
| PLL Enable. | |
Bitfields in XOSCCTRL | |
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| |
| #define | XMEGA_OSC_XOSCSEL_START 0 |
| Crystal Oscillator Type. | |
| #define | XMEGA_OSC_XOSCSEL_SIZE 4 |
| Crystal Oscillator Type. | |
| #define | XMEGA_OSC_X32KLPM_BIT 5 |
| XTAL 32 kHz Low Power Mode. | |
| #define | XMEGA_OSC_FRQRANGE_START 6 |
| XTAL Frequency Range. | |
| #define | XMEGA_OSC_FRQRANGE_SIZE 2 |
| XTAL Frequency Range. | |
Bitfields in XOSCFAIL | |
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| |
| #define | XMEGA_OSC_XOSCFDEN_BIT 0 |
| Failure Detection Enable. | |
| #define | XMEGA_OSC_XOSCFDIF_BIT 1 |
| Failure Detection Interrupt Flag. | |
Bitfields in PLLCTRL | |
|
| |
| #define | XMEGA_OSC_PLLFAC_START 0 |
| Multiplication Factor. | |
| #define | XMEGA_OSC_PLLFAC_SIZE 5 |
| Multiplication Factor. | |
| #define | XMEGA_OSC_PLLSRC_START 6 |
| Clock Source. | |
| #define | XMEGA_OSC_PLLSRC_SIZE 2 |
| Clock Source. | |
Bit manipulation macros | |
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| |
| #define | OSC_BIT(name) (1U << XMEGA_OSC_##name##_BIT) |
| Create a mask with bit name set. | |
| #define | OSC_BF(name, value) ((value) << XMEGA_OSC_##name##_START) |
| Create a mask with bitfield name set to value. | |
| #define | OSC_BFMASK(name) |
| Create a mask of the bitfield name. | |
| #define | OSC_BFEXT(name, regval) |
| Extract the value of bitfield name from regval. | |
| #define | OSC_BFINS(name, value, regval) |
| Return regval with bitfield name set to value. | |
Register access macros | |
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| |
| #define | osc_read_reg(reg) _osc_read_reg(reg) |
| Read the value of OSC register reg. | |
| #define | _osc_read_reg(reg) mmio_read8((void *)(OSC_BASE + XMEGA_OSC_##reg)) |
| #define | osc_write_reg(reg, value) _osc_write_reg(reg, value) |
| Write value to OSC register reg. | |
| #define | _osc_write_reg(reg, value) mmio_write8((void *)(OSC_BASE + XMEGA_OSC_##reg), (value)) |
| #define | osc_write_ccp_reg(reg, value) _osc_write_ccp_reg(reg, value) |
| Write value to CCP-protected OSC register reg. | |
| #define | _osc_write_ccp_reg(reg, value) mmio_ccp_write8((void *)(OSC_BASE + XMEGA_OSC_##reg), (value)) |
Detailed Description
These are the Xmega Oscillator registers taken from the Xmega A manual.
Define Documentation
| #define OSC_BF | ( | name, | |||
| value | ) | ((value) << XMEGA_OSC_##name##_START) |
Create a mask with bitfield name set to value.
Definition at line 111 of file xmega_osc.h.
Referenced by pll_config_init().
| #define OSC_BFEXT | ( | name, | |||
| regval | ) |
(((regval) >> XMEGA_OSC_##name##_START) \
& ((1U << XMEGA_OSC_##name##_SIZE) - 1))
Extract the value of bitfield name from regval.
Definition at line 118 of file xmega_osc.h.
| #define OSC_BFINS | ( | name, | |||
| value, | |||||
| regval | ) |
(((regval) & ~(((1U << XMEGA_OSC_##name##_SIZE) - 1) \
<< XMEGA_OSC_##name##_START)) \
| XMEGA_OSC_BF(name, value))
Return regval with bitfield name set to value.
Definition at line 122 of file xmega_osc.h.
| #define OSC_BFMASK | ( | name | ) |
(((1U << XMEGA_OSC_##name##_SIZE) - 1) \
<< XMEGA_OSC_##name##_START)
Create a mask of the bitfield name.
Definition at line 114 of file xmega_osc.h.
| #define OSC_BIT | ( | name | ) | (1U << XMEGA_OSC_##name##_BIT) |
Create a mask with bit name set.
Definition at line 109 of file xmega_osc.h.
Referenced by pll_disable(), pll_enable(), and pll_wait_for_lock().
| #define osc_read_reg | ( | reg | ) | _osc_read_reg(reg) |
Read the value of OSC register reg.
Definition at line 131 of file xmega_osc.h.
Referenced by osc_disable(), osc_enable_internal(), osc_is_running(), pll_config_read(), pll_disable(), pll_enable(), and pll_wait_for_lock().
| #define osc_write_ccp_reg | ( | reg, | |||
| value | ) | _osc_write_ccp_reg(reg, value) |
Write value to CCP-protected OSC register reg.
Definition at line 141 of file xmega_osc.h.
| #define osc_write_reg | ( | reg, | |||
| value | ) | _osc_write_reg(reg, value) |
Write value to OSC register reg.
Definition at line 136 of file xmega_osc.h.
Referenced by osc_disable(), osc_enable_internal(), pll_config_write(), pll_disable(), and pll_enable().
| #define XMEGA_OSC_CTRL 0x00 |
Oscillator Control.
Definition at line 56 of file xmega_osc.h.
| #define XMEGA_OSC_DFLLCTRL 0x06 |
DFLL Control.
Definition at line 62 of file xmega_osc.h.
| #define XMEGA_OSC_FRQRANGE_SIZE 2 |
XTAL Frequency Range.
Definition at line 89 of file xmega_osc.h.
| #define XMEGA_OSC_FRQRANGE_START 6 |
XTAL Frequency Range.
Definition at line 88 of file xmega_osc.h.
| #define XMEGA_OSC_PLLCTRL 0x05 |
PLL Control.
Definition at line 61 of file xmega_osc.h.
| #define XMEGA_OSC_PLLEN_BIT 4 |
PLL Enable.
Definition at line 71 of file xmega_osc.h.
| #define XMEGA_OSC_PLLFAC_SIZE 5 |
Multiplication Factor.
Definition at line 101 of file xmega_osc.h.
| #define XMEGA_OSC_PLLFAC_START 0 |
Multiplication Factor.
Definition at line 100 of file xmega_osc.h.
| #define XMEGA_OSC_PLLRDY_BIT 4 |
PLL Enable.
Definition at line 80 of file xmega_osc.h.
| #define XMEGA_OSC_PLLSRC_SIZE 2 |
Clock Source.
Definition at line 103 of file xmega_osc.h.
| #define XMEGA_OSC_PLLSRC_START 6 |
Clock Source.
Definition at line 102 of file xmega_osc.h.
| #define XMEGA_OSC_RC2MEN_BIT 0 |
2 MHz RCOSC Enable
Definition at line 67 of file xmega_osc.h.
| #define XMEGA_OSC_RC2MRDY_BI 0 |
2 MHz RCOSC Enable
Definition at line 76 of file xmega_osc.h.
| #define XMEGA_OSC_RC32KCAL 0x04 |
32 kHz Oscillator Calibration
Definition at line 60 of file xmega_osc.h.
| #define XMEGA_OSC_RC32KEN_BIT 2 |
32 kHz RCOSC Enable
Definition at line 69 of file xmega_osc.h.
| #define XMEGA_OSC_RC32KRDY_BIT 2 |
32 kHz RCOSC Enable
Definition at line 78 of file xmega_osc.h.
| #define XMEGA_OSC_RC32MEN_BIT 1 |
32 MHz RCOSC Enable
Definition at line 68 of file xmega_osc.h.
| #define XMEGA_OSC_RC32MRDY_BIT 1 |
32 MHz RCOSC Enable
Definition at line 77 of file xmega_osc.h.
| #define XMEGA_OSC_STATUS 0x01 |
Oscillator Status.
Definition at line 57 of file xmega_osc.h.
| #define XMEGA_OSC_X32KLPM_BIT 5 |
XTAL 32 kHz Low Power Mode.
Definition at line 87 of file xmega_osc.h.
| #define XMEGA_OSC_XOSCCTRL 0x02 |
XOSC Control.
Definition at line 58 of file xmega_osc.h.
| #define XMEGA_OSC_XOSCEN_BIT 3 |
External Oscillator Enable.
Definition at line 70 of file xmega_osc.h.
| #define XMEGA_OSC_XOSCFAIL 0x03 |
XOSC Failure Detection.
Definition at line 59 of file xmega_osc.h.
| #define XMEGA_OSC_XOSCFDEN_BIT 0 |
Failure Detection Enable.
Definition at line 94 of file xmega_osc.h.
| #define XMEGA_OSC_XOSCFDIF_BIT 1 |
Failure Detection Interrupt Flag.
Definition at line 95 of file xmega_osc.h.
| #define XMEGA_OSC_XOSCRDY_BIT 3 |
External Oscillator Enable.
Definition at line 79 of file xmega_osc.h.
| #define XMEGA_OSC_XOSCSEL_SIZE 4 |
Crystal Oscillator Type.
Definition at line 86 of file xmega_osc.h.
| #define XMEGA_OSC_XOSCSEL_START 0 |
Crystal Oscillator Type.
Definition at line 85 of file xmega_osc.h.
