Board RAM control

Defines
#define	BOARD_SDRAM_INITDLY   (100 * 2 * CONFIG_CPU_HZ / 1000000)
	SDRAM initialization delay in number of CLKper2 cycles (100 us).
#define	BOARD_SDRAM_REFRESH   (16 * 2 * CONFIG_CPU_HZ / 1000000)
	SDRAM refresh interval in number of CLKper2 cycles (16 us).
Functions
static void	board_enable_sdram (void)
	Configure the EBI for the 8 MB onboard SDRAM.
static void	board_disable_sdram (void)
	Disable the SDRAM by disabling the EBI.
static void	board_enable_sdram_selfrefresh (void)
	Enable self-refresh mode for SDRAM.
static void	board_disable_sdram_selfrefresh (void)
	Disable self-refresh mode for SDRAM.

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Detailed Description

For internal use only.

This module contains functions for initalizing the EBI for use with the Xplain's onboard SDRAM, as well as enabling/disabling SDRAM self-refresh mode upon XMEGA sleep/wake-up.

The initialization assumes that the symbol CONFIG_CPU_HZ is half of what CLKper2 is, i.e., the CPU clock is prescaled to half of CLKper2.

Further, the initialization requires CONFIG_EXTRAM_BASE and CONFIG_EXTRAM_END to be defined, which are also needed by the application for addressing the hugemem section (external RAM).

Note:

If CONFIG_EXTRAM_SDRAM is defined, the initialization is done in board_init().

Todo:

Remove dependency on CONFIG_CPU_HZ, implement sysclk_get_xxx_hz()

Todo:

Revisit when EBI driver for XMEGA is ready and this can be moved into include/bus/ebi/params.

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Define Documentation

#define BOARD_SDRAM_INITDLY   (100 * 2 * CONFIG_CPU_HZ / 1000000)

SDRAM initialization delay in number of CLKper2 cycles (100 us).

Definition at line 75 of file sdram.h.

Referenced by board_enable_sdram().

#define BOARD_SDRAM_REFRESH   (16 * 2 * CONFIG_CPU_HZ / 1000000)

SDRAM refresh interval in number of CLKper2 cycles (16 us).

Definition at line 78 of file sdram.h.

Referenced by board_enable_sdram().

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Function Documentation

static void board_disable_sdram

(

void

)

[inline, static]

Disable the SDRAM by disabling the EBI.

Definition at line 121 of file sdram.h.

References EBI_BF, EBI_IFMODE_DISABLED, ebi_write_reg, EBICS_BF, EBICS_MODE_DISABLE, ebics_write_reg, sysclk_disable_module(), SYSCLK_EBI, and SYSCLK_PORT_GEN.

static void board_disable_sdram_selfrefresh

(

void

)

[inline, static]

Disable self-refresh mode for SDRAM.

Bring SDRAM out of self-refresh mode when the peripheral clock is enabled. This is needed to regain access.

Definition at line 159 of file sdram.h.

References cpu_irq_restore(), cpu_irq_save(), EBICS_BIT, ebics_read_reg, and ebics_write_reg.

static void board_enable_sdram

(

void

)

[inline, static]

Configure the EBI for the 8 MB onboard SDRAM.

Definition at line 87 of file sdram.h.

References BOARD_SDRAM_INITDLY, BOARD_SDRAM_REFRESH, EBI_BF, EBI_BIT, EBI_IFMODE_3PORT, EBI_SDCOL_10BIT, EBI_SDDATAW_4BIT, ebi_write_reg, ebi_write_word_reg, EBICS_BF, EBICS_BIT, EBICS_MODE_SDRAM, ebics_read_reg, EBICS_SDMODE_NORMAL, ebics_write_reg, ebics_write_word_reg, ilog2(), SYSCLK_EBI, sysclk_enable_module(), and SYSCLK_PORT_GEN.

static void board_enable_sdram_selfrefresh

(

void

)

[inline, static]

Enable self-refresh mode for SDRAM.

Put SDRAM in self-refresh mode, leaving it inaccessible until this mode is disabled again. This is necessary for retaining its contents when the XMEGA is put in sleep modes where the peripheral clock is disabled.

Definition at line 139 of file sdram.h.

References cpu_irq_restore(), cpu_irq_save(), EBICS_BIT, ebics_read_reg, and ebics_write_reg.