00001
00039 #ifndef REGS_XMEGA_TC_H_INCLUDED
00040 #define REGS_XMEGA_TC_H_INCLUDED
00041
00042 #include <io.h>
00043
00056
00057
00058 #define TC_CTRLA 0x00 //!< Control Register A
00059 #define TC_CTRLB 0x01 //!< Control Register B
00060 #define TC_CTRLC 0x02 //!< Control Register C
00061 #define TC_CTRLD 0x03 //!< Control Register D
00062 #define TC_CTRLE 0x04 //!< Control Register E
00063 #define TC_INTCTRLA 0x06 //!< Interrupt Enable Register A
00064 #define TC_INTCTRLB 0x07 //!< Interrupt Enable Register B
00065 #define TC_CTRLFCRL 0x08 //!< Control Register F Clear
00066 #define TC_CTRLFSET 0x09 //!< Control Register F Set
00067 #define TC_CTRLGCLR 0x0a //!< Control Register G Clear
00068 #define TC_CTRLGSET 0x0b //!< Control Register G Set
00069 #define TC_INTFLAGS 0x0c //!< Interrupt Flag Register
00070 #define TC_TEMP 0x0f //!< Temporary Register for 16-bit Access
00071 #define TC_CNTL 0x20 //!< Counter Register H
00072 #define TC_CNTH 0x21 //!< Counter Register L
00073 #define TC_PERL 0x26 //!< Period Register H
00074 #define TC_PERH 0x27 //!< Period Register L
00075 #define TC_CCAL 0x28 //!< Compare or Capture Register A L
00076 #define TC_CCAH 0x29 //!< Compare or Capture Register A H
00077 #define TC_CCBL 0x2a //!< Compare or Capture Register B L
00078 #define TC_CCBH 0x2b //!< Compare or Capture Register B H
00079 #define TC_CCCL 0x2c //!< Compare or Capture Register C L
00080 #define TC_CCCH 0x2d //!< Compare or Capture Register C H
00081 #define TC_CCDL 0x2e //!< Compare or Capture Register D L
00082 #define TC_CCDH 0x2f //!< Compare or Capture Register D H
00083 #define TC_PERBUFL 0x36 //!< Timer/Counter Period Buffer L
00084 #define TC_PERBUFH 0x37 //!< Timer/Counter Period Buffer H
00085 #define TC_CCABUFL 0x38 //!< Compare or Capture A Buffer Register L
00086 #define TC_CCABUFH 0x39 //!< Compare or Capture A Buffer Register H
00087 #define TC_CCBBUFL 0x3a //!< Compare or Capture B Buffer Register L
00088 #define TC_CCBBUFH 0x3b //!< Compare or Capture B Buffer Register H
00089 #define TC_CCCBUFL 0x3c //!< Compare or Capture C Buffer Register L
00090 #define TC_CCCBUFH 0x3d //!< Compare or Capture C Buffer Register H
00091 #define TC_CCDBUFL 0x3e //!< Compare or Capture D Buffer Register L
00092 #define TC_CCDBUFH 0x3f //!< Compare or Capture D Buffer Register H
00093
00094
00096
00097 #define TC_CTRLA_CLKSEL_START 0 //!< Clock Select
00098 #define TC_CTRLA_CLKSEL_SIZE 4 //!< Clock Select
00099
00100
00102
00103 #define TC_CTRLB_WGMODE_START 0 //!< Waveform Generation Mode
00104 #define TC_CTRLB_WGMODE_SIZE 3 //!< Waveform Generation Mode
00105 #define TC_CTRLB_CCAEN_BIT 4 //!< Compare or Capture A Enable
00106 #define TC_CTRLB_CCBEN_BIT 5 //!< Compare or Capture B Enable
00107 #define TC_CTRLB_CCCEN_BIT 6 //!< Compare or Capture C Enable
00108 #define TC_CTRLB_CCDEN_BIT 7 //!< Compare or Capture D Enable
00109
00110
00112
00113 #define TC_CTRLC_CMPA_BIT 0 //!< Compare Output Value A
00114 #define TC_CTRLC_CMPB_BIT 1 //!< Compare Output Value B
00115 #define TC_CTRLC_CMPC_BIT 2 //!< Compare Output Value C
00116 #define TC_CTRLC_CMPD_BIT 3 //!< Compare Output Value D
00117
00118
00120
00121 #define TC_CTRLD_EVSEL_START 0 //!< Event Source Select
00122 #define TC_CTRLD_EVSEL_SIZE 4 //!< Event Source Select
00123 #define TC_CTRLD_EVDLY_BIT 4 //!< Timer Delay Event
00124 #define TC_CTRLD_EVACT_START 5 //!< Event Action
00125 #define TC_CTRLD_EVACT_SIZE 3 //!< Event Action
00126
00127
00129
00130 #define TC_CTRLE_BYTEM_BIT 0 //!< Byte Mode
00131
00132
00134
00135
00136 #define TC_INTCTRLA_OVFINTLVL_START 0
00137
00138 #define TC_INTCTRLA_OVFINTLVL_SIZE 2
00139
00140 #define TC_INTCTRLA_ERRINTLVL_START 2
00141
00142 #define TC_INTCTRLA_ERRINTLVL_SIZE 2
00143
00144
00146
00147
00148 #define TC_INTCTRLB_CCAINTLVL_START 0
00149
00150 #define TC_INTCTRLB_CCAINTLVL_SIZE 2
00151
00152 #define TC_INTCTRLB_CCBINTLVL_START 2
00153
00154 #define TC_INTCTRLB_CCBINTLVL_SIZE 2
00155
00156 #define TC_INTCTRLB_CCCINTLVL_START 4
00157
00158 #define TC_INTCTRLB_CCCINTLVL_SIZE 2
00159
00160 #define TC_INTCTRLB_CCDINTLVL_START 6
00161
00162 #define TC_INTCTRLB_CCDINTLVL_SIZE 2
00163
00164
00166
00167 #define TC_DIR_BIT 0 //!< Counter Direction
00168 #define TC_LUPD_BIT 1 //!< Lock Update
00169 #define TC_CMD_START 2 //!< Timer/Counter Command
00170 #define TC_CMD_SIZE 2 //!< Timer/Counter Command
00171
00172
00174
00175 #define TC_PERBV_BIT 0 //!< Period Buffer Valid
00176 #define TC_CCABV_BIT 1 //!< Compare or Capture A Buffer Valid
00177 #define TC_CCBBV_BIT 2 //!< Compare or Capture B Buffer Valid
00178 #define TC_CCCBV_BIT 3 //!< Compare or Capture C Buffer Valid
00179 #define TC_CCDBV_BIT 4 //!< Compare or Capture D Buffer Valid
00180
00181
00183
00184 #define TC_INTFLAGS_OVFIF_BIT 0
00185 #define TC_INTFLAGS_ERRIF_BIT 1
00186 #define TC_INTFLAGS_CCAIF_BIT 4
00187 #define TC_INTFLAGS_CCBIF_BIT 5
00188 #define TC_INTFLAGS_CCCIF_BIT 6
00189 #define TC_INTFLAGS_CCDIF_BIT 7
00190
00191
00193
00194 #define TC_CLKSEL_OFF 0x0 //!< None, Timer/Counter is in off state
00195 #define TC_CLKSEL_DIV1 0x1 //!< Prescaler: clk
00196 #define TC_CLKSEL_DIV2 0x2 //!< Prescaler: clk/2
00197 #define TC_CLKSEL_DIV4 0x3 //!< Prescaler: clk/4
00198 #define TC_CLKSEL_DIV8 0x4 //!< Prescaler: clk/8
00199 #define TC_CLKSEL_DIV64 0x5 //!< Prescaler: clk/64
00200 #define TC_CLKSEL_DIV256 0x6 //!< Prescaler: clk/256
00201 #define TC_CLKSEL_DIV1024 0x7 //!< Prescaler: clk/1024
00202 #define TC_CLKSEL_EVCHAN0 0x8 //!< Event Channel 0
00203 #define TC_CLKSEL_EVCHAN1 0x9 //!< Event Channel 1
00204 #define TC_CLKSEL_EVCHAN2 0xa //!< Event Channel 2
00205 #define TC_CLKSEL_EVCHAN3 0xb //!< Event Channel 3
00206 #define TC_CLKSEL_EVCHAN4 0xc //!< Event Channel 4
00207 #define TC_CLKSEL_EVCHAN5 0xd //!< Event Channel 5
00208 #define TC_CLKSEL_EVCHAN6 0xe //!< Event Channel 6
00209 #define TC_CLKSEL_EVCHAN7 0xf //!< Event Channel 7
00210
00211
00213
00214 #define TC_WGMODE_NORMAL 0x0 //!< Normal
00215 #define TC_WGMODE_FRQ 0x1 //!< Frequency
00216 #define TC_WGMODE_SS 0x3 //!< Single Slope PWM
00217 #define TC_WGMODE_DS_T 0x5 //!< Dual Slope PWM, Event on TOP
00218 #define TC_WGMODE_DS_TB 0x6 //!< Dual Slope PWM, Event on TOP and BOTTOM
00219 #define TC_WGMODE_DS_B 0x7 //!< Dual Slope PWM, Event on BOTTOM
00220
00221
00223
00224 #define TC_CMD_NONE 0x0 //!< None
00225 #define TC_CMD_UPDATE 0x1 //!< Force Update
00226 #define TC_CMD_RESTART 0x2 //!< Force Restart
00227 #define TC_CMD_RESET 0x3 //!< Force Hard Reset
00228
00229
00231
00232 #define TC_EVACT_OFF 0x0 //!< None
00233 #define TC_EVACT_CAPT 0x1 //!< Input Capture
00234 #define TC_EVACT_UPDOWN 0x2 //!< Externally Controlled Up/Down Count
00235 #define TC_EVACT_QDEC 0x3 //!< Quadrature Decode
00236 #define TC_EVACT_RESTART 0x4 //!< Restart Waveform Periode
00237 #define TC_EVACT_FRQ 0x5 //!< Frequency Capture
00238 #define TC_EVACT_PW 0x6 //!< Pulse Width Capture
00239
00240
00242
00243 #define TC_EVSEL_OFF 0x0 //!< Off
00244 #define TC_EVSEL_CH0 0x8 //!< Channel 0
00245 #define TC_EVSEL_CH1 0x9 //!< Channel 1
00246 #define TC_EVSEL_CH2 0xa //!< Channel 2
00247 #define TC_EVSEL_CH3 0xb //!< Channel 3
00248 #define TC_EVSEL_CH4 0xc //!< Channel 4
00249 #define TC_EVSEL_CH5 0xd //!< Channel 5
00250 #define TC_EVSEL_CH6 0xe //!< Channel 6
00251 #define TC_EVSEL_CH7 0xf //!< Channel 7
00252
00253
00255
00256
00257 #define TC_BIT(name) \
00258 (1U << TC_##name##_BIT)
00259
00260 #define TC_BF(name, value) \
00261 ((value) << TC_##name##_START)
00262
00263 #define TC_BFMASK(name) \
00264 (((1U << TC_##name##_SIZE) - 1) << TC_##name##_START)
00265
00266 #define TC_BFEXT(name, regval) \
00267 (((regval) >> TC_##name##_START) \
00268 & ((1U << TC_##name##_SIZE) - 1))
00269
00270 #define TC_BFINS(name, value, regval) \
00271 (((regval) & ~(((1U << TC_##name##_SIZE) - 1) \
00272 << TC_##name##_START)) \
00273 | TC_BF(name, value))
00274
00275
00277
00278
00279 #define tc_write_reg8(tc, reg, value) \
00280 mmio_write8((void *) ((uintptr_t)(tc) + TC_##reg), value)
00281
00282 #define tc_read_reg8(tc, reg) \
00283 mmio_read8((void *) ((uintptr_t)(tc) + TC_##reg))
00284
00285 #define tc_write_reg16(tc, reg, value) \
00286 mmio_write16((void *) ((uintptr_t)(tc) + TC_##reg##L), value)
00287
00288 #define tc_read_reg16(tc, reg) \
00289 mmio_read16((void *) ((uintptr_t)(tc) + TC_##reg##L))
00290
00291
00293 #endif