System Clock Management
[Clock Management]

Collaboration diagram for System Clock Management:

Functions
static __always_inline bool	sysclk_module_is_enabled (uint8_t port, uint8_t id)
	Check if the synchronous clock is enabled for a module.
Enabling and disabling synchronous clocks
void	sysclk_enable_module (uint8_t port, uint8_t id)
	Enable the clock to peripheral id on port port.
void	sysclk_disable_module (uint8_t port, uint8_t id)
	Disable the clock to peripheral id on port port.
Querying the system clock and its derived clocks
The following functions may be used to query the current frequency of the system clock and the CPU and bus clocks derived from it. sysclk_get_main_hz() and sysclk_get_cpu_hz() can be assumed to be available on all platforms, although some platforms may define additional accessors for various chip-internal bus clocks. These are usually not intended to be queried directly by generic code.
static uint32_t	sysclk_get_main_hz (void)
	Return the current rate in Hz of the main system clock.
static uint32_t	sysclk_get_per4_hz (void)
	Return the current rate in Hz of clk_PER4.
static uint32_t	sysclk_get_per2_hz (void)
	Return the current rate in Hz of clk_PER2.
static uint32_t	sysclk_get_per_hz (void)
	Return the current rate in Hz of clk_PER.
static uint32_t	sysclk_get_cpu_hz (void)
	Return the current rate in Hz of the CPU clock.
System Clock Initialization
void	sysclk_init (void)
	Initialize the synchronous clock system.

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Detailed Description

The sysclk API covers the system clock and all clocks derived from it. The system clock is a chip-internal clock on which all synchronous clocks, i.e. CPU and bus/peripheral clocks, are based. The system clock is typically generated from one of a variety of sources, which may include crystal and RC oscillators as well as PLLs. The clocks derived from the system clock are sometimes also known as synchronous clocks, since they always run synchronously with respect to each other, as opposed to generic clocks which may run from different oscillators or PLLs.

The sysclk API is partially chip- or platform-specific. While all platforms provide mostly the same functionality, there are some variations around how different bus types are handled.

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Function Documentation

void sysclk_disable_module	(	uint8_t	port,
		uint8_t	id
	)

Disable the clock to peripheral id on port port.

Parameters:

	port	ID of the port to which the module is connected (one of the SYSCLK_PORT_* definitions).
	id	The ID (bitmask) of the peripheral module to be disabled

Referenced by board_disable_sdram(), board_disable_touch_adc(), spi_priv_disable(), and tc_disable_pclk().

void sysclk_enable_module	(	uint8_t	port,
		uint8_t	id
	)

Enable the clock to peripheral id on port port.

Parameters:

	port	ID of the port to which the module is connected (one of the SYSCLK_PORT_* definitions).
	id	The ID (bitmask) of the peripheral module to be enabled

Referenced by board_enable_sdram(), board_enable_touch_adc(), gfx_init_comms(), spi_priv_enable(), and tc_enable_pclk().

static uint32_t sysclk_get_cpu_hz

(

void

)

[inline, static]

Return the current rate in Hz of the CPU clock.

Definition at line 206 of file sysclk.h.

References sysclk_get_per_hz().

static uint32_t sysclk_get_main_hz

(

void

)

[inline, static]

Return the current rate in Hz of the main system clock.

Todo:

This function assumes that the main clock source never changes once it's been set up, and that PLL0 always runs at the compile-time configured default rate. While this is probably the most common configuration, which we want to support as a special case for performance reasons, we will at some point need to support more dynamic setups as well.

Definition at line 131 of file sysclk.h.

References pll_get_default_rate, and unhandled_case.

Referenced by sysclk_get_per4_hz().

static uint32_t sysclk_get_per2_hz

(

void

)

[inline, static]

Return the current rate in Hz of clk_PER2.

This clock can run up to two times faster than the CPU clock.

Definition at line 174 of file sysclk.h.

References sysclk_get_per4_hz(), unhandled_case, XMEGA_CLK_PSBCDIV_1_1, XMEGA_CLK_PSBCDIV_1_2, XMEGA_CLK_PSBCDIV_2_2, and XMEGA_CLK_PSBCDIV_4_1.

Referenced by sysclk_get_per_hz().

static uint32_t sysclk_get_per4_hz

(

void

)

[inline, static]

Return the current rate in Hz of clk_PER4.

This clock can run up to four times faster than the CPU clock.

Definition at line 159 of file sysclk.h.

References sysclk_get_main_hz().

Referenced by sysclk_get_per2_hz().

static uint32_t sysclk_get_per_hz

(

void

)

[inline, static]

Return the current rate in Hz of clk_PER.

This clock always runs at the same rate as the CPU clock.

Definition at line 195 of file sysclk.h.

References sysclk_get_per2_hz().

Referenced by sysclk_get_cpu_hz().

void sysclk_init

(

void

)

Initialize the synchronous clock system.

This function will mask all synchronous clocks except for any clocks which are essential for normal operation (for example internal memory clocks). Peripheral clocks must be re-enabled before use by the peripheral driver.

Definition at line 70 of file sysclk.c.

References assert, build_assert, CLK_BF, clk_read_reg, clk_write_ccp_reg, osc_disable(), osc_enable(), osc_is_running(), PLL_SRC_RC2MHZ, PR_BASE, unhandled_case, XMEGA_CLK_PSADIV_1, XMEGA_CLK_PSADIV_512, XMEGA_CLK_PSBCDIV_1_1, XMEGA_CLK_PSBCDIV_2_2, and XMEGA_PR_PRPF.

static __always_inline bool sysclk_module_is_enabled	(	uint8_t	port,
		uint8_t	id
	)			[static]

Check if the synchronous clock is enabled for a module.

Parameters:

	port	ID of the port to which the module is connected (one of the SYSCLK_PORT_* definitions).
	id	The ID (bitmask) of the peripheral module to check (one of the SYSCLK_* module definitions).

Return values:

	true	If the clock for module id on port is enabled.
	false	If the clock for module id on port is disabled.

Definition at line 232 of file sysclk.h.

References PR_BASE.

Referenced by tc_pclk_is_enabled().