Port Configuration
[Internal Register Definitions]
|
Register Offsets | |
|
| |
| #define | PORTCFG_MPCMASK 0x0 |
| Multi-Pin Configuration Mask Register. | |
| #define | PORTCFG_VPCTRLA 0x2 |
| Virtual Port-Map Control A Register. | |
| #define | PORTCFG_VPCTRLB 0x3 |
| Virtual Port-Map Control B Register. | |
| #define | PORTCFG_CLKEVOUT 0x4 |
| Clock and Event Out Register. | |
VPCTRLA Bitfields | |
|
| |
| #define | PORTCFG_VPCTRLA_VP0MAP_START 0 |
| Virtual Port 0 Mapping. | |
| #define | PORTCFG_VPCTRLA_VP0MAP_SIZE 4 |
| Virtual Port 0 Mapping. | |
| #define | PORTCFG_VPCTRLA_VP1MAP_START 4 |
| Virtual Port 1 Mapping. | |
| #define | PORTCFG_VPCTRLA_VP1MAP_SIZE 4 |
| Virtual Port 1 Mapping. | |
VPCTRLB Bitfields | |
|
| |
| #define | PORTCFG_VPCTRLB_VP2MAP_START 0 |
| Virtual Port 2 Mapping. | |
| #define | PORTCFG_VPCTRLB_VP2MAP_SIZE 4 |
| Virtual Port 2 Mapping. | |
| #define | PORTCFG_VPCTRLB_VP3MAP_START 4 |
| Virtual Port 3 Mapping. | |
| #define | PORTCFG_VPCTRLB_VP3MAP_SIZE 4 |
| Virtual Port 3 Mapping. | |
CLKEVOUT Bitfields | |
|
| |
| #define | PORTCFG_CLKEVOUT_CLKOUT_START 0 |
| Clock Output Port. | |
| #define | PORTCFG_CLKEVOUT_CLKOUT_SIZE 2 |
| Clock Output Port. | |
| #define | PORTCFG_CLKEVOUT_EVOUT_START 4 |
| Event Output Port. | |
| #define | PORTCFG_CLKEVOUT_EVOUT_SIZE 2 |
| Event Output Port. | |
VPCTRLA and VPCTRLB Bitfield Values | |
|
| |
| #define | PORTCFG_PORTA 0x0 |
| Map Port A to Virtual Port. | |
| #define | PORTCFG_PORTB 0x1 |
| Map Port B to Virtual Port. | |
| #define | PORTCFG_PORTC 0x2 |
| Map Port C to Virtual Port. | |
| #define | PORTCFG_PORTD 0x3 |
| Map Port D to Virtual Port. | |
| #define | PORTCFG_PORTE 0x4 |
| Map Port E to Virtual Port. | |
| #define | PORTCFG_PORTF 0x5 |
| Map Port F to Virtual Port. | |
| #define | PORTCFG_PORTG 0x6 |
| Map Port G to Virtual Port. | |
| #define | PORTCFG_PORTH 0x7 |
| Map Port H to Virtual Port. | |
| #define | PORTCFG_PORTJ 0x8 |
| Map Port J to Virtual Port. | |
| #define | PORTCFG_PORTK 0x9 |
| Map Port K to Virtual Port. | |
| #define | PORTCFG_PORTL 0xa |
| Map Port L to Virtual Port. | |
| #define | PORTCFG_PORTM 0xb |
| Map Port M to Virtual Port. | |
| #define | PORTCFG_PORTN 0xc |
| Map Port N to Virtual Port. | |
| #define | PORTCFG_PORTP 0xd |
| Map Port P to Virtual Port. | |
| #define | PORTCFG_PORTQ 0xe |
| Map Port Q to Virtual Port. | |
| #define | PORTCFG_PORTR 0xf |
| Map Port R to Virtual Port. | |
CLKEVOUT_CLKOUT Bitfield Values | |
|
| |
| #define | PORTCFG_CLKOUT_OFF 0x0 |
| Clock Out Disabled. | |
| #define | PORTCFG_CLKOUT_PC7 0x1 |
| Clock Output on Port C Pin 7. | |
| #define | PORTCFG_CLKOUT_PD7 0x2 |
| Clock Output on Port D Pin 7. | |
| #define | PORTCFG_CLKOUT_PE7 0x3 |
| Clock Output on Port E Pin 7. | |
CLKEVOUT_EVOUT Bitfield Values | |
|
| |
| #define | PORTCFG_EVOUT_OFF 0x0 |
| Event Out Disabled. | |
| #define | PORTCFG_EVOUT_PC7 0x1 |
| Event Channel 0 on Port C Pin 7. | |
| #define | PORTCFG_EVOUT_PD7 0x2 |
| Event Channel 0 on Port D Pin 7. | |
| #define | PORTCFG_EVOUT_PE7 0x3 |
| Event Channel 0 on Port E Pin 7. | |
Bit manipulation macros | |
|
| |
| #define | PORTCFG_BIT(name) (1U << PORTCFG_##name##_BIT) |
| Create a mask with bit name set. | |
| #define | PORTCFG_BF(name, value) ((value) << PORTCFG_##name##_START) |
| Create a mask with bitfield name set to value. | |
| #define | PORTCFG_BFMASK(name) (((1U << %s_##name##_SIZE) - 1) << %s_##name##_START) |
| Create a mask of the bitfield name. | |
| #define | PORTCFG_BFEXT(name, regval) |
| Extract the value of bitfield name from regval. | |
| #define | PORTCFG_BFINS(name, value, regval) |
| Return regval with bitfield name set to value. | |
Register access macros | |
|
| |
| #define | portcfg_read_reg(base, reg) mmio_read8((void *)((uintptr_t)(base) + PORTCFG_##reg)) |
| Read the value of PORT register reg. | |
| #define | portcfg_write_reg(base, reg, value) mmio_write8((void *)((uintptr_t)(base) + PORTCFG_##reg), (value)) |
| Write value to PORT register reg. | |
Define Documentation
| #define PORTCFG_BF | ( | name, | |||
| value | ) | ((value) << PORTCFG_##name##_START) |
Create a mask with bitfield name set to value.
Definition at line 125 of file xmega_portcfg.h.
| #define PORTCFG_BFEXT | ( | name, | |||
| regval | ) |
(((regval) >> PORTCFG_##name##_START) \
& ((1U << PORTCFG_##name##_SIZE) - 1))
Extract the value of bitfield name from regval.
Definition at line 131 of file xmega_portcfg.h.
| #define PORTCFG_BFINS | ( | name, | |||
| value, | |||||
| regval | ) |
(((regval) & ~(((1U << PORTCFG_##name##_SIZE) - 1) \
<< PORTCFG_##name##_START)) \
| PORTCFG_BF(name, value))
Return regval with bitfield name set to value.
Definition at line 135 of file xmega_portcfg.h.
| #define PORTCFG_BFMASK | ( | name | ) | (((1U << %s_##name##_SIZE) - 1) << %s_##name##_START) |
Create a mask of the bitfield name.
Definition at line 128 of file xmega_portcfg.h.
| #define PORTCFG_BIT | ( | name | ) | (1U << PORTCFG_##name##_BIT) |
Create a mask with bit name set.
Definition at line 122 of file xmega_portcfg.h.
| #define PORTCFG_CLKEVOUT 0x4 |
Clock and Event Out Register.
Definition at line 56 of file xmega_portcfg.h.
| #define PORTCFG_CLKEVOUT_CLKOUT_SIZE 2 |
Clock Output Port.
Definition at line 78 of file xmega_portcfg.h.
| #define PORTCFG_CLKEVOUT_CLKOUT_START 0 |
Clock Output Port.
Definition at line 77 of file xmega_portcfg.h.
| #define PORTCFG_CLKEVOUT_EVOUT_SIZE 2 |
Event Output Port.
Definition at line 80 of file xmega_portcfg.h.
| #define PORTCFG_CLKEVOUT_EVOUT_START 4 |
Event Output Port.
Definition at line 79 of file xmega_portcfg.h.
| #define PORTCFG_CLKOUT_OFF 0x0 |
Clock Out Disabled.
Definition at line 105 of file xmega_portcfg.h.
| #define PORTCFG_CLKOUT_PC7 0x1 |
Clock Output on Port C Pin 7.
Definition at line 106 of file xmega_portcfg.h.
| #define PORTCFG_CLKOUT_PD7 0x2 |
Clock Output on Port D Pin 7.
Definition at line 107 of file xmega_portcfg.h.
| #define PORTCFG_CLKOUT_PE7 0x3 |
Clock Output on Port E Pin 7.
Definition at line 108 of file xmega_portcfg.h.
| #define PORTCFG_EVOUT_OFF 0x0 |
Event Out Disabled.
Definition at line 113 of file xmega_portcfg.h.
| #define PORTCFG_EVOUT_PC7 0x1 |
Event Channel 0 on Port C Pin 7.
Definition at line 114 of file xmega_portcfg.h.
| #define PORTCFG_EVOUT_PD7 0x2 |
Event Channel 0 on Port D Pin 7.
Definition at line 115 of file xmega_portcfg.h.
| #define PORTCFG_EVOUT_PE7 0x3 |
Event Channel 0 on Port E Pin 7.
Definition at line 116 of file xmega_portcfg.h.
| #define PORTCFG_MPCMASK 0x0 |
Multi-Pin Configuration Mask Register.
Definition at line 53 of file xmega_portcfg.h.
| #define PORTCFG_PORTA 0x0 |
Map Port A to Virtual Port.
Definition at line 85 of file xmega_portcfg.h.
| #define PORTCFG_PORTB 0x1 |
Map Port B to Virtual Port.
Definition at line 86 of file xmega_portcfg.h.
| #define PORTCFG_PORTC 0x2 |
Map Port C to Virtual Port.
Definition at line 87 of file xmega_portcfg.h.
| #define PORTCFG_PORTD 0x3 |
Map Port D to Virtual Port.
Definition at line 88 of file xmega_portcfg.h.
| #define PORTCFG_PORTE 0x4 |
Map Port E to Virtual Port.
Definition at line 89 of file xmega_portcfg.h.
| #define PORTCFG_PORTF 0x5 |
Map Port F to Virtual Port.
Definition at line 90 of file xmega_portcfg.h.
| #define PORTCFG_PORTG 0x6 |
Map Port G to Virtual Port.
Definition at line 91 of file xmega_portcfg.h.
| #define PORTCFG_PORTH 0x7 |
Map Port H to Virtual Port.
Definition at line 92 of file xmega_portcfg.h.
| #define PORTCFG_PORTJ 0x8 |
Map Port J to Virtual Port.
Definition at line 93 of file xmega_portcfg.h.
| #define PORTCFG_PORTK 0x9 |
Map Port K to Virtual Port.
Definition at line 94 of file xmega_portcfg.h.
| #define PORTCFG_PORTL 0xa |
Map Port L to Virtual Port.
Definition at line 95 of file xmega_portcfg.h.
| #define PORTCFG_PORTM 0xb |
Map Port M to Virtual Port.
Definition at line 96 of file xmega_portcfg.h.
| #define PORTCFG_PORTN 0xc |
Map Port N to Virtual Port.
Definition at line 97 of file xmega_portcfg.h.
| #define PORTCFG_PORTP 0xd |
Map Port P to Virtual Port.
Definition at line 98 of file xmega_portcfg.h.
| #define PORTCFG_PORTQ 0xe |
Map Port Q to Virtual Port.
Definition at line 99 of file xmega_portcfg.h.
| #define PORTCFG_PORTR 0xf |
Map Port R to Virtual Port.
Definition at line 100 of file xmega_portcfg.h.
| #define portcfg_read_reg | ( | base, | |||
| reg | ) | mmio_read8((void *)((uintptr_t)(base) + PORTCFG_##reg)) |
Read the value of PORT register reg.
Definition at line 144 of file xmega_portcfg.h.
| #define PORTCFG_VPCTRLA 0x2 |
Virtual Port-Map Control A Register.
Definition at line 54 of file xmega_portcfg.h.
| #define PORTCFG_VPCTRLA_VP0MAP_SIZE 4 |
Virtual Port 0 Mapping.
Definition at line 62 of file xmega_portcfg.h.
| #define PORTCFG_VPCTRLA_VP0MAP_START 0 |
Virtual Port 0 Mapping.
Definition at line 61 of file xmega_portcfg.h.
| #define PORTCFG_VPCTRLA_VP1MAP_SIZE 4 |
Virtual Port 1 Mapping.
Definition at line 64 of file xmega_portcfg.h.
| #define PORTCFG_VPCTRLA_VP1MAP_START 4 |
Virtual Port 1 Mapping.
Definition at line 63 of file xmega_portcfg.h.
| #define PORTCFG_VPCTRLB 0x3 |
Virtual Port-Map Control B Register.
Definition at line 55 of file xmega_portcfg.h.
| #define PORTCFG_VPCTRLB_VP2MAP_SIZE 4 |
Virtual Port 2 Mapping.
Definition at line 70 of file xmega_portcfg.h.
| #define PORTCFG_VPCTRLB_VP2MAP_START 0 |
Virtual Port 2 Mapping.
Definition at line 69 of file xmega_portcfg.h.
| #define PORTCFG_VPCTRLB_VP3MAP_SIZE 4 |
Virtual Port 3 Mapping.
Definition at line 72 of file xmega_portcfg.h.
| #define PORTCFG_VPCTRLB_VP3MAP_START 4 |
Virtual Port 3 Mapping.
Definition at line 71 of file xmega_portcfg.h.
| #define portcfg_write_reg | ( | base, | |||
| reg, | |||||
| value | ) | mmio_write8((void *)((uintptr_t)(base) + PORTCFG_##reg), (value)) |
Write value to PORT register reg.
Definition at line 147 of file xmega_portcfg.h.
Referenced by touch_priv_port_set_detection(), touch_priv_port_set_gradient_x(), and touch_priv_port_set_gradient_y().
