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Defines |
| #define | PSC_ASYNCHRONOUS_OUTPUT_CONTROL 0 |
| #define | PSC_CLOCK_SOURCE_EQ_CLKIO 0 |
| #define | PSC_CLOCK_SOURCE_EQ_PLL 1 |
| #define | Psc_complete_and_stop() |
| #define | Psc_config() |
| #define | Psc_config_input_0(v1, v2, v3, v4, v5, v6) |
| #define | Psc_config_input_1(v1, v2, v3, v4, v5, v6) |
| #define | Psc_config_input_2(v1, v2, v3, v4, v5, v6) |
| #define | PSC_DISACTIVATE_ALL_OUTPUTS 4 |
| #define | PSC_DISACTIVATE_OUTPUT_A 1 |
| #define | PSC_DISACTIVATE_OUTPUT_AB 3 |
| #define | PSC_DISACTIVATE_OUTPUT_B 2 |
| #define | PSC_DIV_CLOCK_BY_256 3 |
| #define | PSC_DIV_CLOCK_BY_32 2 |
| #define | PSC_DIV_CLOCK_BY_4 1 |
| #define | Psc_enable_all_outputs() |
| #define | PSC_INPUT_FILTER_DISABLE 0 |
| #define | PSC_INPUT_FILTER_ENABLE 1 |
| #define | PSC_INPUT_HALT 6 |
| #define | PSC_INPUT_NO_ACTION 0 |
| #define | Psc_lock() |
| #define | PSC_MODE_CENTERED 1 |
| #define | PSC_MODE_ONE_RAMP 0 |
| #define | PSC_NODIV_CLOCK 0 |
| #define | PSC_OUTPUT_HIGH 1 |
| #define | PSC_OUTPUT_LOW 0 |
| #define | PSC_OVERLAP_DISABLE 0 |
| #define | PSC_OVERLAP_ENABLE 1 |
| #define | Psc_run() |
| #define | Psc_select_outputs(val2B, val2A, val1B, val1A, val0B, val0A) |
| #define | Psc_set_module_A(sa_val, ra_val, sb_val) |
| #define | Psc_set_module_B(sa_val, ra_val, sb_val) |
| #define | Psc_set_module_C(sa_val, ra_val, sb_val) |
| #define | Psc_set_register_RB(rb_val) |
| #define | Psc_stop() |
| #define | PSC_SYNCHRONOUS_OUTPUT_CONTROL 1 |
| #define | Psc_unlock() |
| #define | PSC_USE_COMPARATOR 1 |
| #define | PSC_USE_HIGH_LEVEL 1 |
| #define | PSC_USE_LOW_LEVEL 0 |
| #define | PSC_USE_PIN 0 |
Functions |
| void | init_psc (void) |
| | Configures the PSC accordingly to the PSC Define Configuration values.
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