configure the PMIC0 register
[Enable all 6 PSC outputs]

authorize the update of PSC registers More...

Collaboration diagram for configure the PMIC0 register:

Defines

#define Psc_config_input_0(v1, v2, v3, v4, v5, v6)

Detailed Description

authorize the update of PSC registers

Define Documentation

#define Psc_config_input_0 ( v1,
v2,
v3,
v4,
v5,
v6   ) 

Value:

PMIC0 = ((v1)<<POVEN0)| \
           ((v2)<<PISEL0)| \
           ((v3)<<PELEV0)| \
           ((v4)<<PFLTE0)| \
           ((v5)<<PAOC0)| \
           ((v6)<<PRFM00);

Definition at line 164 of file psc_drv.h.

Referenced by PSC_Init().


Generated on Wed Oct 22 15:04:01 2008 for AVR172 : Atmel BLDC control on ATAVRMC310 with ATmega32M1 by  doxygen 1.5.7.1