Xmega IEC60730 Class B Library
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classb_cpu.h
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/* This file has been prepared for Doxygen automatic documentation generation.*/
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/**
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* \file
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*
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* \brief
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* Settings and definitions for the CPU registers test.
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*
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* \par Application note:
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* AVR1610: Guide to IEC60730 Class B compliance with XMEGA
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*
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* \par Documentation
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* For comprehensive code documentation, supported compilers, compiler
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* settings and supported devices see readme.html
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*
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* \author
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* Atmel Corporation: http://www.atmel.com \n
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* Support email: avr@atmel.com
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*
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* Copyright (C) 2012 Atmel Corporation. All rights reserved.
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*
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* \page License
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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*
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* 1. Redistributions of source code must retain the above copyright notice,
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* this list of conditions and the following disclaimer.
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*
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* 2. Redistributions in binary form must reproduce the above copyright notice,
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* this list of conditions and the following disclaimer in the documentation
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* and/or other materials provided with the distribution.
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*
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* 3. The name of Atmel may not be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* 4. This software may only be redistributed and used in connection with an
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* Atmel AVR product.
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*
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* THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
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* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
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* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
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* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
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* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
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* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
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* DAMAGE.
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*/
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#ifndef CLASSB_CPU_H_
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#define CLASSB_CPU_H_
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#include "
error_handler.h
"
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//! \defgroup classb_registers CPU Register test
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//!
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//! \brief This is the self-test module for the registers in the CPU.
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//!
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//! The CPU registers are tested for stuck bits and some coupling faults.
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//! The test is executed by calling \ref classb_register_test(). The test procedure
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//! consists of five steps per register:
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//! -# Write 0x55 to register
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//! -# Write 0xAA to register
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//! -# Verify content (0xAA) of register
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//! -# Write 0x55 to register
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//! -# Verify content (0x55) of register
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//!
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//! Non-destructive testing is done on the R-registers that are stated to
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//! need preservation in the compiler documentation and on all IO registers.
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//! Further, this test returns its result using a register. Therefore, the
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//! register used to return the value, the stack pointer registers or those
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//! used within the test (e.g. to save values) are critical in the sense
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//! that the test cannot be executed correctly unless these registers are
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//! working.
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//!
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//! The error handler for the test is \ref CLASSB_ERROR_HANDLER_REGISTERS().
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//! It is possible to configure independently the behavior of the test with
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//! respect to failure in critical and non-critical registers (see \ref CLASSB_ERROR_CRIT
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//! and \ref CLASSB_ERROR_NON_CRIT).
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//!
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//! Given that GCC and IAR make use of the CPU registers in a different manner,
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//! we have included a compiler-specific function. This reduces execution time
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//! and simplifies the code.
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//!
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//! \note Interrupts must be disabled during this test.
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//!
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//! \addtogroup classb_registers
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//@{
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//! \defgroup settings_cpu Settings related to error handling
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//! \brief In principle, any error in critical registers would mean that the system
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//! cannot verify whether the registers are working correctly. Since registers are
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//! vital to most applications, the microcontroller should probably hang. However,
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//! this behavior can be modified so that failure in critical registers is handled by
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//! \ref CLASSB_ERROR_HANDLER_REGISTERS(). The behavior for failure in non-critical
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//! registers can also be configured: the microcontroller can call the error handler
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//! or hang.
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//@{
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/*! \brief Error handling in critical registers.
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* If this constant is defined as \c CLASSB_LABEL1, critical register faults
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* will hang the device. However, if this was defined as \c CLASSB_LABEL2,
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* errors in critical registers would be processed by the error handler.
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*/
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#define CLASSB_ERROR_CRIT CLASSB_LABEL1
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/*! \brief Error handling in non-critical registers.
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* If this constant is defined as \c CLASSB_LABEL2, errors in non-critical registers
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* will be processed by the error handler. However, it was defined as \c CLASSB_LABEL1,
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* non-critical register faults would hang the device.
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*/
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#define CLASSB_ERROR_NON_CRIT CLASSB_LABEL2
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//@}
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//! \internal \defgroup reg_check Symbols used to check whether some registers are present.
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//!
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//! \brief These symbols are used to check indirectly whether RAMPx and EIND
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//! registers are present.
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//!
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//! RAMPx and EIND registers are present if the memory sizes are large enough.
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//! It seems like the register constants are defined in the header file even
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//! if those registers are not present in the device. Therefore, it is
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//! necessary to check it indirectly through the memory size.
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//@{
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#ifdef __DOXYGEN__
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//! \internal \brief Automatically defined for devices with data memory larger than 64KB.
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#define CLASSB_HAS_BIGMEM
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//! \internal \brief Automatically defined for devices with program memory larger than 64KB.
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#define CLASSB_HAS_BIGFLASH
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#else
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#if (DATAMEM_SIZE > 65536)
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#define CLASSB_HAS_BIGMEM
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#endif
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#if (PROGMEM_SIZE > 65536)
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#define CLASSB_HAS_BIGFLASH
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#endif
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#endif
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//@}
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//! \internal \defgroup reg_macros Macros for reading, writing and testing registers
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//! \brief In order to simplify the code, the assembly code is interfaced through macros.
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//@{
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/*! \internal \brief Save R register content to R31.
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*
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* \param reg R-register to store in R31.
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*/
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#define CLASSB_RegStore_R(reg) \
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ASSEMBLY( \
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"mov r31, " #reg " \n" \
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)
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/*! \internal \brief Load R register content from R31.
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*
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* \param reg R-register to restore from R31.
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*/
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#define CLASSB_RegRestore_R(reg) \
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ASSEMBLY( \
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"mov " #reg ", r31 \n" \
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)
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/*! \internal \brief Set high R-register to specified value.
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*
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* \param reg R-register to set (R16-R31).
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* \param value Value to set R-register to.
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*/
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#define CLASSB_RegSet_R_HI(reg,value) \
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ASSEMBLY( \
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"ldi " #reg ", " #value " \n" \
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)
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/*! \internal \brief Set low R-register to specified value.
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*
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* \param reg R-register to set (R0-R15).
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* \param value Value to set R-register to.
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*
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* \note The value is copied into the specified register via R30.
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*/
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#define CLASSB_RegSet_R_LO(reg,value) \
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ASSEMBLY( \
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"ldi r30, " #value " \n" \
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"mov " #reg ", r30 \n" \
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)
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/*! \internal \brief Set IO-register to specified value.
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*
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* \param reg IO-address of register to set.
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* \param value Value to set register to.
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*
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* \note The value is copied into the specified register via R30.
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*/
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#define CLASSB_RegSet_IO(reg,value) \
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ASSEMBLY( \
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"ldi r30, " #value " \n" \
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"out " #reg ", r30 \n" \
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)
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/*! \internal \brief Clear R register.
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*
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* \param reg R-register to clear.
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*
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* \note This macro works for any R-register (R0-R31).
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*/
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#define CLASSB_RegClear_R(reg) \
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ASSEMBLY( \
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"clr " #reg " \n" \
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)
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/*! \internal \brief Clear IO-register.
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*
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* \param reg IO-address of register to clear.
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*
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* \note The IO-register is cleared via R30.
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*/
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#define CLASSB_RegClear_IO(reg) \
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ASSEMBLY( \
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"clr r30 \n" \
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"out " #reg ", r30 \n" \
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)
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/*! \internal \brief Store IO-register content.
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*
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* \param reg IO-address of register to store.
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*
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* \note The value of the IO-register is stored in R31.
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*/
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#define CLASSB_RegStore_IO(reg) \
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ASSEMBLY( \
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"in r31, " #reg " \n" \
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)
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/*! \internal \brief Restore IO-register content.
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*
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* \param reg IO-address of register to restore.
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*
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* \note The value of the IO-register is restored from R31.
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*/
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#define CLASSB_RegRestore_IO(reg) \
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ASSEMBLY( \
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"out " #reg ", r31 \n" \
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)
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/*! \internal \brief Test R16-31 with specified value, jump to specified label on fault
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*
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* \param reg Register to test (R16..R31).
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* \param value Value to test register with.
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* \param label Label to jump to if test fails.
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*/
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#define CLASSB_RegTest_R_HI(reg,value,label) \
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ASSEMBLY( \
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"ldi " #reg ", " #value " \n" \
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"cpi " #reg ", " #value " \n" \
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"breq A_" STRINGIZE(LABEL(reg,value,__LINE__)) " \n" \
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"jmp " STRINGIZE(label) " \n" \
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"A_" STRINGIZE(LABEL(reg,value,__LINE__)) ": \n" \
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)
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/*! \internal \brief Test R0-15 with specified value, jump to specified label on fault
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*
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* \note R30 is used in the copying values to the register.
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*
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* \param reg Register to test (R0..R15).
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* \param value Value to test register with.
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* \param label Label to jump to if test fails.
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*/
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#define CLASSB_RegTest_R_LO(reg,value,label) \
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ASSEMBLY( \
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"ldi r30, " #value " \n" \
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"mov " #reg ", r30 \n" \
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"mov r30, " #reg " \n" \
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"cpi r30, " #value " \n" \
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"breq A_" STRINGIZE(LABEL(reg,value,__LINE__)) " \n" \
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"jmp " STRINGIZE(label) " \n" \
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"A_" STRINGIZE(LABEL(reg,value,__LINE__)) ": \n" \
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)
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/*! \internal \brief Test IO register with specified value, jump to specified label on fault
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*
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* \note R30 is used in the copying of values to the register.
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*
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* \param reg Address of IO register to test.
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* \param value Value to test register with.
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* \param label Label to jump to if test fails.
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*/
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#define CLASSB_RegTest_IO(reg,value,label) \
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ASSEMBLY( \
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"ldi r30, " #value " \n" \
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"out " #reg ", r30 \n" \
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"in r30, " #reg " \n" \
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"cpi r30, " #value " \n" \
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"breq A_" STRINGIZE(LABEL(reg,value,__LINE__)) " \n" \
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"jmp " STRINGIZE(label) " \n" \
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"A_" STRINGIZE(LABEL(reg,value,__LINE__)) ": \n" \
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)
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//@}
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//! \defgroup reg_func Functions
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//! \brief This is the self-test for CPU registers.
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//@{
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bool
classb_register_test
(
void
);
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//@}
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//@}
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#endif
/* CLASSB_CPU_H_ */
tests
registers
classb_cpu.h
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