| Xmega IEC60730 Class B Library 1.0 |

All Files Functions Variables Typedefs Enumerations Enumerator Macros Groups Pages
classb_wdt_test.h
Go to the documentation of this file.
1 /* This file has been prepared for Doxygen automatic documentation generation.*/
2 /**
3 * \file
4 *
5 * \brief Settings for the watchdog timer test.
6 *
7 * \par Application note:
8 * AVR1610: Guide to IEC60730 Class B compliance with XMEGA
9 *
10 * \par Documentation
11 * For comprehensive code documentation, supported compilers, compiler
12 * settings and supported devices see readme.html
13 *
14 * \author
15 * Atmel Corporation: http://www.atmel.com \n
16 * Support email: avr@atmel.com
17 *
18 * Copyright (C) 2012 Atmel Corporation. All rights reserved.
19 *
20 * \page License
21 *
22 * Redistribution and use in source and binary forms, with or without
23 * modification, are permitted provided that the following conditions are met:
24 *
25 * 1. Redistributions of source code must retain the above copyright notice,
26 * this list of conditions and the following disclaimer.
27 *
28 * 2. Redistributions in binary form must reproduce the above copyright notice,
29 * this list of conditions and the following disclaimer in the documentation
30 * and/or other materials provided with the distribution.
31 *
32 * 3. The name of Atmel may not be used to endorse or promote products derived
33 * from this software without specific prior written permission.
34 *
35 * 4. This software may only be redistributed and used in connection with an
36 * Atmel AVR product.
37 *
38 * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
39 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
40 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
41 * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
42 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
43 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
44 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
45 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
46 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
47 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
48 * DAMAGE.
49 */
50
51 #ifndef CLASSB_WDT_TEST_H
52 #define CLASSB_WDT_TEST_H
53
54 #include "avr_compiler.h"
55 #include "classb_rtc_common.h"
56 #include "error_handler.h"
57
58 // CLASSB_WDT_PER contains the desired WDT timeout period for the application
59 // the WDT will be set to this value after the test is complete.
60
61 //! \defgroup classb_wdt Watchdog Timer Test
62 //!
63 //! \brief This test checks that the watchdog timer (WDT) is working.
64 //! The WDT is a system function for monitoring correct program operation that allows
65 //! recovering from error situations such as runaway or deadlocked code. The
66 //! self-diagnostic test \ref classb_wdt_test() is executed before the main application
67 //! and it basically makes sure that:
68 //! - a system reset is issued after WDT timeout
69 //! - the WDT can be reset
70 //! - the device is reset upon untimely WDT reset in window mode
71 //!
72 //! The test relies on the Real Time Counter (RTC) to check the timing of the WDT
73 //! oscillator and, therefore, this library includes a basic RTC driver (see
74 //! \ref rtc_driver). Note that the RTC has a clock source independent from the CPU and
75 //! the WDT. The RTC module is implicitly tested as well: if the frequency difference
76 //! between RTC and WDT is more than 50%, the error state is set.
77 //!
78 //! Errors are handled by \ref CLASSB_ERROR_HANDLER_WDT() and there are two configurable
79 //! actions:
80 //! -# \ref CLASSB_ACTIONS_WDT_RUNTIME_FAILURE() processes systems resets caused by a working WDT.
81 //! -# \ref CLASSB_ACTIONS_WDT_OTHER_FAILURE() deals with other reset causes, e.g. brown-out or
82 //! software reset.
83 //!
84 //! In addition to error handler and configurable actions, the user should configure the
85 //! WDT periods \ref CLASSB_WDT_WPER and \ref CLASSB_WDT_PER.
86 //!
87 //! \note The WDT should be left enabled by this test and be active at all times. There
88 //! are a number of Class B tests that can potentially take longer time than a WDT, see
89 //! for example \ref classb_crc. If this was the case, a possible solution would be to
90 //! increase the WDT period before the Class B test and decrease it again afterwards.
91 //!
92 //!
93 //!
94 //!
95
96 //@{
97
98 //! \name Configuration settings
99 //@{
100 //! \brief This is the closed period, where WDT cannot be reset.
101 //!
102 //! This should be given as one of the group configuration settings. The total timeout
103 //! period is the sum of the open and closed periods. In order to comply with the standard,
104 //! this should be at least 50% of the total period.
105 #define CLASSB_WDT_WPER WDT_WPER_500CLK_gc
106
107 //! \brief This is the open period, where WDT has to be reset.
108 //!
109 //! This should be given as one of the group configuration settings. The total timeout
110 //! period is the sum of the open and closed periods. In order to comply with
111 //! the standard, this should be no greater than than 50% of the total period.
112 #define CLASSB_WDT_PER WDT_PER_250CLK_gc
113 //@}
114
115 //! \internal \name Settings that should not be modified
116 //@{
117
118
119 //! \internal \brief This is the WDT period in cycles.
120 //!
121 //! The WDT frequency is set to 1024 Hz.
122 //! Considering the information in the datasheet, the period would be
123 //! <tt>T_WDT = 8*(2^PER)</tt>
124 //! where PER is the value of the WDT Timeout register. However, we also
125 //! have to consider that the group configuration is defined with two bits shifted to the left.
126 #define CLASSB_WDT_PER_CYCLES (8 * (1 << ( CLASSB_WDT_PER >>2) ) )
127
128 //! \internal \brief Maximum number of WDT cycles to wait for a timeout.
129 //!
130 //! The WDT runs from the ULP, which is optimized for power consumption and not accuracy.
131 //! Here we count with a +50% deviation from the nominal frequency, i.e.
132 //! <tt>CLASSB_WDT_MAX = 1.5 * CLASSB_WDT_PER_CYCLES</tt>
133 #define CLASSB_WDT_MAX ( CLASSB_WDT_PER_CYCLES + (CLASSB_WDT_PER_CYCLES >>1) )
134
135 //! \internal \brief Minimum number of WDT cycles to wait for a timeout.
136 //!
137 //! Here we count with a -50% deviation from the nominal frequency, i.e.
138 //! <tt>CLASSB_WDT_MIN = 0.5 * CLASSB_WDT_PER_CYCLES</tt>
139 #define CLASSB_WDT_MIN ( CLASSB_WDT_PER_CYCLES - (CLASSB_WDT_PER_CYCLES >>1) )
140
141 //! \internal \brief RTC period in cycles.
142 //!
143 //! This setting is only used for the WDT test.
144 //! The RTC period should be as small as possible to make the estimate reliable. The RTC
145 //! frequency is set to 1024 Hz. Note that:
146 //! - if <tt>PER == 0</tt>, only one third of the interrupts are generated
147 //! - if <tt>PER == 1</tt>, only one half of the interrupts are generated
148 //! This is not handled by the code, but <tt>PER=2</tt> is small enough. That means
149 //! approximately 3ms (3 ticks/1024KHz): the value in PER is compared with the counter value,
150 //! which starts at 0, so the real period will be <tt>CLASSB_WDT_RTC_PER+1</tt>.
151 #define CLASSB_WDT_RTC_PER 2
152
153 //@}
154
155
156 //! \internal \brief This enum has the valid test states for the WDT test.
157 typedef enum classb_preinit_teststate {
158 FAULT_WDT,
159 TEST_WDT_1,
160 TEST_WDT_2,
161 TEST_WDT_3,
162 TEST_WDT_OK,
163 } classb_preinit_teststate_t;
164
165
166 #if defined(__DOXYGEN__)
167 //! \name Class B Test
168 //@{
169 void classb_wdt_test (void);
170 //@}
171 #elif defined(__GNUC__)
172 // Pre-init test function prototype for GCC.
173 void __attribute__((__naked__, section(".init1"))) classb_wdt_test (void);
174 // Pre-init test function type and name for GCC.
175 #define classb_wdt_test void classb_wdt_test
176 #elif defined(__ICCAVR__)
177 // Pre-init test function type and name for IAR.
178 #define classb_wdt_test uint8_t __low_level_init
179 #else
180 #error Unknown compiler!
181 #endif
182
183 #if defined(__GNUC__) && !defined(__OPTIMIZE__)
184 # error Optimization must be enabled to successfully write to protected registers, due to timing constraints.
185 #endif
186
187
188 //@}
189
190 #endif // #define CLASSB_WDT_TEST_H