qdec_signal_generator.c

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/* This file has been prepared for Doxygen automatic documentation generation. */
#include "avr_compiler.h"
#include "qdec_signal_generator.h"

PORT_t * q_test_sig_Port;


uint8_t test_lineCount;


void generate_qdec_signal(PORT_t * qPort, uint8_t lineCount, uint8_t freq, bool dir)
{
        uint16_t ticks, quarter, half_quarter;

        /* The following code calculates the upper boundary of the timer and the
         * interrupt positions to get a correct Quadrature signal of the given frequency.
         *
         * The different compare interrupts sets the phase0 and phase90 signals.
         * Compare A interrupt sets phase0 and clears phase90
         * Compare B interrupt sets phase0 and phase90
         * Compare C interrupt clears phase0 and sets phase90
         * Compare D interrupt clears phase0 and phase90.
         *
         * Compare A interrupt also sets the index signal when one round has passed.
         */

        /* Calculates upper boundary of timer to get desired frequency.*/
        ticks = F_CPU / (freq * lineCount);
        quarter = ticks/4;
        half_quarter = ticks/8;

        if(dir == 1){
                TCE0.CCA = half_quarter;
                TCE0.CCB = half_quarter+quarter;
                TCE0.CCC = half_quarter+(2*quarter);
                TCE0.CCD = half_quarter+(3*quarter);
        }else{
                TCE0.CCA = half_quarter+(3*quarter);
                TCE0.CCB = half_quarter+(2*quarter);
                TCE0.CCC = half_quarter+quarter;
                TCE0.CCD = half_quarter;
        }

        TCE0.PER = ticks;
        TCE0.CTRLA = TC_CLKSEL_DIV1_gc;

        /* Enable low level interrupt on CCA, CCB, CCC and CCD.*/
        TCE0.INTCTRLB = TC0_CCAINTLVL0_bm | TC0_CCBINTLVL0_bm |
                        TC0_CCCINTLVL0_bm | TC0_CCDINTLVL0_bm;
        TCC0.INTCTRLA = TC0_ERRINTLVL0_bm;

        qPort->DIRSET = 0xFF;
        q_test_sig_Port = qPort;

        test_lineCount = lineCount;
}


ISR(TCE0_CCA_vect)
{
        static uint16_t i = 0;
        
        /* Set pin0 Phase0 signal.*/
        q_test_sig_Port->OUT = (q_test_sig_Port->OUT & ~0x03) | 0x01; 

        i++;

        /* Clear index.*/
        q_test_sig_Port->OUT = (q_test_sig_Port->OUT & ~0x04);

        /*  When (i = test_lineCount) one round has passed.
         *  Includes a check for i "bigger than" for error handling.
         */
        if(i>=test_lineCount){

                /* Set index. Lasts 4 states.*/
                q_test_sig_Port->OUT |= 0x04;
                i = 0;
        }
}


ISR(TCE0_CCB_vect)
{
        /* Set pin0 and pin1 phase0 and phase90 signal.*/
        q_test_sig_Port->OUT = (q_test_sig_Port->OUT & ~0x03) | 0x01 | 0x02;
}


ISR(TCE0_CCC_vect)
{
        /* Set pin1 phase90 signal. Clear pin0 phase0 signal.*/
        q_test_sig_Port->OUT = (q_test_sig_Port->OUT & ~0x03) | 0x02;
}


ISR(TCE0_CCD_vect)
{
        /* Clear pin0 and pin1, phase0 and phase90 signal.*/
        q_test_sig_Port->OUT = (q_test_sig_Port->OUT & ~0x03);
}


ISR(TCC0_ERR_vect)
{
        static uint8_t j = 0;
        j++;

        /* Since index needs to initialize, one error will happen first round.
         * If output is desired at every error, remove if statement or set (j>0).
         */
        if(j>2){

                /* To test if index works, set breakpoint here.
                 * It should NOT break when index is correct.
                 */
                q_test_sig_Port->OUT = q_test_sig_Port->OUT ^ 0x40;
                j=0;
        }
}