/*
 * 32K_xtal_chara.c
 *
 * Created: 09-Jul-19 12:53:57 PM
 * Author : M19892
 */ 



/* Devices                      Define
 * supported
 *
 * ATmega8						ATMEGA8
 * ATmega8A                     ATMEGA8
 * ATmega16                     ATMEGA16_32
 * ATmega16A					ATMEGA16_32
 * ATmega32                     ATMEGA16_32
 * ATmega32A					ATMEGA16_32
 * ATmega64                     ATMEGA64_128
 * ATmega64A					ATMEGA64_128
 * ATmega128					ATMEGA64_128
 * ATmega128A					ATMEGA64_128
 * ATmega640					ATMEGA640_1280_2560
 * ATmega1280					ATMEGA640_1280_2560
 * ATmega1281					ATMEGA640_1280_2560
 * ATmega2560					ATMEGA640_1280_2560
 * ATmega2561					ATMEGA640_1280_2560
 * ATmega162					ATMEGA162
 * ATmega165A					ATMEGA169
 * ATmega165P					ATMEGA169
 * ATmega165PA					ATMEGA169
 * ATmega169					ATMEGA169
 * ATmega169A					ATMEGA169
 * ATmega169P					ATMEGA169
 * ATmega169PA					ATMEGA169
 * ATmega325A					ATMEGA329_649
 * ATmega325P					ATMEGA329_649
 * ATmega325PA					ATMEGA329_649
 * ATmega3250A					ATMEGA329_649
 * ATmega3250P					ATMEGA329_649
 * ATmega3250PA					ATMEGA329_649
 * ATmega329					ATMEGA329_649
 * ATmega329A					ATMEGA329_649
 * ATmega329P					ATMEGA329_649
 * ATmega329PA					ATMEGA329_649
 * ATmega3290A					ATMEGA329_649
 * ATmega3290P					ATMEGA329_649
 * ATmega3290PA					ATMEGA329_649
 * ATmega645A					ATMEGA329_649
 * ATmega645P					ATMEGA329_649
 * ATmega6450A					ATMEGA329_649
 * ATmega6450P					ATMEGA329_649
 * ATmega649					ATMEGA329_649
 * ATmega6490					ATMEGA329_649
 * ATmega649A					ATMEGA329_649
 * ATmega649P					ATMEGA329_649
 * ATmega6490A					ATMEGA329_649
 * ATmega6490P					ATMEGA329_649
 * ATmega48                     ATMEGA48_88_168
 * ATmega48A					ATMEGA48_88_168
 * ATmega88                     ATMEGA48_88_168
 * ATmega88A					ATMEGA48_88_168
 * ATmega168					ATMEGA48_88_168
 * ATmega168A					ATMEGA48_88_168
 * ATmega48P					ATMEGA48_88_168
 * ATmega48PA					ATMEGA48_88_168
 * ATmega88P					ATMEGA48_88_168
 * ATmega88PA					ATMEGA48_88_168
 * ATmega168P					ATMEGA48_88_168
 * ATmega168PA					ATMEGA48_88_168
 * ATmega164A					ATMEGA164_324_644_1284
 * ATmega164P					ATMEGA164_324_644_1284
 * ATmega164PA					ATMEGA164_324_644_1284
 * ATmega324A					ATMEGA164_324_644_1284
 * ATmega324P					ATMEGA164_324_644_1284
 * ATmega324PA					ATMEGA164_324_644_1284
 * ATmega644A					ATMEGA164_324_644_1284
 * ATmega644P					ATMEGA164_324_644_1284
 * ATmega644PA					ATMEGA164_324_644_1284
 * ATmega1284P					ATMEGA164_324_644_1284
 */

 #define F_CPU 1000000UL
 
 #include <avr/io.h>
 #include <util/delay.h>

 // Select your define from the list above
 #define ATMEGA64_128

 /*============================ ATMEGA48_88_168 ================================*/
 #ifdef ATMEGA48_88_168
 int main( void )
 {
 // Crystal clock will be output on PORTB3 (divided by 2)
 DDRB |= (1<<PORTB3);

 // Enable CTC mode with toggle on compare match. Precale 1 and top at 0
 OCR2A  =  0;
 TCCR2A = (0<<COM2A1)|(1<<COM2A0)|(1<<WGM21)|(0<<WGM20);
 TCCR2B = (0<<WGM22)|(0<<CS22)|(0<<CS21)|(1<<CS20);
 ASSR   = (1<<AS2);

 while(1){}
 }
 #endif

 /*============================ ATMEGA8 ========================================*/
 #ifdef ATMEGA8
 int main( void )
 {
 // Crystal clock will be output on PORTB3 (divided by 2)
 DDRB |= (1<<PORTB3);
 
 // Enable CTC mode with toggle on compare match. Precale 1 and top at 0
 OCR2 = 0;
 TCCR2 = (0<<COM21)|(1<<COM20)|(1<<WGM21)|(0<<WGM20)|(0<<CS22)|(0<<CS21)|(1<<CS20);
 ASSR = (1<<AS2);

 while(1){}
 }
 #endif

 /*============================ ATMEGA16_32 ====================================*/
 #ifdef ATMEGA16_32
 int main( void )
 {
 // Crystal clock will be output on PORTD7 (divided by 2)
 DDRD |= (1<<PORTD7);
 
 // Enable CTC mode with toggle on compare match. Precale 1 and top at 0
 OCR2 = 0;
 TCCR2 = (0<<COM21)|(1<<COM20)|(1<<WGM21)|(0<<WGM20)|(0<<CS22)|(0<<CS21)|(1<<CS20);
 ASSR = (1<<AS2);

 while(1){}
 }
 #endif

 /*============================ ATMEGA64_128 ===================================*/
 #ifdef ATMEGA64_128
 int main( void )
 {
 // Crystal clock will be output on PORTB4 (divided by 2)
 DDRB |= (1<<4);
 
 // Enable CTC mode with toggle on compare match. Precale 1 and top at 0
 //ASSR = (1<<AS0);
 OCR0 = 0;
 TCCR0 = (0<<COM01)|(1<<COM00)|(1<<WGM01)|(0<<WGM00)|(0<<CS02)|(0<<CS01)|(1<<CS00);

 while(1){}
 }
 #endif

 /*============================ ATMEGA640_1280_2560 =============================*/
 #ifdef ATMEGA640_1280_2560
 int main( void )
 {
 // Crystal clock will be output on PORTB4 (divided by 2)
 DDRB |= (1<<PORTB4);
 
 // Enable CTC mode with toggle on compare match. Precale 1 and top at 0
 OCR2A = 0;
 TCCR2A = (0<<COM2A1)|(1<<COM2A0)|(1<<WGM21)|(0<<WGM20);
 TCCR2B = (0<<WGM22)|(0<<CS22)|(0<<CS21)|(1<<CS20);

 ASSR = (1<<AS2);

 while(1){}
 }
 #endif

 /*============================ ATMEGA162 ======================================*/
 #ifdef ATMEGA162
 int main( void )
 {
 // Crystal clock will be output on PORTB1 (divided by 2)
 DDRB |= (1<<PORTB1);
 
 // Enable CTC mode with toggle on compare match. Precale 1 and top at 0
 OCR0 = 0;
 TCCR2 = (0<<COM21)|(1<<COM20)|(1<<WGM21)|(0<<WGM20)|(0<<CS22)|(0<<CS21)|(1<<CS20);
 ASSR = (1<<AS2);

 while(1){}
 }
 #endif

 /*============================ ATMEGA169 ======================================*/
 #ifdef ATMEGA169
 int main( void )
 {
 // Crystal clock will be output on PORTB7 (divided by 2)
 DDRB |= (1<<PORTB7);
 
 // Enable CTC mode with toggle on compare match. Precale 1 and top at 0
 OCR2A  =  0;
 TCCR2A = (0<<COM2A1)|(1<<COM2A0)|(1<<WGM21)|(0<<WGM20)|(0<<CS22)|(0<<CS21)|(1<<CS20);
 ASSR   = (1<<AS2);

 while(1){}
 }
 #endif

 /*============================ ATMEGA329_649 =================================*/
 #ifdef ATMEGA329_649
 int main( void )
 {
 // Crystal clock will be output on PORTB7 (divided by 2)
 DDRB |= (1<<PORTB7);
 
 // Enable CTC mode with toggle on compare match. Precale 1 and top at 0
 OCR2A  =  0;
 TCCR2A = (0<<COM2A1)|(1<<COM2A0)|(1<<WGM21)|(0<<WGM20)|(0<<CS22)|(0<<CS21)|(1<<CS20);
 ASSR   = (1<<AS2);

 while(1){}
 }
 #endif

 /*============================ ATMEGA164_324_644_1284 ========================*/
 #ifdef ATMEGA164_324_644_1284
 int main( void )
 {
 // Crystal clock will be output on PORTB4 (divided by 2)
 DDRD |= (1<<PORTD7);
 
 // Enable CTC mode with toggle on compare match. Precale 1 and top at 0
 OCR2A = 0;
 TCCR2A = (0<<COM2A1)|(1<<COM2A0)|(1<<WGM21)|(0<<WGM20);
 TCCR2B = (0<<WGM22)|(0<<CS22)|(0<<CS21)|(1<<CS20);

 ASSR = (1<<AS2);

 while(1){}
 }
 #endif







 