# Import source files
file copy -force "./src/softconsole/MiV_uart_blinky.hex" "./$Prjname/MiV_uart_blinky.hex"



build_design_hierarchy 
# Create, configure and generate core components

source ./src/components/CORERESET_PF_C0.tcl
source ./src/components/PF_CCC_C0.tcl
source ./src/components/MIV_ESS_C0.tcl
source ./src/components/PF_INIT_MONITOR_C0.tcl
source ./src/components/COREJTAGDEBUG_C0.tcl
source ./src/components/CORETSE_C0.tcl
source ./src/components/MIV_RV32_C0.tcl
source ./src/components/PF_RGMII_TO_GMII_C0.tcl

file copy -force "./src/hdl/miv_rv32_subsys_pkg.v" "./$Prjname/component/Microsemi/MiV/MIV_RV32/$MIV_RV32ver/pkg/miv_rv32_subsys_pkg.v"

# Generate SmartDesign Components
build_design_hierarchy 
source ./src/components/top.tcl

# Set top level module
build_design_hierarchy 
set_root -module {top::work} 

save_project
puts "Design generated successfully\n"
