#Cores required to run this design
set CoreAPB3ver {4.2.100}
set COREABCver {4.1.111}
set RTG4FDDRCver {2.0.200}
set CoreGPIOver {3.2.102}
set PCIE_SERDES_IFver {2.0.200}
set COREAXIver {3.2.101}
set RTG4FCCCver {2.0.204}
set RTG4FCCCECALIBver {2.2.100} 
set RTG4TPSRAMver {1.1.110}





