# Creating SmartDesign "top"
set sd_name {top}
create_smartdesign -sd_name ${sd_name}

# Disable auto promotion of pins of type 'pad'
auto_promote_pad_pins -promote_all 0

# Create top level Scalar Ports
sd_create_scalar_port -sd_name ${sd_name} -port_name {DEVRST_N} -port_direction {IN} -port_is_pad {1}
sd_create_scalar_port -sd_name ${sd_name} -port_name {LD} -port_direction {IN}
sd_create_scalar_port -sd_name ${sd_name} -port_name {PLL_POWERDOWN_N} -port_direction {IN}

sd_create_scalar_port -sd_name ${sd_name} -port_name {LED_1} -port_direction {OUT}
sd_create_scalar_port -sd_name ${sd_name} -port_name {LED_2} -port_direction {OUT}
sd_create_scalar_port -sd_name ${sd_name} -port_name {LED_3} -port_direction {OUT}
sd_create_scalar_port -sd_name ${sd_name} -port_name {LED_4} -port_direction {OUT}


# Create top level Bus Ports
sd_create_bus_port -sd_name ${sd_name} -port_name {DIN} -port_direction {IN} -port_range {[15:0]}

sd_create_bus_port -sd_name ${sd_name} -port_name {DOUT} -port_direction {OUT} -port_range {[15:0]}


# Add AND2_0 instance
sd_instantiate_macro -sd_name ${sd_name} -macro_name {AND2} -instance_name {AND2_0}



# Add Fabric_Logic_0 instance
sd_instantiate_hdl_module -sd_name ${sd_name} -hdl_module_name {Fabric_Logic} -hdl_file {hdl\Fabric_Logic.vhd} -instance_name {Fabric_Logic_0}



# Add RCOSC_50MHZ_0 instance
sd_instantiate_macro -sd_name ${sd_name} -macro_name {RCOSC_50MHZ} -instance_name {RCOSC_50MHZ_0}



# Add RTG4FCCC_0_0 instance
sd_instantiate_component -sd_name ${sd_name} -component_name {RTG4FCCC_0} -instance_name {RTG4FCCC_0_0}



# Add RTG4FCCCECALIB_C0_0 instance
sd_instantiate_component -sd_name ${sd_name} -component_name {RTG4FCCCECALIB_C0} -instance_name {RTG4FCCCECALIB_C0_0}
sd_connect_pins_to_constant -sd_name ${sd_name} -pin_names {RTG4FCCCECALIB_C0_0:READY_VDDPLL} -value {VCC}



# Add SYSRESET_0 instance
sd_instantiate_macro -sd_name ${sd_name} -macro_name {SYSRESET} -instance_name {SYSRESET_0}



# Add scalar net connections
sd_connect_pins -sd_name ${sd_name} -pin_names {"AND2_0:A" "PLL_POWERDOWN_N" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"AND2_0:B" "SYSRESET_0:POWER_ON_RESET_N" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"AND2_0:Y" "RTG4FCCCECALIB_C0_0:CCC_0_PLL_POWERDOWN_N" "RTG4FCCCECALIB_C0_0:PLL_RST_N" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"DEVRST_N" "SYSRESET_0:DEVRST_N" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"Fabric_Logic_0:CLK" "RTG4FCCCECALIB_C0_0:CCC_0_GL0" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"Fabric_Logic_0:LD" "LD" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"Fabric_Logic_0:LED_1" "LED_1" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"Fabric_Logic_0:LED_2" "LED_2" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"Fabric_Logic_0:LED_3" "LED_3" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"Fabric_Logic_0:LED_4" "LED_4" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"Fabric_Logic_0:RST" "RTG4FCCCECALIB_C0_0:CCC_0_LOCK" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"RCOSC_50MHZ_0:CLKOUT" "RTG4FCCCECALIB_C0_0:CCC_0_RCOSC_50MHZ" "RTG4FCCC_0_0:RCOSC_50MHZ" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"RTG4FCCCECALIB_C0_0:CLK_50MHZ" "RTG4FCCC_0_0:GL0" }

# Add bus net connections
sd_connect_pins -sd_name ${sd_name} -pin_names {"DIN" "Fabric_Logic_0:DIN" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"DOUT" "Fabric_Logic_0:DOUT" }


# Re-enable auto promotion of pins of type 'pad'
auto_promote_pad_pins -promote_all 1
# Save the SmartDesign 
save_smartdesign -sd_name ${sd_name}
# Generate SmartDesign "top"
generate_component -component_name ${sd_name}
