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rtg4_an4751_df
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This is the RTG4 SpaceWire App Note AN4751 (previously AC444) hardware demo design delivered as Tcl Script files.
The design targets the RT4G150-CG1657 PROTO device on the RTG4-DEV-KIT running the SpaceWire RX interface at 90MHz.

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Tcl Script Directory Structure
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The hardware demo design Tcl script directory is organized as shown below:

    HW
    |
    |----common(folder)
    |       |
    |       |----common.tcl
    |
    |----src (folder)
    |	  |
    |	  |----components (folder)
    |	  |----constraints (folder)
    |	  |----hdl (folder)
    |	  |----stimulus (folder)
    |	  |
    |	  |----1_create_design.tcl
    |	  |----2_constrain_design.tcl
    |	  |----3_sim_flow.tcl
    |	  |----4_implement_design.tcl
    |	  |----5_program_design.tcl
    |	  
    |----script.tcl
    |----TCL_Script_readme.txt 	<---(THIS file)
    
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Tcl Script folders
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HW/src folder contains the following sub-folders:

* components: contains core and SmartDesign component configuration Tcl scripts to re-create the design
* constraints: contains I/O, timing, and floor-planning constraint files
* hdl: contains HDL source files
* stimulus: contains simulation files, such as wave.do.  For this design, the testbench is created in SmartDesign.


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Tcl Script files
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HW/src/ contains the following Tcl script files:

* 1_create_design.tcl: Executes Libero SoC commands to re-create the design hierarchy including IP cores, HDL source, and SmartDesign components.
* 2_constrain_design.tcl: Imports and derives the constraints required for the design.
* 3_sim_flow.tcl: Generates SmartDesign testbench, imports simulation files, configures simulation settings, and runs pre-synthesis simulation.
* 4_implement_design.tcl: Executes Synthesis, Place & Route, and Verify Timing design flow steps.
* 5_program_design.tcl: Generates and exports design programming files.

HW/common/ contains the following Tcl script files:
* common.tcl: Specifies IP core versions required to implement the design

HW/ contains the following files and Tcl scripts:
* script.tcl: This is the top-level script the user executes in Libero SoC to generate the Libero_Project and re-create the hardware demo design from the provided sources and sub-scripts.
* TCL_Script_readme.txt: THIS file.


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Running the Tcl Script
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The Tcl scripts are validated using Libero® SoC v2025.1 and the IP core versions specified in common.tcl. 

To run the TCL:
1. Launch Libero v2025.1
2. Select Project > Execute Script.... 
3. Click Browse and select script.tcl from the downloaded design file directory
4. Click Run

Note: Ensure the cores required to run the script are present in the Libero SoC IP Catalog.  If they are not, please download the cores from the Web Repositories or download the Libero v2025.1 IP MegaVault. Refer to common.tcl for the IP cores and specific versions used in this design.

After successful execution of the Tcl script, the Libero project is created in the rtg4_an4751_df/Libero_Project/ folder.

To change the project output location, update the "Prj_Location" variable in the script.tcl file with the desired folder path.

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Updating to New Libero SoC or IP Core Versions
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Update the IP Core versions in the common.tcl file and run the Tcl flow in the new Libero version. 
By default, the provided Tcl scripts should be compatible with new Libero and IP releases, unless otherwise noted in the Libero SoC or IP Core release notes.

When upgrading the script, if there are any mismatches in execution, check the following:
1. For Libero related errors, check Libero release notes for changes related to the design components/tools or changes to Tcl commands.
2. For IP core related errors, check the IP core handbook and release notes for changes in IP configuration parameters, ports and their functionality. If necessary, update the IP configuration parameters, ports and connections in the Tcl scripts.  Cores directly bundled with Libero SoC describe the core changes directly in the Libero SoC release notes.

Refer to Libero® SoC Tcl Command Reference Guide for more details on Tcl commands. 

For any additional queries, contact Microchip Technical Support: https://www.microchip.com/support


