Synopsys Generic Technology Pre-mapping, Version mapact, Build 1659R, Built Dec 10 2015 09:44:42
Copyright (C) 1994-2015, Synopsys, Inc. This software and the associated documentation are proprietary to Synopsys, Inc. This software may only be used in accordance with the terms and conditions of a written license agreement with Synopsys, Inc.  All other use, reproduction, or distribution of this software is strictly prohibited.
Product Version J-2015.03M-SP1-2

Mapper Startup Complete (Real Time elapsed 0h:00m:00s; CPU Time elapsed 0h:00m:00s; Memory used current: 99MB peak: 100MB)

Linked File: vga_display_top_top_scck.rpt
Printing clock  summary report in "D:\SVN_Video_repository\Releases\camera\New_IPs\11.7_test\cam_vita2k_displayCtrl_with_new_cam_v22\cam_vita2k\synthesis\vga_display_top_top_scck.rpt" file 
@N:MF248 :  | Running in 64-bit mode. 
@N:MF667 :  | Clock conversion disabled  

Design Input Complete (Real Time elapsed 0h:00m:00s; CPU Time elapsed 0h:00m:00s; Memory used current: 153MB peak: 164MB)


Mapper Initialization Complete (Real Time elapsed 0h:00m:00s; CPU Time elapsed 0h:00m:00s; Memory used current: 153MB peak: 164MB)


Start loading timing files (Real Time elapsed 0h:00m:00s; CPU Time elapsed 0h:00m:00s; Memory used current: 154MB peak: 164MB)


Finished loading timing files (Real Time elapsed 0h:00m:00s; CPU Time elapsed 0h:00m:00s; Memory used current: 154MB peak: 164MB)

@W:BN132 : video_timing_generator.v(197) | Removing sequential instance display_controller_0.video_timing_generator_0.disp_cont_busy_o,  because it is equivalent to instance display_controller_0.video_timing_generator_0.start_ddr_read
@W:BN132 : display_enhancements.v(388) | Removing sequential instance Display_Enhancements_0.contrast_i_regY1[0],  because it is equivalent to instance Display_Enhancements_0.contrast_i_reg1[0]
@W:BN132 : display_enhancements.v(388) | Removing sequential instance Display_Enhancements_0.contrast_i_regY1[1],  because it is equivalent to instance Display_Enhancements_0.contrast_i_reg1[1]
@W:BN132 : display_enhancements.v(388) | Removing sequential instance Display_Enhancements_0.contrast_i_regY1[2],  because it is equivalent to instance Display_Enhancements_0.contrast_i_reg1[2]
@W:BN132 : display_enhancements.v(388) | Removing sequential instance Display_Enhancements_0.contrast_i_regY1[3],  because it is equivalent to instance Display_Enhancements_0.contrast_i_reg1[3]
@W:BN132 : display_enhancements.v(388) | Removing sequential instance Display_Enhancements_0.contrast_i_regY1[4],  because it is equivalent to instance Display_Enhancements_0.contrast_i_reg1[4]
@W:BN132 : display_enhancements.v(388) | Removing sequential instance Display_Enhancements_0.contrast_i_regY1[5],  because it is equivalent to instance Display_Enhancements_0.contrast_i_reg1[5]
@W:BN132 : display_enhancements.v(388) | Removing sequential instance Display_Enhancements_0.contrast_i_regY1[6],  because it is equivalent to instance Display_Enhancements_0.contrast_i_reg1[6]
@W:BN132 : display_enhancements.v(388) | Removing sequential instance Display_Enhancements_0.contrast_i_regY1[7],  because it is equivalent to instance Display_Enhancements_0.contrast_i_reg1[8]
@W:BN132 : display_enhancements.v(388) | Removing sequential instance Display_Enhancements_0.contrast_i_reg1[8],  because it is equivalent to instance Display_Enhancements_0.contrast_i_reg1[7]
@N:BN362 : cdcfifo.v(111) | Removing sequential instance wrfull of view:PrimLib.dffr(prim) in hierarchy view:work.cdcfifo_4294967289s_32s_1_3(verilog) because there are no references to its outputs 
@N:BN362 : cdcfifo.v(205) | Removing sequential instance rdusedw[8:0] of view:PrimLib.dffr(prim) in hierarchy view:work.cdcfifo_4294967289s_32s_1_3(verilog) because there are no references to its outputs 
@N:BN362 : ar0331_parallel_if.v(216) | Removing sequential instance Image_Frame_vld_o of view:PrimLib.dffr(prim) in hierarchy view:work.AR0331_Parallel_IF(verilog) because there are no references to its outputs 
@N:BN362 : async_fifo_display.v(345) | Removing sequential instance wafull of view:PrimLib.dffr(prim) in hierarchy view:work.video_fifo_13s_24s_2048s_3840s_5900s_10s(verilog) because there are no references to its outputs 
@N:BN362 : async_fifo_display.v(331) | Removing sequential instance wdata_count[12:0] of view:PrimLib.dffr(prim) in hierarchy view:work.video_fifo_13s_24s_2048s_3840s_5900s_10s(verilog) because there are no references to its outputs 
@N:BN362 : async_fifo_display.v(227) | Removing sequential instance raempty of view:PrimLib.dffs(prim) in hierarchy view:work.video_fifo_13s_24s_2048s_3840s_5900s_10s(verilog) because there are no references to its outputs 
@N:BN362 : async_fifo_display.v(212) | Removing sequential instance rdata_count[12:0] of view:PrimLib.dffr(prim) in hierarchy view:work.video_fifo_13s_24s_2048s_3840s_5900s_10s(verilog) because there are no references to its outputs 
@N:BN362 : coreconfigp.v(461) | Removing sequential instance FDDR_PENABLE of view:PrimLib.dffr(prim) in hierarchy view:work.CoreConfigP_Z5(verilog) because there are no references to its outputs 
@N:BN362 : coreconfigp.v(461) | Removing sequential instance SDIF0_PENABLE of view:PrimLib.dffr(prim) in hierarchy view:work.CoreConfigP_Z5(verilog) because there are no references to its outputs 
@N:BN362 : coreconfigp.v(461) | Removing sequential instance SDIF1_PENABLE of view:PrimLib.dffr(prim) in hierarchy view:work.CoreConfigP_Z5(verilog) because there are no references to its outputs 
@N:BN362 : coreconfigp.v(461) | Removing sequential instance SDIF2_PENABLE of view:PrimLib.dffr(prim) in hierarchy view:work.CoreConfigP_Z5(verilog) because there are no references to its outputs 
@N:BN362 : coreconfigp.v(461) | Removing sequential instance SDIF3_PENABLE of view:PrimLib.dffr(prim) in hierarchy view:work.CoreConfigP_Z5(verilog) because there are no references to its outputs 
@N:BN362 : coreresetp.v(1089) | Removing sequential instance SDIF_READY_int of view:PrimLib.dffre(prim) in hierarchy view:work.CoreResetP_Z6(verilog) because there are no references to its outputs 
@N:BN362 : coreresetp.v(1089) | Removing sequential instance SDIF_RELEASED_int of view:PrimLib.dffre(prim) in hierarchy view:work.CoreResetP_Z6(verilog) because there are no references to its outputs 
@N:BN362 : rgb2ycbcr.v(333) | Removing sequential instance Cb_out_o[7:0] of view:PrimLib.dffpatr(prim) in hierarchy view:work.RGB2YCbCr_Z21_1(verilog) because there are no references to its outputs 
@N:BN362 : rgb2ycbcr.v(333) | Removing sequential instance Cr_out_o[7:0] of view:PrimLib.dffpatr(prim) in hierarchy view:work.RGB2YCbCr_Z21_1(verilog) because there are no references to its outputs 
@N:BN362 : rgb2ycbcr.v(333) | Removing sequential instance horz_sync_o[0] of view:PrimLib.dffr(prim) in hierarchy view:work.RGB2YCbCr_Z21_1(verilog) because there are no references to its outputs 
@N:BN362 : rgb2ycbcr.v(333) | Removing sequential instance vert_sync_o[0] of view:PrimLib.dffr(prim) in hierarchy view:work.RGB2YCbCr_Z21_1(verilog) because there are no references to its outputs 
@N:BN362 : rgb2ycbcr.v(333) | Removing sequential instance hactive_o[0] of view:PrimLib.dffr(prim) in hierarchy view:work.RGB2YCbCr_Z21_1(verilog) because there are no references to its outputs 
@N:BN362 : rgb2ycbcr.v(333) | Removing sequential instance vactive_o[0] of view:PrimLib.dffr(prim) in hierarchy view:work.RGB2YCbCr_Z21_1(verilog) because there are no references to its outputs 
@N:BN362 : rgb2ycbcr.v(333) | Removing sequential instance horz_sync_o[0] of view:PrimLib.dffr(prim) in hierarchy view:work.RGB2YCbCr_Z21_0(verilog) because there are no references to its outputs 
@N:BN362 : rgb2ycbcr.v(333) | Removing sequential instance vert_sync_o[0] of view:PrimLib.dffr(prim) in hierarchy view:work.RGB2YCbCr_Z21_0(verilog) because there are no references to its outputs 
@N:BN362 : rgb2ycbcr.v(333) | Removing sequential instance hactive_o[0] of view:PrimLib.dffr(prim) in hierarchy view:work.RGB2YCbCr_Z21_0(verilog) because there are no references to its outputs 
@N:BN362 : rgb2ycbcr.v(333) | Removing sequential instance vactive_o[0] of view:PrimLib.dffr(prim) in hierarchy view:work.RGB2YCbCr_Z21_0(verilog) because there are no references to its outputs 
@N:BN362 : ycbcr2rgb.v(435) | Removing sequential instance horz_sync_o[0] of view:PrimLib.dffr(prim) in hierarchy view:work.YCbCr2RGB(verilog) because there are no references to its outputs 
@N:BN362 : ycbcr2rgb.v(435) | Removing sequential instance vert_sync_o[0] of view:PrimLib.dffr(prim) in hierarchy view:work.YCbCr2RGB(verilog) because there are no references to its outputs 
@N:BN362 : ycbcr2rgb.v(435) | Removing sequential instance hactive_o[0] of view:PrimLib.dffr(prim) in hierarchy view:work.YCbCr2RGB(verilog) because there are no references to its outputs 
@N:BN362 : ycbcr2rgb.v(435) | Removing sequential instance vactive_o[0] of view:PrimLib.dffr(prim) in hierarchy view:work.YCbCr2RGB(verilog) because there are no references to its outputs 
@N:BN362 : apb_wrapper.v(87) | Removing sequential instance B1_mem_addr[4:0] of view:PrimLib.dffre(prim) in hierarchy view:work.APB_WRAPPER_32s_32s_8s_9s_10s_5s(verilog) because there are no references to its outputs 
@N:BN362 : apb_wrapper.v(87) | Removing sequential instance B2_mem_addr[4:0] of view:PrimLib.dffre(prim) in hierarchy view:work.APB_WRAPPER_32s_32s_8s_9s_10s_5s(verilog) because there are no references to its outputs 
@N:BN362 : apb_wrapper.v(87) | Removing sequential instance B1_write_en of view:PrimLib.dffr(prim) in hierarchy view:work.APB_WRAPPER_32s_32s_8s_9s_10s_5s(verilog) because there are no references to its outputs 
@N:BN362 : apb_wrapper.v(87) | Removing sequential instance B2_write_en of view:PrimLib.dffr(prim) in hierarchy view:work.APB_WRAPPER_32s_32s_8s_9s_10s_5s(verilog) because there are no references to its outputs 
@N:BN362 : apb_wrapper.v(87) | Removing sequential instance B1_value[31:0] of view:PrimLib.dffre(prim) in hierarchy view:work.APB_WRAPPER_32s_32s_8s_9s_10s_5s(verilog) because there are no references to its outputs 
@N:BN362 : apb_wrapper.v(87) | Removing sequential instance B2_value[31:0] of view:PrimLib.dffre(prim) in hierarchy view:work.APB_WRAPPER_32s_32s_8s_9s_10s_5s(verilog) because there are no references to its outputs 
@N:BN362 : coreresetp.v(1170) | Removing sequential instance SDIF0_PHY_RESET_N_int of view:PrimLib.dffre(prim) in hierarchy view:work.CoreResetP_Z6(verilog) because there are no references to its outputs 
@N:BN362 : coreresetp.v(1170) | Removing sequential instance SDIF0_CORE_RESET_N_0 of view:PrimLib.dffre(prim) in hierarchy view:work.CoreResetP_Z6(verilog) because there are no references to its outputs 
@N:BN362 : coreresetp.v(1235) | Removing sequential instance SDIF1_PHY_RESET_N_int of view:PrimLib.dffre(prim) in hierarchy view:work.CoreResetP_Z6(verilog) because there are no references to its outputs 
@N:BN362 : coreresetp.v(1235) | Removing sequential instance SDIF1_CORE_RESET_N_0 of view:PrimLib.dffre(prim) in hierarchy view:work.CoreResetP_Z6(verilog) because there are no references to its outputs 
@N:BN362 : coreresetp.v(1300) | Removing sequential instance SDIF2_PHY_RESET_N_int of view:PrimLib.dffre(prim) in hierarchy view:work.CoreResetP_Z6(verilog) because there are no references to its outputs 
@N:BN362 : coreresetp.v(1300) | Removing sequential instance SDIF2_CORE_RESET_N_0 of view:PrimLib.dffre(prim) in hierarchy view:work.CoreResetP_Z6(verilog) because there are no references to its outputs 
@N:BN362 : coreresetp.v(1365) | Removing sequential instance SDIF3_PHY_RESET_N_int of view:PrimLib.dffre(prim) in hierarchy view:work.CoreResetP_Z6(verilog) because there are no references to its outputs 
@N:BN362 : coreresetp.v(1365) | Removing sequential instance SDIF3_CORE_RESET_N_0 of view:PrimLib.dffre(prim) in hierarchy view:work.CoreResetP_Z6(verilog) because there are no references to its outputs 
@N:BN362 : axi_displ_master_read.v(171) | Removing sequential instance master_rd_req of view:PrimLib.dffre(prim) in hierarchy view:work.AXI_displ_master_read_Z8(verilog) because there are no references to its outputs 
@N:BN362 : axi_master_read.v(171) | Removing sequential instance master_rd_req of view:PrimLib.dffre(prim) in hierarchy view:work.AXI_master_read_Z11_0(verilog) because there are no references to its outputs 
@N:BN362 : axi_master_read.v(171) | Removing sequential instance master_rd_req of view:PrimLib.dffre(prim) in hierarchy view:work.AXI_master_read_Z11_1(verilog) because there are no references to its outputs 
@N:BN362 : axi_master_read.v(171) | Removing sequential instance master_rd_req of view:PrimLib.dffre(prim) in hierarchy view:work.AXI_master_read_Z11_2(verilog) because there are no references to its outputs 
@N:BN362 : axi_master_write_c2.v(210) | Removing sequential instance master_wr_req of view:PrimLib.dffre(prim) in hierarchy view:work.AXI_master_write_ch_Z15_0(verilog) because there are no references to its outputs 
@N:BN362 : axi_master_write_c2.v(210) | Removing sequential instance master_wr_req of view:PrimLib.dffre(prim) in hierarchy view:work.AXI_master_write_ch_Z15_1(verilog) because there are no references to its outputs 
@N:BN362 : ddr_displ_read_contrl .v(348) | Removing sequential instance rd_burst_split of view:PrimLib.dffre(prim) in hierarchy view:work.ddr_displ_read_contrl_Z9(verilog) because there are no references to its outputs 
@N:BN362 : rgb2ycbcr.v(303) | Removing sequential instance Cb_mas[22:15] of view:PrimLib.dffr(prim) in hierarchy view:work.RGB2YCbCr_Z21_1(verilog) because there are no references to its outputs 
@N:BN362 : rgb2ycbcr.v(303) | Removing sequential instance Cr_mas[22:15] of view:PrimLib.dffr(prim) in hierarchy view:work.RGB2YCbCr_Z21_1(verilog) because there are no references to its outputs 
@N:BN362 : rgb2ycbcr.v(333) | Removing sequential instance hsync_d4[0] of view:PrimLib.dffr(prim) in hierarchy view:work.RGB2YCbCr_Z21_1(verilog) because there are no references to its outputs 
@N:BN362 : rgb2ycbcr.v(333) | Removing sequential instance vsync_d4[0] of view:PrimLib.dffr(prim) in hierarchy view:work.RGB2YCbCr_Z21_1(verilog) because there are no references to its outputs 
@N:BN362 : rgb2ycbcr.v(333) | Removing sequential instance hactive_d4[0] of view:PrimLib.dffr(prim) in hierarchy view:work.RGB2YCbCr_Z21_1(verilog) because there are no references to its outputs 
@N:BN362 : rgb2ycbcr.v(333) | Removing sequential instance vactive_d4[0] of view:PrimLib.dffr(prim) in hierarchy view:work.RGB2YCbCr_Z21_1(verilog) because there are no references to its outputs 
@N:BN362 : rgb2ycbcr.v(333) | Removing sequential instance hsync_d4[0] of view:PrimLib.dffr(prim) in hierarchy view:work.RGB2YCbCr_Z21_0(verilog) because there are no references to its outputs 
@N:BN362 : rgb2ycbcr.v(333) | Removing sequential instance vsync_d4[0] of view:PrimLib.dffr(prim) in hierarchy view:work.RGB2YCbCr_Z21_0(verilog) because there are no references to its outputs 
@N:BN362 : rgb2ycbcr.v(333) | Removing sequential instance hactive_d4[0] of view:PrimLib.dffr(prim) in hierarchy view:work.RGB2YCbCr_Z21_0(verilog) because there are no references to its outputs 
@N:BN362 : rgb2ycbcr.v(333) | Removing sequential instance vactive_d4[0] of view:PrimLib.dffr(prim) in hierarchy view:work.RGB2YCbCr_Z21_0(verilog) because there are no references to its outputs 
@N:BN362 : ycbcr2rgb.v(435) | Removing sequential instance hsync_d5[0] of view:PrimLib.dffr(prim) in hierarchy view:work.YCbCr2RGB(verilog) because there are no references to its outputs 
@N:BN362 : ycbcr2rgb.v(435) | Removing sequential instance vsync_d5[0] of view:PrimLib.dffr(prim) in hierarchy view:work.YCbCr2RGB(verilog) because there are no references to its outputs 
@N:BN362 : ycbcr2rgb.v(435) | Removing sequential instance hactive_d5[0] of view:PrimLib.dffr(prim) in hierarchy view:work.YCbCr2RGB(verilog) because there are no references to its outputs 
@N:BN362 : ycbcr2rgb.v(435) | Removing sequential instance vactive_d5[0] of view:PrimLib.dffr(prim) in hierarchy view:work.YCbCr2RGB(verilog) because there are no references to its outputs 
@N:BN362 : alpha_blend_control.v(921) | Removing sequential instance s_frame_line_done_4_[0] of view:PrimLib.dffr(prim) in hierarchy view:work.alpha_blend_control(verilog) because there are no references to its outputs 
@N:BN362 : alpha_blend_control.v(967) | Removing sequential instance s_alpha_proc_done_5_[0] of view:PrimLib.dffr(prim) in hierarchy view:work.alpha_blend_control(verilog) because there are no references to its outputs 
@N:BN362 : rgb2ycbcr.v(333) | Removing sequential instance hsync_d3[0] of view:PrimLib.dffr(prim) in hierarchy view:work.RGB2YCbCr_Z21_1(verilog) because there are no references to its outputs 
@N:BN362 : rgb2ycbcr.v(333) | Removing sequential instance vsync_d3[0] of view:PrimLib.dffr(prim) in hierarchy view:work.RGB2YCbCr_Z21_1(verilog) because there are no references to its outputs 
@N:BN362 : rgb2ycbcr.v(333) | Removing sequential instance hactive_d3[0] of view:PrimLib.dffr(prim) in hierarchy view:work.RGB2YCbCr_Z21_1(verilog) because there are no references to its outputs 
@N:BN362 : rgb2ycbcr.v(333) | Removing sequential instance vactive_d3[0] of view:PrimLib.dffr(prim) in hierarchy view:work.RGB2YCbCr_Z21_1(verilog) because there are no references to its outputs 
@N:BN362 : rgb2ycbcr.v(333) | Removing sequential instance hsync_d3[0] of view:PrimLib.dffr(prim) in hierarchy view:work.RGB2YCbCr_Z21_0(verilog) because there are no references to its outputs 
@N:BN362 : rgb2ycbcr.v(333) | Removing sequential instance vsync_d3[0] of view:PrimLib.dffr(prim) in hierarchy view:work.RGB2YCbCr_Z21_0(verilog) because there are no references to its outputs 
@N:BN362 : rgb2ycbcr.v(333) | Removing sequential instance hactive_d3[0] of view:PrimLib.dffr(prim) in hierarchy view:work.RGB2YCbCr_Z21_0(verilog) because there are no references to its outputs 
@N:BN362 : rgb2ycbcr.v(333) | Removing sequential instance vactive_d3[0] of view:PrimLib.dffr(prim) in hierarchy view:work.RGB2YCbCr_Z21_0(verilog) because there are no references to its outputs 
@N:BN362 : ycbcr2rgb.v(435) | Removing sequential instance hsync_d4[0] of view:PrimLib.dffr(prim) in hierarchy view:work.YCbCr2RGB(verilog) because there are no references to its outputs 
@N:BN362 : ycbcr2rgb.v(435) | Removing sequential instance vsync_d4[0] of view:PrimLib.dffr(prim) in hierarchy view:work.YCbCr2RGB(verilog) because there are no references to its outputs 
@N:BN362 : ycbcr2rgb.v(435) | Removing sequential instance hactive_d4[0] of view:PrimLib.dffr(prim) in hierarchy view:work.YCbCr2RGB(verilog) because there are no references to its outputs 
@N:BN362 : ycbcr2rgb.v(435) | Removing sequential instance vactive_d4[0] of view:PrimLib.dffr(prim) in hierarchy view:work.YCbCr2RGB(verilog) because there are no references to its outputs 
@N:BN362 : alpha_blend_control.v(921) | Removing sequential instance s_frame_line_done_3_[0] of view:PrimLib.dffr(prim) in hierarchy view:work.alpha_blend_control(verilog) because there are no references to its outputs 
@N:BN362 : alpha_blend_control.v(967) | Removing sequential instance s_alpha_proc_done_4_[0] of view:PrimLib.dffr(prim) in hierarchy view:work.alpha_blend_control(verilog) because there are no references to its outputs 
@N:BN362 : coreresetp.v(1170) | Removing sequential instance sdif0_state[3:0] of view:PrimLib.statemachine(prim) in hierarchy view:work.CoreResetP_Z6(verilog) because there are no references to its outputs 
@N:BN362 : coreresetp.v(1235) | Removing sequential instance sdif1_state[3:0] of view:PrimLib.statemachine(prim) in hierarchy view:work.CoreResetP_Z6(verilog) because there are no references to its outputs 
@N:BN362 : coreresetp.v(1300) | Removing sequential instance sdif2_state[3:0] of view:PrimLib.statemachine(prim) in hierarchy view:work.CoreResetP_Z6(verilog) because there are no references to its outputs 
@N:BN362 : coreresetp.v(1365) | Removing sequential instance sdif3_state[3:0] of view:PrimLib.statemachine(prim) in hierarchy view:work.CoreResetP_Z6(verilog) because there are no references to its outputs 
@N:BN362 : rgb2ycbcr.v(257) | Removing sequential instance B_regXconstBCb_reg[21:0] of view:PrimLib.dffr(prim) in hierarchy view:work.RGB2YCbCr_Z21_1(verilog) because there are no references to its outputs 
@N:BN362 : rgb2ycbcr.v(257) | Removing sequential instance R_regXconstRCr_reg[21:0] of view:PrimLib.dffr(prim) in hierarchy view:work.RGB2YCbCr_Z21_1(verilog) because there are no references to its outputs 
@N:BN362 : rgb2ycbcr.v(333) | Removing sequential instance hsync_d2[0] of view:PrimLib.dffr(prim) in hierarchy view:work.RGB2YCbCr_Z21_1(verilog) because there are no references to its outputs 
@N:BN362 : rgb2ycbcr.v(333) | Removing sequential instance vsync_d2[0] of view:PrimLib.dffr(prim) in hierarchy view:work.RGB2YCbCr_Z21_1(verilog) because there are no references to its outputs 
@N:BN362 : rgb2ycbcr.v(333) | Removing sequential instance hactive_d2[0] of view:PrimLib.dffr(prim) in hierarchy view:work.RGB2YCbCr_Z21_1(verilog) because there are no references to its outputs 
@N:BN362 : rgb2ycbcr.v(333) | Removing sequential instance vactive_d2[0] of view:PrimLib.dffr(prim) in hierarchy view:work.RGB2YCbCr_Z21_1(verilog) because there are no references to its outputs 
@N:BN362 : rgb2ycbcr.v(333) | Removing sequential instance hsync_d2[0] of view:PrimLib.dffr(prim) in hierarchy view:work.RGB2YCbCr_Z21_0(verilog) because there are no references to its outputs 
@N:BN362 : rgb2ycbcr.v(333) | Removing sequential instance vsync_d2[0] of view:PrimLib.dffr(prim) in hierarchy view:work.RGB2YCbCr_Z21_0(verilog) because there are no references to its outputs 
@N:BN362 : rgb2ycbcr.v(333) | Removing sequential instance hactive_d2[0] of view:PrimLib.dffr(prim) in hierarchy view:work.RGB2YCbCr_Z21_0(verilog) because there are no references to its outputs 
@N:BN362 : rgb2ycbcr.v(333) | Removing sequential instance vactive_d2[0] of view:PrimLib.dffr(prim) in hierarchy view:work.RGB2YCbCr_Z21_0(verilog) because there are no references to its outputs 
@N:BN362 : ycbcr2rgb.v(435) | Removing sequential instance hsync_d3[0] of view:PrimLib.dffr(prim) in hierarchy view:work.YCbCr2RGB(verilog) because there are no references to its outputs 
@N:BN362 : ycbcr2rgb.v(435) | Removing sequential instance vsync_d3[0] of view:PrimLib.dffr(prim) in hierarchy view:work.YCbCr2RGB(verilog) because there are no references to its outputs 
@N:BN362 : ycbcr2rgb.v(435) | Removing sequential instance hactive_d3[0] of view:PrimLib.dffr(prim) in hierarchy view:work.YCbCr2RGB(verilog) because there are no references to its outputs 
@N:BN362 : ycbcr2rgb.v(435) | Removing sequential instance vactive_d3[0] of view:PrimLib.dffr(prim) in hierarchy view:work.YCbCr2RGB(verilog) because there are no references to its outputs 
@N:BN115 : apb_wrapper.v(363) | Removing instance Inst_command_buff0 of view:work.command_buff_1(verilog) because there are no references to its outputs 
@N:BN115 : apb_wrapper.v(375) | Removing instance Inst_command_buff1 of view:work.command_buff_0(verilog) because there are no references to its outputs 
@N:BN362 : ddr_displ_read_contrl .v(348) | Removing sequential instance rd_ack_o of view:PrimLib.dffre(prim) in hierarchy view:work.ddr_displ_read_contrl_Z9(verilog) because there are no references to its outputs 
@N:BN362 : unpack_64_24_displ.v(210) | Removing sequential instance video_data[23:0] of view:PrimLib.dffre(prim) in hierarchy view:work.unpack_64_24_displ_Z10(verilog) because there are no references to its outputs 
@N:BN362 : unpack_64_24_displ.v(210) | Removing sequential instance data_valid of view:PrimLib.dffre(prim) in hierarchy view:work.unpack_64_24_displ_Z10(verilog) because there are no references to its outputs 
@N:BN362 : ddr_read_contrl.v(271) | Removing sequential instance rd_ack_o of view:PrimLib.dffre(prim) in hierarchy view:work.ddr_read_contrl_Z12_0(verilog) because there are no references to its outputs 
@N:BN362 : data_unpack_64_24.v(158) | Removing sequential instance video_data[23:0] of view:PrimLib.dffre(prim) in hierarchy view:work.unpack_64_24_Z13(verilog) because there are no references to its outputs 
@N:BN362 : data_unpack_64_24.v(158) | Removing sequential instance data_valid of view:PrimLib.dffre(prim) in hierarchy view:work.unpack_64_24_Z13(verilog) because there are no references to its outputs 
@N:BN362 : ddr_write_contrl_ch2.v(257) | Removing sequential instance wr_ack_o of view:PrimLib.dffre(prim) in hierarchy view:work.ddr_write_contrl_Z16_0(verilog) because there are no references to its outputs 
@N:BN362 : alpha_blend_control.v(921) | Removing sequential instance s_frame_line_done_2_[0] of view:PrimLib.dffr(prim) in hierarchy view:work.alpha_blend_control(verilog) because there are no references to its outputs 
@N:BN362 : alpha_blend_control.v(967) | Removing sequential instance s_alpha_proc_done_3_[0] of view:PrimLib.dffr(prim) in hierarchy view:work.alpha_blend_control(verilog) because there are no references to its outputs 
@N:BN362 : cdcfifo.v(111) | Removing sequential instance wrusedw_r[8:0] of view:PrimLib.dffr(prim) in hierarchy view:work.cdcfifo_4294967289s_32s_1_3(verilog) because there are no references to its outputs 
@N:BN362 : rgb2ycbcr.v(190) | Removing sequential instance B_regXconstBCb[21:0] of view:PrimLib.dffr(prim) in hierarchy view:work.RGB2YCbCr_Z21_1(verilog) because there are no references to its outputs 
@N:BN362 : rgb2ycbcr.v(257) | Removing sequential instance G_regXconstGCb_reg[21:0] of view:PrimLib.dffr(prim) in hierarchy view:work.RGB2YCbCr_Z21_1(verilog) because there are no references to its outputs 
@N:BN362 : rgb2ycbcr.v(257) | Removing sequential instance R_regXconstRCb_reg[20:1] of view:PrimLib.dffr(prim) in hierarchy view:work.RGB2YCbCr_Z21_1(verilog) because there are no references to its outputs 
@N:BN362 : rgb2ycbcr.v(257) | Removing sequential instance B_regXconstBCr_reg[19:0] of view:PrimLib.dffr(prim) in hierarchy view:work.RGB2YCbCr_Z21_1(verilog) because there are no references to its outputs 
@N:BN362 : rgb2ycbcr.v(257) | Removing sequential instance G_regXconstGCr_reg[21:0] of view:PrimLib.dffr(prim) in hierarchy view:work.RGB2YCbCr_Z21_1(verilog) because there are no references to its outputs 
@N:BN362 : rgb2ycbcr.v(212) | Removing sequential instance R_regXconstRCr[21:0] of view:PrimLib.dffr(prim) in hierarchy view:work.RGB2YCbCr_Z21_1(verilog) because there are no references to its outputs 
@N:BN362 : rgb2ycbcr.v(333) | Removing sequential instance hsync_d1[0] of view:PrimLib.dffr(prim) in hierarchy view:work.RGB2YCbCr_Z21_1(verilog) because there are no references to its outputs 
@N:BN362 : rgb2ycbcr.v(333) | Removing sequential instance vsync_d1[0] of view:PrimLib.dffr(prim) in hierarchy view:work.RGB2YCbCr_Z21_1(verilog) because there are no references to its outputs 
@N:BN362 : rgb2ycbcr.v(333) | Removing sequential instance hactive_d1[0] of view:PrimLib.dffr(prim) in hierarchy view:work.RGB2YCbCr_Z21_1(verilog) because there are no references to its outputs 
@N:BN362 : rgb2ycbcr.v(333) | Removing sequential instance vactive_d1[0] of view:PrimLib.dffr(prim) in hierarchy view:work.RGB2YCbCr_Z21_1(verilog) because there are no references to its outputs 
@N:BN362 : rgb2ycbcr.v(333) | Removing sequential instance hsync_d1[0] of view:PrimLib.dffr(prim) in hierarchy view:work.RGB2YCbCr_Z21_0(verilog) because there are no references to its outputs 
@N:BN362 : rgb2ycbcr.v(333) | Removing sequential instance vsync_d1[0] of view:PrimLib.dffr(prim) in hierarchy view:work.RGB2YCbCr_Z21_0(verilog) because there are no references to its outputs 
@N:BN362 : rgb2ycbcr.v(333) | Removing sequential instance hactive_d1[0] of view:PrimLib.dffr(prim) in hierarchy view:work.RGB2YCbCr_Z21_0(verilog) because there are no references to its outputs 
@N:BN362 : rgb2ycbcr.v(333) | Removing sequential instance vactive_d1[0] of view:PrimLib.dffr(prim) in hierarchy view:work.RGB2YCbCr_Z21_0(verilog) because there are no references to its outputs 
@N:BN362 : ycbcr2rgb.v(435) | Removing sequential instance hsync_d2[0] of view:PrimLib.dffr(prim) in hierarchy view:work.YCbCr2RGB(verilog) because there are no references to its outputs 
@N:BN362 : ycbcr2rgb.v(435) | Removing sequential instance vsync_d2[0] of view:PrimLib.dffr(prim) in hierarchy view:work.YCbCr2RGB(verilog) because there are no references to its outputs 
@N:BN362 : ycbcr2rgb.v(435) | Removing sequential instance hactive_d2[0] of view:PrimLib.dffr(prim) in hierarchy view:work.YCbCr2RGB(verilog) because there are no references to its outputs 
@N:BN362 : ycbcr2rgb.v(435) | Removing sequential instance vactive_d2[0] of view:PrimLib.dffr(prim) in hierarchy view:work.YCbCr2RGB(verilog) because there are no references to its outputs 
@N:BN362 : command_buff.v(29) | Removing sequential instance rd_data_o[31:0] of view:PrimLib.dffe(prim) in hierarchy view:work.command_buff_1(verilog) because there are no references to its outputs 
@N:BN362 : command_buff.v(29) | Removing sequential instance rd_data_o[31:0] of view:PrimLib.dffe(prim) in hierarchy view:work.command_buff_0(verilog) because there are no references to its outputs 
@N:BN362 : alpha_blend_control.v(921) | Removing sequential instance s_frame_line_done_1_[0] of view:PrimLib.dffr(prim) in hierarchy view:work.alpha_blend_control(verilog) because there are no references to its outputs 
@N:BN362 : alpha_blend_control.v(967) | Removing sequential instance s_alpha_proc_done_2_[0] of view:PrimLib.dffr(prim) in hierarchy view:work.alpha_blend_control(verilog) because there are no references to its outputs 
@N:BN362 : coreresetp.v(797) | Removing sequential instance sdif0_areset_n_clk_base of view:PrimLib.dffr(prim) in hierarchy view:work.CoreResetP_Z6(verilog) because there are no references to its outputs 
@N:BN362 : coreresetp.v(811) | Removing sequential instance sdif1_areset_n_clk_base of view:PrimLib.dffr(prim) in hierarchy view:work.CoreResetP_Z6(verilog) because there are no references to its outputs 
@N:BN362 : coreresetp.v(825) | Removing sequential instance sdif2_areset_n_clk_base of view:PrimLib.dffr(prim) in hierarchy view:work.CoreResetP_Z6(verilog) because there are no references to its outputs 
@N:BN362 : coreresetp.v(839) | Removing sequential instance sdif3_areset_n_clk_base of view:PrimLib.dffr(prim) in hierarchy view:work.CoreResetP_Z6(verilog) because there are no references to its outputs 
@N:BN362 : rgb2ycbcr.v(190) | Removing sequential instance G_regXconstGCb[21:0] of view:PrimLib.dffr(prim) in hierarchy view:work.RGB2YCbCr_Z21_1(verilog) because there are no references to its outputs 
@N:BN362 : rgb2ycbcr.v(190) | Removing sequential instance R_regXconstRCb[20:1] of view:PrimLib.dffr(prim) in hierarchy view:work.RGB2YCbCr_Z21_1(verilog) because there are no references to its outputs 
@N:BN362 : rgb2ycbcr.v(212) | Removing sequential instance B_regXconstBCr[19:0] of view:PrimLib.dffr(prim) in hierarchy view:work.RGB2YCbCr_Z21_1(verilog) because there are no references to its outputs 
@N:BN362 : rgb2ycbcr.v(212) | Removing sequential instance G_regXconstGCr[21:0] of view:PrimLib.dffr(prim) in hierarchy view:work.RGB2YCbCr_Z21_1(verilog) because there are no references to its outputs 
@N:BN362 : ycbcr2rgb.v(435) | Removing sequential instance hsync_d1[0] of view:PrimLib.dffr(prim) in hierarchy view:work.YCbCr2RGB(verilog) because there are no references to its outputs 
@N:BN362 : ycbcr2rgb.v(435) | Removing sequential instance vsync_d1[0] of view:PrimLib.dffr(prim) in hierarchy view:work.YCbCr2RGB(verilog) because there are no references to its outputs 
@N:BN362 : ycbcr2rgb.v(435) | Removing sequential instance hactive_d1[0] of view:PrimLib.dffr(prim) in hierarchy view:work.YCbCr2RGB(verilog) because there are no references to its outputs 
@N:BN362 : ycbcr2rgb.v(435) | Removing sequential instance vactive_d1[0] of view:PrimLib.dffr(prim) in hierarchy view:work.YCbCr2RGB(verilog) because there are no references to its outputs 
@N:BN362 : command_buff.v(20) | Removing sequential instance ram[31:0] of view:PrimLib.ram1(prim) in hierarchy view:work.command_buff_1(verilog) because there are no references to its outputs 
@N:BN115 : vga_display_top_top.v(785) | Removing instance PING_PONG_WRAPPER_0 of view:work.PING_PONG_WRAPPER(verilog) because there are no references to its outputs 
@N:BN362 : command_buff.v(20) | Removing sequential instance ram[31:0] of view:PrimLib.ram1(prim) in hierarchy view:work.command_buff_0(verilog) because there are no references to its outputs 
@N:BN362 : unpack_64_24_displ.v(210) | Removing sequential instance residual_pix[15:0] of view:PrimLib.dffre(prim) in hierarchy view:work.unpack_64_24_displ_Z10(verilog) because there are no references to its outputs 
@N:BN362 : data_unpack_64_24.v(158) | Removing sequential instance residual_pix[15:0] of view:PrimLib.dffre(prim) in hierarchy view:work.unpack_64_24_Z13(verilog) because there are no references to its outputs 
@N:BN362 : alpha_blend_control.v(921) | Removing sequential instance s_frame_line_done_0_[0] of view:PrimLib.dffr(prim) in hierarchy view:work.alpha_blend_control(verilog) because there are no references to its outputs 
@N:BN362 : alpha_blend_control.v(967) | Removing sequential instance s_alpha_proc_done_1_[0] of view:PrimLib.dffr(prim) in hierarchy view:work.alpha_blend_control(verilog) because there are no references to its outputs 
@N:BN362 : coreresetp.v(797) | Removing sequential instance sdif0_areset_n_q1 of view:PrimLib.dffr(prim) in hierarchy view:work.CoreResetP_Z6(verilog) because there are no references to its outputs 
@N:BN362 : coreresetp.v(811) | Removing sequential instance sdif1_areset_n_q1 of view:PrimLib.dffr(prim) in hierarchy view:work.CoreResetP_Z6(verilog) because there are no references to its outputs 
@N:BN362 : coreresetp.v(825) | Removing sequential instance sdif2_areset_n_q1 of view:PrimLib.dffr(prim) in hierarchy view:work.CoreResetP_Z6(verilog) because there are no references to its outputs 
@N:BN362 : coreresetp.v(839) | Removing sequential instance sdif3_areset_n_q1 of view:PrimLib.dffr(prim) in hierarchy view:work.CoreResetP_Z6(verilog) because there are no references to its outputs 
@N:BN362 : alpha_blend_control.v(967) | Removing sequential instance s_alpha_proc_done_0_[0] of view:PrimLib.dffr(prim) in hierarchy view:work.alpha_blend_control(verilog) because there are no references to its outputs 
@N:BN362 : unpack_64_24_displ.v(85) | Removing sequential instance buff_data_d[63:0] of view:PrimLib.dffr(prim) in hierarchy view:work.unpack_64_24_displ_Z10(verilog) because there are no references to its outputs 
@N:BN362 : data_unpack_64_24.v(75) | Removing sequential instance buff_data_d[63:0] of view:PrimLib.dffr(prim) in hierarchy view:work.unpack_64_24_Z13(verilog) because there are no references to its outputs 
@N:BN115 : read_channel1_top.v(141) | Removing instance axi_buffer_0 of view:work.axi_buffer_13s_960s_64s_0(verilog) because there are no references to its outputs 
@N:BN115 : read_channel2_top.v(139) | Removing instance axi_buffer_0 of view:work.axi_buffer_13s_480s_64s(verilog) because there are no references to its outputs 
@N:BN362 : axi_buffer.v(59) | Removing sequential instance ram[63:0] of view:PrimLib.ram1(prim) in hierarchy view:work.axi_buffer_13s_960s_64s_0(verilog) because there are no references to its outputs 
@N:BN362 : axi_buffer.v(59) | Removing sequential instance ram[63:0] of view:PrimLib.ram1(prim) in hierarchy view:work.axi_buffer_13s_480s_64s(verilog) because there are no references to its outputs 
@N:BN362 : axi_buffer.v(70) | Removing sequential instance rd_addr_reg[9:0] of view:PrimLib.dff(prim) in hierarchy view:work.axi_buffer_13s_960s_64s_0(verilog) because there are no references to its outputs 
@N:BN362 : axi_buffer.v(70) | Removing sequential instance rd_addr_reg[8:0] of view:PrimLib.dff(prim) in hierarchy view:work.axi_buffer_13s_480s_64s(verilog) because there are no references to its outputs 
@N:BN362 : cdcfifo.v(111) | Removing sequential instance rdaddr_sync_rr[8:0] of view:PrimLib.dffr(prim) in hierarchy view:work.cdcfifo_4294967289s_32s_1_3(verilog) because there are no references to its outputs 
@N:BN362 : cdcfifo.v(111) | Removing sequential instance rdaddr_sync_r[8:0] of view:PrimLib.dffr(prim) in hierarchy view:work.cdcfifo_4294967289s_32s_1_3(verilog) because there are no references to its outputs 
@W:MT462 : vga_display_top_top.v(599) | Net BIBUF_0_Y appears to be an unidentified clock source. Assuming default frequency. 
@W:MT462 : vga_display_top_top.v(621) | Net BIBUF_2_Y appears to be an unidentified clock source. Assuming default frequency. 
syn_allowed_resources : blockrams=236,dsps=240  set on top level netlist vga_display_top_top

Finished netlist restructuring (Real Time elapsed 0h:00m:01s; CPU Time elapsed 0h:00m:01s; Memory used current: 191MB peak: 194MB)



@S |Clock Summary
*****************

Start                                                              Requested     Requested     Clock        Clock              
Clock                                                              Frequency     Period        Type         Group              
-------------------------------------------------------------------------------------------------------------------------------
System                                                             100.0 MHz     10.000        system       system_clkgroup    
vga_display_mss_CCC_0_FCCC|GL0_net_inferred_clock                  100.0 MHz     10.000        inferred     Inferred_clkgroup_3
vga_display_mss_CCC_0_FCCC|GL1_net_inferred_clock                  100.0 MHz     10.000        inferred     Inferred_clkgroup_1
vga_display_mss_CCC_0_FCCC|GL2_net_inferred_clock                  100.0 MHz     10.000        inferred     Inferred_clkgroup_0
vga_display_mss_FABOSC_0_OSC|RCOSC_25_50MHZ_CCC_inferred_clock     100.0 MHz     10.000        inferred     Inferred_clkgroup_4
vga_display_mss_MSS|FIC_2_APB_M_PCLK_inferred_clock                100.0 MHz     10.000        inferred     Inferred_clkgroup_2
vga_display_top_top_FCCC_0_FCCC|GL1_net_inferred_clock             100.0 MHz     10.000        inferred     Inferred_clkgroup_5
vga_display_top_top_FCCC_1_FCCC|GL0_net_inferred_clock             100.0 MHz     10.000        inferred     Inferred_clkgroup_6
===============================================================================================================================

@W:MT532 : vga_display_mss_mss.v(1810) | Found signal identified as System clock which controls 0 sequential elements including vga_display_mss_top_0.vga_display_mss_0.vga_display_mss_MSS_0.MSS_ADLIB_INST.  Using this clock, which has no specified timing constraint, can adversely impact design performance. 
@W:MT530 : bus_cdc_synchornizer.v(51) | Found inferred clock vga_display_mss_CCC_0_FCCC|GL2_net_inferred_clock which controls 9329 sequential elements including AR0331_PRL_IF_0.bus_cdc_synchornizer_1.gray_bus_reg2[31:0]. This clock has no specified timing constraint which may adversely impact design performance. 
@W:MT530 : axi_buffer.v(70) | Found inferred clock vga_display_mss_CCC_0_FCCC|GL1_net_inferred_clock which controls 18 sequential elements including video_dma_0.video_dma_0.write_channel1_top_0.axi_buffer_0.rd_addr_reg[9:0]. This clock has no specified timing constraint which may adversely impact design performance. 
@W:MT530 : coreconfigp.v(447) | Found inferred clock vga_display_mss_MSS|FIC_2_APB_M_PCLK_inferred_clock which controls 110 sequential elements including vga_display_mss_top_0.vga_display_mss_0.CORECONFIGP_0.FIC_2_APB_M_PREADY. This clock has no specified timing constraint which may adversely impact design performance. 
@W:MT530 : apb_wrapper.v(87) | Found inferred clock vga_display_mss_CCC_0_FCCC|GL0_net_inferred_clock which controls 158 sequential elements including APB_WRAPPER_0.sin_value[9:0]. This clock has no specified timing constraint which may adversely impact design performance. 
@W:MT530 : coreresetp.v(1613) | Found inferred clock vga_display_mss_FABOSC_0_OSC|RCOSC_25_50MHZ_CCC_inferred_clock which controls 31 sequential elements including vga_display_mss_top_0.vga_display_mss_0.CORERESETP_0.count_ddr[13:0]. This clock has no specified timing constraint which may adversely impact design performance. 
@W:MT530 : ram2port.v(68) | Found inferred clock vga_display_top_top_FCCC_0_FCCC|GL1_net_inferred_clock which controls 1269 sequential elements including display_controller_0.video_fifo_0.ram2port_0.rd_addr_reg[12:0]. This clock has no specified timing constraint which may adversely impact design performance. 
@W:MT530 : ar0331_parallel_if.v(264) | Found inferred clock vga_display_top_top_FCCC_1_FCCC|GL0_net_inferred_clock which controls 284 sequential elements including AR0331_PRL_IF_0.AR0331_Parallel_IF_0.s_r_V_Counter[15:0]. This clock has no specified timing constraint which may adversely impact design performance. 

Finished Pre Mapping Phase.
@N:BN225 :  | Writing default property annotation file D:\SVN_Video_repository\Releases\camera\New_IPs\11.7_test\cam_vita2k_displayCtrl_with_new_cam_v22\cam_vita2k\synthesis\vga_display_top_top.sap. 
Pre-mapping successful!

At Mapper Exit (Real Time elapsed 0h:00m:02s; CPU Time elapsed 0h:00m:02s; Memory used current: 110MB peak: 194MB)

Process took 0h:00m:02s realtime, 0h:00m:02s cputime
# Mon Mar 07 13:50:35 2016

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