vga_display_top_top_syn (synthesis)
Synthesis -
Mapper Report
Clock Conversion
Timing Report
Performance Summary
Clock Relationships
Interface Information
Detailed Report for Clocks
Clock: vga_display_mss_CCC_0_FCCC|GL0_net_inferred_clock
Starting Points with Worst Slack
Ending Points with Worst Slack
Worst Path Information
Clock: vga_display_mss_CCC_0_FCCC|GL2_net_inferred_clock
Starting Points with Worst Slack
Ending Points with Worst Slack
Worst Path Information
Clock: vga_display_mss_FABOSC_0_OSC|RCOSC_25_50MHZ_CCC_inferred_clock
Starting Points with Worst Slack
Ending Points with Worst Slack
Worst Path Information
Clock: vga_display_mss_MSS|FIC_2_APB_M_PCLK_inferred_clock
Starting Points with Worst Slack
Ending Points with Worst Slack
Worst Path Information
Clock: vga_display_top_top_FCCC_0_FCCC|GL1_net_inferred_clock
Starting Points with Worst Slack
Ending Points with Worst Slack
Worst Path Information
Clock: vga_display_top_top_FCCC_1_FCCC|GL0_net_inferred_clock
Starting Points with Worst Slack
Ending Points with Worst Slack
Worst Path Information
Clock: System
Starting Points with Worst Slack
Ending Points with Worst Slack
Worst Path Information
Resource Utilization
Hierarchical Area Report(vga_display_top_top) (13:51 07-Mar)
Session Log (13:49 07-Mar)