@N|Running in 64-bit mode
@N|Running in 64-bit mode
@N:"D:\Delme\SEV_PFSoC_OpenVX\hdl\intensity_average.vhd":23:7:23:23|Top entity is set to intensity_average.
@N: CD140 :	| Using the VHDL 2008 Standard for file 'D:\Delme\SEV_PFSoC_OpenVX\hdl\DDR_read_controller_FHD_HDMI_RX.vhd'.
@N: CD140 :	| Using the VHDL 2008 Standard for file 'D:\Delme\SEV_PFSoC_OpenVX\hdl\register_config.vhd'.
@N: CD140 :	| Using the VHDL 2008 Standard for file 'D:\Delme\SEV_PFSoC_OpenVX\hdl\data_unpacker_FHD_RX_0.vhd'.
@N: CD140 :	| Using the VHDL 2008 Standard for file 'D:\Delme\SEV_PFSoC_OpenVX\hdl\ram2port.vhd'.
@N: CD140 :	| Using the VHDL 2008 Standard for file 'D:\Delme\SEV_PFSoC_OpenVX\hdl\DDR_write_controller_lpddr4.vhd'.
@N: CD140 :	| Using the VHDL 2008 Standard for file 'D:\Delme\SEV_PFSoC_OpenVX\hdl\data_packer_lpddr4.vhd'.
@N: CD140 :	| Using the VHDL 2008 Standard for file 'D:\Delme\SEV_PFSoC_OpenVX\hdl\synchronizer_circuit.vhd'.
@N: CD140 :	| Using the VHDL 2008 Standard for file 'D:\Delme\SEV_PFSoC_OpenVX\component\Microsemi\SolutionCore\Display_Controller\4.5.0\RTL\Display_Controller.vhd'.
@N: CD140 :	| Using the VHDL 2008 Standard for file 'D:\Delme\SEV_PFSoC_OpenVX\component\Microsemi\SolutionCore\HDMI_TX\4.4.0\HDL\HDMI_TX.vhd'.
@N: CD140 :	| Using the VHDL 2008 Standard for file 'D:\Delme\SEV_PFSoC_OpenVX\hdl\read_demux.vhd'.
@N: CD140 :	| Using the VHDL 2008 Standard for file 'D:\Delme\SEV_PFSoC_OpenVX\hdl\read_mux.vhd'.
@N: CD140 :	| Using the VHDL 2008 Standard for file 'D:\Delme\SEV_PFSoC_OpenVX\hdl\request_scheduler.vhd'.
@N: CD140 :	| Using the VHDL 2008 Standard for file 'D:\Delme\SEV_PFSoC_OpenVX\hdl\write_demux.vhd'.
@N: CD140 :	| Using the VHDL 2008 Standard for file 'D:\Delme\SEV_PFSoC_OpenVX\hdl\write_mux.vhd'.
@N: CD140 :	| Using the VHDL 2008 Standard for file 'D:\Delme\SEV_PFSoC_OpenVX\component\Microsemi\SolutionCore\YCbCrtoRGB\4.4.0\Encrypted\YCbCrtoRGB.vhd'.
@N: CD140 :	| Using the VHDL 2008 Standard for file 'D:\Delme\SEV_PFSoC_OpenVX\component\Microsemi\SolutionCore\Bayer_Interpolation\4.2.0\RTL\Bayer_Interpolation.vhd'.
@N: CD140 :	| Using the VHDL 2008 Standard for file 'D:\Delme\SEV_PFSoC_OpenVX\component\Microsemi\SolutionCore\Gamma_Correction\4.2.0\Encrypted\Gamma_Correction.vhd'.
@N: CD140 :	| Using the VHDL 2008 Standard for file 'D:\Delme\SEV_PFSoC_OpenVX\component\Microsemi\SolutionCore\Image_Enhancement\4.3.0\Encrypted\Image_Enhancement.vhd'.
@N: CD140 :	| Using the VHDL 2008 Standard for file 'D:\Delme\SEV_PFSoC_OpenVX\component\Microsemi\SolutionCore\RGBtoYCbCr\4.4.0\Encrypted\RGBtoYCbCr.vhd'.
@N: CD140 :	| Using the VHDL 2008 Standard for file 'D:\Delme\SEV_PFSoC_OpenVX\hdl\apb3_interface.vhd'.
@N: CD140 :	| Using the VHDL 2008 Standard for file 'D:\Delme\SEV_PFSoC_OpenVX\hdl\intensity_average.vhd'.
@N: CD140 :	| Using the VHDL 2008 Standard for file 'D:\Delme\SEV_PFSoC_OpenVX\hdl\video_fifo.vhd'.
@N: CD140 :	| Using the VHDL 2008 Standard for file 'D:\Delme\SEV_PFSoC_OpenVX\component\work\Display_Controller_C0\Display_Controller_C0.vhd'.
@N: CD140 :	| Using the VHDL 2008 Standard for file 'D:\Delme\SEV_PFSoC_OpenVX\component\work\HDMI_TX_C0\HDMI_TX_C0.vhd'.
@N: CD140 :	| Using the VHDL 2008 Standard for file 'D:\Delme\SEV_PFSoC_OpenVX\component\work\YCbCrtoRGB_C0\YCbCrtoRGB_C0.vhd'.
@N: CD140 :	| Using the VHDL 2008 Standard for file 'D:\Delme\SEV_PFSoC_OpenVX\component\work\Bayer_Interpolation_C0\Bayer_Interpolation_C0.vhd'.
@N: CD140 :	| Using the VHDL 2008 Standard for file 'D:\Delme\SEV_PFSoC_OpenVX\component\work\Gamma_Correction_C0\Gamma_Correction_C0.vhd'.
@N: CD140 :	| Using the VHDL 2008 Standard for file 'D:\Delme\SEV_PFSoC_OpenVX\component\work\Image_Enhancement_C0\Image_Enhancement_C0.vhd'.
@N: CD140 :	| Using the VHDL 2008 Standard for file 'D:\Delme\SEV_PFSoC_OpenVX\component\work\RGBtoYCbCr_C0\RGBtoYCbCr_C0.vhd'.
@N: CD231 :"D:\Microchip\Libero_SoC_v2022.2\SynplifyPro\lib\vhd2008\std1164.vhd":889:16:889:17|Using onehot encoding for type mvl9plus. For example, enumeration 'U' is mapped to "1000000000".
@N|Running in 64-bit mode
@N: CG1349 :	| Running Verilog Compiler in System Verilog mode
@N: CG334 :"D:\Delme\SEV_PFSoC_OpenVX\component\work\CORERXIODBITALIGN_C0\CORERXIODBITALIGN_C0_0\rtl\vlog\core\CoreRxIODBitAlign_top.v":115:16:115:28|Read directive translate_off.
@N: CG333 :"D:\Delme\SEV_PFSoC_OpenVX\component\work\CORERXIODBITALIGN_C0\CORERXIODBITALIGN_C0_0\rtl\vlog\core\CoreRxIODBitAlign_top.v":118:16:118:27|Read directive translate_on.
@N: CG334 :"D:\Delme\SEV_PFSoC_OpenVX\component\work\CORERXIODBITALIGN_C0\CORERXIODBITALIGN_C0_0\rtl\vlog\core\CoreRxIODBitAlign_top.v":130:16:130:28|Read directive translate_off.
@N: CG333 :"D:\Delme\SEV_PFSoC_OpenVX\component\work\CORERXIODBITALIGN_C0\CORERXIODBITALIGN_C0_0\rtl\vlog\core\CoreRxIODBitAlign_top.v":151:16:151:27|Read directive translate_on.
@N: CG334 :"D:\Delme\SEV_PFSoC_OpenVX\component\work\CORERXIODBITALIGN_C1\CORERXIODBITALIGN_C1_0\rtl\vlog\core\CoreRxIODBitAlign_top.v":115:16:115:28|Read directive translate_off.
@N: CG333 :"D:\Delme\SEV_PFSoC_OpenVX\component\work\CORERXIODBITALIGN_C1\CORERXIODBITALIGN_C1_0\rtl\vlog\core\CoreRxIODBitAlign_top.v":118:16:118:27|Read directive translate_on.
@N: CG334 :"D:\Delme\SEV_PFSoC_OpenVX\component\work\CORERXIODBITALIGN_C1\CORERXIODBITALIGN_C1_0\rtl\vlog\core\CoreRxIODBitAlign_top.v":130:16:130:28|Read directive translate_off.
@N: CG333 :"D:\Delme\SEV_PFSoC_OpenVX\component\work\CORERXIODBITALIGN_C1\CORERXIODBITALIGN_C1_0\rtl\vlog\core\CoreRxIODBitAlign_top.v":151:16:151:27|Read directive translate_on.
@N: CG334 :"D:\Delme\SEV_PFSoC_OpenVX\component\work\CORERXIODBITALIGN_C2\CORERXIODBITALIGN_C2_0\rtl\vlog\core\CoreRxIODBitAlign_top.v":115:16:115:28|Read directive translate_off.
@N: CG333 :"D:\Delme\SEV_PFSoC_OpenVX\component\work\CORERXIODBITALIGN_C2\CORERXIODBITALIGN_C2_0\rtl\vlog\core\CoreRxIODBitAlign_top.v":118:16:118:27|Read directive translate_on.
@N: CG334 :"D:\Delme\SEV_PFSoC_OpenVX\component\work\CORERXIODBITALIGN_C2\CORERXIODBITALIGN_C2_0\rtl\vlog\core\CoreRxIODBitAlign_top.v":130:16:130:28|Read directive translate_off.
@N: CG333 :"D:\Delme\SEV_PFSoC_OpenVX\component\work\CORERXIODBITALIGN_C2\CORERXIODBITALIGN_C2_0\rtl\vlog\core\CoreRxIODBitAlign_top.v":151:16:151:27|Read directive translate_on.
@N: CG334 :"D:\Delme\SEV_PFSoC_OpenVX\component\work\CORERXIODBITALIGN_C3\CORERXIODBITALIGN_C3_0\rtl\vlog\core\CoreRxIODBitAlign_top.v":115:16:115:28|Read directive translate_off.
@N: CG333 :"D:\Delme\SEV_PFSoC_OpenVX\component\work\CORERXIODBITALIGN_C3\CORERXIODBITALIGN_C3_0\rtl\vlog\core\CoreRxIODBitAlign_top.v":118:16:118:27|Read directive translate_on.
@N: CG334 :"D:\Delme\SEV_PFSoC_OpenVX\component\work\CORERXIODBITALIGN_C3\CORERXIODBITALIGN_C3_0\rtl\vlog\core\CoreRxIODBitAlign_top.v":130:16:130:28|Read directive translate_off.
@N: CG333 :"D:\Delme\SEV_PFSoC_OpenVX\component\work\CORERXIODBITALIGN_C3\CORERXIODBITALIGN_C3_0\rtl\vlog\core\CoreRxIODBitAlign_top.v":151:16:151:27|Read directive translate_on.
@N: CG1349 :	| Running Verilog Compiler in System Verilog mode
@N: CG334 :"D:\Delme\SEV_PFSoC_OpenVX\component\work\CORERXIODBITALIGN_C0\CORERXIODBITALIGN_C0_0\rtl\vlog\core\CoreRxIODBitAlign_top.v":115:16:115:28|Read directive translate_off.
@N: CG333 :"D:\Delme\SEV_PFSoC_OpenVX\component\work\CORERXIODBITALIGN_C0\CORERXIODBITALIGN_C0_0\rtl\vlog\core\CoreRxIODBitAlign_top.v":118:16:118:27|Read directive translate_on.
@N: CG334 :"D:\Delme\SEV_PFSoC_OpenVX\component\work\CORERXIODBITALIGN_C0\CORERXIODBITALIGN_C0_0\rtl\vlog\core\CoreRxIODBitAlign_top.v":130:16:130:28|Read directive translate_off.
@N: CG333 :"D:\Delme\SEV_PFSoC_OpenVX\component\work\CORERXIODBITALIGN_C0\CORERXIODBITALIGN_C0_0\rtl\vlog\core\CoreRxIODBitAlign_top.v":151:16:151:27|Read directive translate_on.
@N: CG334 :"D:\Delme\SEV_PFSoC_OpenVX\component\work\CORERXIODBITALIGN_C1\CORERXIODBITALIGN_C1_0\rtl\vlog\core\CoreRxIODBitAlign_top.v":115:16:115:28|Read directive translate_off.
@N: CG333 :"D:\Delme\SEV_PFSoC_OpenVX\component\work\CORERXIODBITALIGN_C1\CORERXIODBITALIGN_C1_0\rtl\vlog\core\CoreRxIODBitAlign_top.v":118:16:118:27|Read directive translate_on.
@N: CG334 :"D:\Delme\SEV_PFSoC_OpenVX\component\work\CORERXIODBITALIGN_C1\CORERXIODBITALIGN_C1_0\rtl\vlog\core\CoreRxIODBitAlign_top.v":130:16:130:28|Read directive translate_off.
@N: CG333 :"D:\Delme\SEV_PFSoC_OpenVX\component\work\CORERXIODBITALIGN_C1\CORERXIODBITALIGN_C1_0\rtl\vlog\core\CoreRxIODBitAlign_top.v":151:16:151:27|Read directive translate_on.
@N: CG334 :"D:\Delme\SEV_PFSoC_OpenVX\component\work\CORERXIODBITALIGN_C2\CORERXIODBITALIGN_C2_0\rtl\vlog\core\CoreRxIODBitAlign_top.v":115:16:115:28|Read directive translate_off.
@N: CG333 :"D:\Delme\SEV_PFSoC_OpenVX\component\work\CORERXIODBITALIGN_C2\CORERXIODBITALIGN_C2_0\rtl\vlog\core\CoreRxIODBitAlign_top.v":118:16:118:27|Read directive translate_on.
@N: CG334 :"D:\Delme\SEV_PFSoC_OpenVX\component\work\CORERXIODBITALIGN_C2\CORERXIODBITALIGN_C2_0\rtl\vlog\core\CoreRxIODBitAlign_top.v":130:16:130:28|Read directive translate_off.
@N: CG333 :"D:\Delme\SEV_PFSoC_OpenVX\component\work\CORERXIODBITALIGN_C2\CORERXIODBITALIGN_C2_0\rtl\vlog\core\CoreRxIODBitAlign_top.v":151:16:151:27|Read directive translate_on.
@N: CG334 :"D:\Delme\SEV_PFSoC_OpenVX\component\work\CORERXIODBITALIGN_C3\CORERXIODBITALIGN_C3_0\rtl\vlog\core\CoreRxIODBitAlign_top.v":115:16:115:28|Read directive translate_off.
@N: CG333 :"D:\Delme\SEV_PFSoC_OpenVX\component\work\CORERXIODBITALIGN_C3\CORERXIODBITALIGN_C3_0\rtl\vlog\core\CoreRxIODBitAlign_top.v":118:16:118:27|Read directive translate_on.
@N: CG334 :"D:\Delme\SEV_PFSoC_OpenVX\component\work\CORERXIODBITALIGN_C3\CORERXIODBITALIGN_C3_0\rtl\vlog\core\CoreRxIODBitAlign_top.v":130:16:130:28|Read directive translate_off.
@N: CG333 :"D:\Delme\SEV_PFSoC_OpenVX\component\work\CORERXIODBITALIGN_C3\CORERXIODBITALIGN_C3_0\rtl\vlog\core\CoreRxIODBitAlign_top.v":151:16:151:27|Read directive translate_on.
@N: CG364 :"D:\Microchip\Libero_SoC_v2022.2\SynplifyPro\lib\generic\acg5.v":121:7:121:10|Synthesizing module AND2 in library work.
@N: CG364 :"D:\Microchip\Libero_SoC_v2022.2\SynplifyPro\lib\generic\acg5.v":333:7:333:11|Synthesizing module BIBUF in library work.
@N: CG364 :"D:\Microchip\Libero_SoC_v2022.2\SynplifyPro\lib\generic\acg5.v":151:7:151:10|Synthesizing module AND3 in library work.
@N: CG364 :"D:\Delme\SEV_PFSoC_OpenVX\component\work\CORERESET_PF_C3\CORERESET_PF_C3_0\core\corereset_pf.v":21:7:21:52|Synthesizing module CORERESET_PF_C3_CORERESET_PF_C3_0_CORERESET_PF in library work.
@N: CG364 :"D:\Delme\SEV_PFSoC_OpenVX\component\work\CORERESET_PF_C3\CORERESET_PF_C3.v":21:7:21:21|Synthesizing module CORERESET_PF_C3 in library work.
@N: CG364 :"D:\Delme\SEV_PFSoC_OpenVX\component\work\CORERESET_PF_C4\CORERESET_PF_C4_0\core\corereset_pf.v":21:7:21:52|Synthesizing module CORERESET_PF_C4_CORERESET_PF_C4_0_CORERESET_PF in library work.
@N: CG364 :"D:\Delme\SEV_PFSoC_OpenVX\component\work\CORERESET_PF_C4\CORERESET_PF_C4.v":21:7:21:21|Synthesizing module CORERESET_PF_C4 in library work.
@N: CG364 :"D:\Delme\SEV_PFSoC_OpenVX\component\polarfire_syn_comps.v":1702:7:1702:10|Synthesizing module INIT in library work.
@N: CG364 :"D:\Delme\SEV_PFSoC_OpenVX\component\polarfire_syn_comps.v":107:7:107:19|Synthesizing module BANKCTRL_GPIO in library work.
@N: CG364 :"D:\Microchip\Libero_SoC_v2022.2\SynplifyPro\lib\generic\acg5.v":504:7:504:9|Synthesizing module VCC in library work.
@N: CG364 :"D:\Delme\SEV_PFSoC_OpenVX\component\polarfire_syn_comps.v":156:7:156:19|Synthesizing module BANKCTRL_HSIO in library work.
@N: CG364 :"D:\Microchip\Libero_SoC_v2022.2\SynplifyPro\lib\generic\acg5.v":500:7:500:9|Synthesizing module GND in library work.
@N: CG364 :"D:\Delme\SEV_PFSoC_OpenVX\component\work\INIT_MONITOR\INIT_MONITOR_0\INIT_MONITOR_INIT_MONITOR_0_PFSOC_INIT_MONITOR.v":5:7:5:52|Synthesizing module INIT_MONITOR_INIT_MONITOR_0_PFSOC_INIT_MONITOR in library work.
@N: CG364 :"D:\Delme\SEV_PFSoC_OpenVX\component\work\INIT_MONITOR\INIT_MONITOR.v":67:7:67:18|Synthesizing module INIT_MONITOR in library work.
@N: CG364 :"D:\Microchip\Libero_SoC_v2022.2\SynplifyPro\lib\generic\acg5.v":489:7:489:12|Synthesizing module CLKINT in library work.
@N: CG364 :"D:\Delme\SEV_PFSoC_OpenVX\component\polarfire_syn_comps.v":3694:7:3694:9|Synthesizing module PLL in library work.
@N: CG364 :"D:\Delme\SEV_PFSoC_OpenVX\component\work\PF_CCC_C0\PF_CCC_C0_0\PF_CCC_C0_PF_CCC_C0_0_PF_CCC.v":5:7:5:34|Synthesizing module PF_CCC_C0_PF_CCC_C0_0_PF_CCC in library work.
@N: CG364 :"D:\Delme\SEV_PFSoC_OpenVX\component\work\PF_CCC_C0\PF_CCC_C0.v":264:7:264:15|Synthesizing module PF_CCC_C0 in library work.
@N: CG364 :"D:\Delme\SEV_PFSoC_OpenVX\component\work\PF_CCC_C1\PF_CCC_C1_0\PF_CCC_C1_PF_CCC_C1_0_PF_CCC.v":5:7:5:34|Synthesizing module PF_CCC_C1_PF_CCC_C1_0_PF_CCC in library work.
@N: CG364 :"D:\Delme\SEV_PFSoC_OpenVX\component\work\PF_CCC_C1\PF_CCC_C1.v":264:7:264:15|Synthesizing module PF_CCC_C1 in library work.
@N: CG364 :"D:\Delme\SEV_PFSoC_OpenVX\component\polarfire_syn_comps.v":1553:7:1553:16|Synthesizing module ICB_CLKDIV in library work.
@N: CG364 :"D:\Delme\SEV_PFSoC_OpenVX\component\work\PF_CLK_DIV_C0\PF_CLK_DIV_C0_0\PF_CLK_DIV_C0_PF_CLK_DIV_C0_0_PF_CLK_DIV.v":5:7:5:46|Synthesizing module PF_CLK_DIV_C0_PF_CLK_DIV_C0_0_PF_CLK_DIV in library work.
@N: CG364 :"D:\Delme\SEV_PFSoC_OpenVX\component\work\PF_CLK_DIV_C0\PF_CLK_DIV_C0.v":24:7:24:19|Synthesizing module PF_CLK_DIV_C0 in library work.
@N: CG364 :"D:\Delme\SEV_PFSoC_OpenVX\component\polarfire_syn_comps.v":2231:7:2231:16|Synthesizing module OSC_RC2MHZ in library work.
@N: CG364 :"D:\Delme\SEV_PFSoC_OpenVX\component\work\PF_OSC_C0\PF_OSC_C0_0\PF_OSC_C0_PF_OSC_C0_0_PF_OSC.v":5:7:5:34|Synthesizing module PF_OSC_C0_PF_OSC_C0_0_PF_OSC in library work.
@N: CG364 :"D:\Delme\SEV_PFSoC_OpenVX\component\work\PF_OSC_C0\PF_OSC_C0.v":27:7:27:15|Synthesizing module PF_OSC_C0 in library work.
@N: CG364 :"D:\Delme\SEV_PFSoC_OpenVX\component\polarfire_syn_comps.v":4119:7:4119:12|Synthesizing module TX_PLL in library work.
@N: CG364 :"D:\Delme\SEV_PFSoC_OpenVX\component\work\PF_TX_PLL_C0\PF_TX_PLL_C0_0\PF_TX_PLL_C0_PF_TX_PLL_C0_0_PF_TX_PLL.v":5:7:5:43|Synthesizing module PF_TX_PLL_C0_PF_TX_PLL_C0_0_PF_TX_PLL in library work.
@N: CG364 :"D:\Delme\SEV_PFSoC_OpenVX\component\work\PF_TX_PLL_C0\PF_TX_PLL_C0.v":50:7:50:18|Synthesizing module PF_TX_PLL_C0 in library work.
@N: CG364 :"D:\Delme\SEV_PFSoC_OpenVX\component\polarfire_syn_comps.v":10810:7:10810:18|Synthesizing module XCVR_REF_CLK in library work.
@N: CG364 :"D:\Delme\SEV_PFSoC_OpenVX\component\work\PF_XCVR_REF_CLK_C0\PF_XCVR_REF_CLK_C0_0\PF_XCVR_REF_CLK_C0_PF_XCVR_REF_CLK_C0_0_PF_XCVR_REF_CLK.v":5:7:5:61|Synthesizing module PF_XCVR_REF_CLK_C0_PF_XCVR_REF_CLK_C0_0_PF_XCVR_REF_CLK in library work.
@N: CG364 :"D:\Delme\SEV_PFSoC_OpenVX\component\work\PF_XCVR_REF_CLK_C0\PF_XCVR_REF_CLK_C0.v":27:7:27:24|Synthesizing module PF_XCVR_REF_CLK_C0 in library work.
@N: CG364 :"D:\Delme\SEV_PFSoC_OpenVX\component\work\CLOCKS_AND_RESETS\CLOCKS_AND_RESETS.v":9:7:9:23|Synthesizing module CLOCKS_AND_RESETS in library work.
@N: CG364 :"D:\Delme\SEV_PFSoC_OpenVX\component\work\CORERESET_PF_C0\CORERESET_PF_C0_0\core\corereset_pf.v":21:7:21:52|Synthesizing module CORERESET_PF_C0_CORERESET_PF_C0_0_CORERESET_PF in library work.
@N: CG364 :"D:\Delme\SEV_PFSoC_OpenVX\component\work\CORERESET_PF_C0\CORERESET_PF_C0.v":21:7:21:21|Synthesizing module CORERESET_PF_C0 in library work.
@N: CG364 :"D:\Delme\SEV_PFSoC_OpenVX\component\work\DDR_Read_LPDDR4\DDR_Read_LPDDR4.v":9:7:9:21|Synthesizing module DDR_Read_LPDDR4 in library work.
@N: CG794 :"D:\Delme\SEV_PFSoC_OpenVX\component\work\DDR_Read_LPDDR4\DDR_Read_LPDDR4.v":136:21:136:42|Using module data_unpacker_FHD_RX from library work
@N: CG794 :"D:\Delme\SEV_PFSoC_OpenVX\component\work\DDR_Read_LPDDR4\DDR_Read_LPDDR4.v":152:32:152:64|Using module DDR_read_controller_FHD_HDMI_RX from library work
@N: CG794 :"D:\Delme\SEV_PFSoC_OpenVX\component\work\DDR_Read_LPDDR4\DDR_Read_LPDDR4.v":172:0:172:16|Using module Register_Config from library work
@N: CG794 :"D:\Delme\SEV_PFSoC_OpenVX\component\work\DDR_Read_LPDDR4\DDR_Read_LPDDR4.v":186:0:186:11|Using module video_fifo from library work
@N: CG364 :"D:\Delme\SEV_PFSoC_OpenVX\component\work\DDR_Write_LPDDR4\DDR_Write_LPDDR4.v":9:7:9:22|Synthesizing module DDR_Write_LPDDR4 in library work.
@N: CG794 :"D:\Delme\SEV_PFSoC_OpenVX\component\work\DDR_Write_LPDDR4\DDR_Write_LPDDR4.v":120:19:120:31|Using module data_packer_lpddr4 from library work
@N: CG794 :"D:\Delme\SEV_PFSoC_OpenVX\component\work\DDR_Write_LPDDR4\DDR_Write_LPDDR4.v":136:28:136:49|Using module DDR_write_controller_lpddr4 from library work
@N: CG794 :"D:\Delme\SEV_PFSoC_OpenVX\component\work\DDR_Write_LPDDR4\DDR_Write_LPDDR4.v":158:0:158:21|Using module synchronizer_circuit from library work
@N: CG794 :"D:\Delme\SEV_PFSoC_OpenVX\component\work\DDR_Write_LPDDR4\DDR_Write_LPDDR4.v":184:0:184:11|Using module video_fifo from library work
@N: CG364 :"D:\Delme\SEV_PFSoC_OpenVX\component\work\CORERESET_PF_C1\CORERESET_PF_C1_0\core\corereset_pf.v":21:7:21:52|Synthesizing module CORERESET_PF_C1_CORERESET_PF_C1_0_CORERESET_PF in library work.
@N: CG364 :"D:\Delme\SEV_PFSoC_OpenVX\component\work\CORERESET_PF_C1\CORERESET_PF_C1.v":21:7:21:21|Synthesizing module CORERESET_PF_C1 in library work.
@N: CG364 :"D:\Delme\SEV_PFSoC_OpenVX\component\work\CORERESET_PF_C2\CORERESET_PF_C2_0\core\corereset_pf.v":21:7:21:52|Synthesizing module CORERESET_PF_C2_CORERESET_PF_C2_0_CORERESET_PF in library work.
@N: CG364 :"D:\Delme\SEV_PFSoC_OpenVX\component\work\CORERESET_PF_C2\CORERESET_PF_C2.v":21:7:21:21|Synthesizing module CORERESET_PF_C2 in library work.
@N: CG364 :"D:\Delme\SEV_PFSoC_OpenVX\component\Microsemi\SolutionCore\mipicsi2rxdecoderPF\4.4.0\RTL\mipicsi2rxdecoderPF.v":1:7:1:25|Synthesizing module mipicsi2rxdecoderPF in library work.
@N: CG364 :"D:\Delme\SEV_PFSoC_OpenVX\component\Microsemi\SolutionCore\mipicsi2rxdecoderPF\4.4.0\RTL\mipicsi2rxdecoderPF.v":1677:7:1677:20|Synthesizing module embsync_detect in library work.
@N: CG179 :"D:\Delme\SEV_PFSoC_OpenVX\component\Microsemi\SolutionCore\mipicsi2rxdecoderPF\4.4.0\RTL\mipicsi2rxdecoderPF.v":2220:35:2220:40|Removing redundant assignment.
@N: CG179 :"D:\Delme\SEV_PFSoC_OpenVX\component\Microsemi\SolutionCore\mipicsi2rxdecoderPF\4.4.0\RTL\mipicsi2rxdecoderPF.v":2221:35:2221:46|Removing redundant assignment.
@N: CG179 :"D:\Delme\SEV_PFSoC_OpenVX\component\Microsemi\SolutionCore\mipicsi2rxdecoderPF\4.4.0\RTL\mipicsi2rxdecoderPF.v":2222:35:2222:49|Removing redundant assignment.
@N: CG179 :"D:\Delme\SEV_PFSoC_OpenVX\component\Microsemi\SolutionCore\mipicsi2rxdecoderPF\4.4.0\RTL\mipicsi2rxdecoderPF.v":2228:35:2228:40|Removing redundant assignment.
@N: CG179 :"D:\Delme\SEV_PFSoC_OpenVX\component\Microsemi\SolutionCore\mipicsi2rxdecoderPF\4.4.0\RTL\mipicsi2rxdecoderPF.v":2229:35:2229:46|Removing redundant assignment.
@N: CG179 :"D:\Delme\SEV_PFSoC_OpenVX\component\Microsemi\SolutionCore\mipicsi2rxdecoderPF\4.4.0\RTL\mipicsi2rxdecoderPF.v":2230:35:2230:49|Removing redundant assignment.
@N: CG179 :"D:\Delme\SEV_PFSoC_OpenVX\component\Microsemi\SolutionCore\mipicsi2rxdecoderPF\4.4.0\RTL\mipicsi2rxdecoderPF.v":2238:33:2238:38|Removing redundant assignment.
@N: CG179 :"D:\Delme\SEV_PFSoC_OpenVX\component\Microsemi\SolutionCore\mipicsi2rxdecoderPF\4.4.0\RTL\mipicsi2rxdecoderPF.v":2239:33:2239:44|Removing redundant assignment.
@N: CG179 :"D:\Delme\SEV_PFSoC_OpenVX\component\Microsemi\SolutionCore\mipicsi2rxdecoderPF\4.4.0\RTL\mipicsi2rxdecoderPF.v":2251:35:2251:49|Removing redundant assignment.
@N: CG179 :"D:\Delme\SEV_PFSoC_OpenVX\component\Microsemi\SolutionCore\mipicsi2rxdecoderPF\4.4.0\RTL\mipicsi2rxdecoderPF.v":2257:35:2257:40|Removing redundant assignment.
@N: CG179 :"D:\Delme\SEV_PFSoC_OpenVX\component\Microsemi\SolutionCore\mipicsi2rxdecoderPF\4.4.0\RTL\mipicsi2rxdecoderPF.v":2259:35:2259:49|Removing redundant assignment.
@N: CG179 :"D:\Delme\SEV_PFSoC_OpenVX\component\Microsemi\SolutionCore\mipicsi2rxdecoderPF\4.4.0\RTL\mipicsi2rxdecoderPF.v":2419:27:2419:37|Removing redundant assignment.
@N: CG179 :"D:\Delme\SEV_PFSoC_OpenVX\component\Microsemi\SolutionCore\mipicsi2rxdecoderPF\4.4.0\RTL\mipicsi2rxdecoderPF.v":2480:27:2480:37|Removing redundant assignment.
@N: CG179 :"D:\Delme\SEV_PFSoC_OpenVX\component\Microsemi\SolutionCore\mipicsi2rxdecoderPF\4.4.0\RTL\mipicsi2rxdecoderPF.v":2541:27:2541:37|Removing redundant assignment.
@N: CG179 :"D:\Delme\SEV_PFSoC_OpenVX\component\Microsemi\SolutionCore\mipicsi2rxdecoderPF\4.4.0\RTL\mipicsi2rxdecoderPF.v":2602:27:2602:37|Removing redundant assignment.
@N: CG179 :"D:\Delme\SEV_PFSoC_OpenVX\component\Microsemi\SolutionCore\mipicsi2rxdecoderPF\4.4.0\RTL\mipicsi2rxdecoderPF.v":2663:27:2663:37|Removing redundant assignment.
@N: CG179 :"D:\Delme\SEV_PFSoC_OpenVX\component\Microsemi\SolutionCore\mipicsi2rxdecoderPF\4.4.0\RTL\mipicsi2rxdecoderPF.v":2724:27:2724:37|Removing redundant assignment.
@N: CG179 :"D:\Delme\SEV_PFSoC_OpenVX\component\Microsemi\SolutionCore\mipicsi2rxdecoderPF\4.4.0\RTL\mipicsi2rxdecoderPF.v":2785:27:2785:37|Removing redundant assignment.
@N: CG179 :"D:\Delme\SEV_PFSoC_OpenVX\component\Microsemi\SolutionCore\mipicsi2rxdecoderPF\4.4.0\RTL\mipicsi2rxdecoderPF.v":2846:27:2846:37|Removing redundant assignment.
@N: CG179 :"D:\Delme\SEV_PFSoC_OpenVX\component\Microsemi\SolutionCore\mipicsi2rxdecoderPF\4.4.0\RTL\mipicsi2rxdecoderPF.v":2930:32:2930:44|Removing redundant assignment.
@N: CG179 :"D:\Delme\SEV_PFSoC_OpenVX\component\Microsemi\SolutionCore\mipicsi2rxdecoderPF\4.4.0\RTL\mipicsi2rxdecoderPF.v":2931:32:2931:45|Removing redundant assignment.
@N: CG179 :"D:\Delme\SEV_PFSoC_OpenVX\component\Microsemi\SolutionCore\mipicsi2rxdecoderPF\4.4.0\RTL\mipicsi2rxdecoderPF.v":2936:30:2936:42|Removing redundant assignment.
@N: CG179 :"D:\Delme\SEV_PFSoC_OpenVX\component\Microsemi\SolutionCore\mipicsi2rxdecoderPF\4.4.0\RTL\mipicsi2rxdecoderPF.v":2937:30:2937:43|Removing redundant assignment.
@N: CG179 :"D:\Delme\SEV_PFSoC_OpenVX\component\Microsemi\SolutionCore\mipicsi2rxdecoderPF\4.4.0\RTL\mipicsi2rxdecoderPF.v":3091:51:3091:63|Removing redundant assignment.
@N: CG179 :"D:\Delme\SEV_PFSoC_OpenVX\component\Microsemi\SolutionCore\mipicsi2rxdecoderPF\4.4.0\RTL\mipicsi2rxdecoderPF.v":3092:52:3092:65|Removing redundant assignment.
@N: CG179 :"D:\Delme\SEV_PFSoC_OpenVX\component\Microsemi\SolutionCore\mipicsi2rxdecoderPF\4.4.0\RTL\mipicsi2rxdecoderPF.v":3097:34:3097:46|Removing redundant assignment.
@N: CG179 :"D:\Delme\SEV_PFSoC_OpenVX\component\Microsemi\SolutionCore\mipicsi2rxdecoderPF\4.4.0\RTL\mipicsi2rxdecoderPF.v":3098:34:3098:47|Removing redundant assignment.
@N: CG179 :"D:\Delme\SEV_PFSoC_OpenVX\component\Microsemi\SolutionCore\mipicsi2rxdecoderPF\4.4.0\RTL\mipicsi2rxdecoderPF.v":3254:51:3254:63|Removing redundant assignment.
@N: CG179 :"D:\Delme\SEV_PFSoC_OpenVX\component\Microsemi\SolutionCore\mipicsi2rxdecoderPF\4.4.0\RTL\mipicsi2rxdecoderPF.v":3255:52:3255:65|Removing redundant assignment.
@N: CG179 :"D:\Delme\SEV_PFSoC_OpenVX\component\Microsemi\SolutionCore\mipicsi2rxdecoderPF\4.4.0\RTL\mipicsi2rxdecoderPF.v":3260:29:3260:41|Removing redundant assignment.
@N: CG179 :"D:\Delme\SEV_PFSoC_OpenVX\component\Microsemi\SolutionCore\mipicsi2rxdecoderPF\4.4.0\RTL\mipicsi2rxdecoderPF.v":3261:30:3261:43|Removing redundant assignment.
@N: CG179 :"D:\Delme\SEV_PFSoC_OpenVX\component\Microsemi\SolutionCore\mipicsi2rxdecoderPF\4.4.0\RTL\mipicsi2rxdecoderPF.v":3420:51:3420:63|Removing redundant assignment.
@N: CG179 :"D:\Delme\SEV_PFSoC_OpenVX\component\Microsemi\SolutionCore\mipicsi2rxdecoderPF\4.4.0\RTL\mipicsi2rxdecoderPF.v":3421:52:3421:65|Removing redundant assignment.
@N: CG179 :"D:\Delme\SEV_PFSoC_OpenVX\component\Microsemi\SolutionCore\mipicsi2rxdecoderPF\4.4.0\RTL\mipicsi2rxdecoderPF.v":3426:29:3426:41|Removing redundant assignment.
@N: CG179 :"D:\Delme\SEV_PFSoC_OpenVX\component\Microsemi\SolutionCore\mipicsi2rxdecoderPF\4.4.0\RTL\mipicsi2rxdecoderPF.v":3427:30:3427:43|Removing redundant assignment.
@N: CG364 :"D:\Delme\SEV_PFSoC_OpenVX\component\Microsemi\SolutionCore\mipicsi2rxdecoderPF\4.4.0\RTL\mipicsi2rxdecoderPF.v":6616:7:6616:29|Synthesizing module mipi_csi2_rx_cdcfiforam in library work.
@N: CL134 :"D:\Delme\SEV_PFSoC_OpenVX\component\Microsemi\SolutionCore\mipicsi2rxdecoderPF\4.4.0\RTL\mipicsi2rxdecoderPF.v":6641:2:6641:7|Found RAM ram_block, depth=256, width=8
@N: CG364 :"D:\Delme\SEV_PFSoC_OpenVX\component\Microsemi\SolutionCore\mipicsi2rxdecoderPF\4.4.0\RTL\mipicsi2rxdecoderPF.v":6352:7:6352:26|Synthesizing module mipi_csi2_rx_cdcfifo in library work.
@N: CG364 :"D:\Delme\SEV_PFSoC_OpenVX\component\Microsemi\SolutionCore\mipicsi2rxdecoderPF\4.4.0\RTL\mipicsi2rxdecoderPF.v":6616:7:6616:29|Synthesizing module mipi_csi2_rx_cdcfiforam in library work.
@N: CL134 :"D:\Delme\SEV_PFSoC_OpenVX\component\Microsemi\SolutionCore\mipicsi2rxdecoderPF\4.4.0\RTL\mipicsi2rxdecoderPF.v":6641:2:6641:7|Found RAM ram_block, depth=4096, width=40
@N: CG364 :"D:\Delme\SEV_PFSoC_OpenVX\component\Microsemi\SolutionCore\mipicsi2rxdecoderPF\4.4.0\RTL\mipicsi2rxdecoderPF.v":6352:7:6352:26|Synthesizing module mipi_csi2_rx_cdcfifo in library work.
@N: CG364 :"D:\Delme\SEV_PFSoC_OpenVX\component\Microsemi\SolutionCore\mipicsi2rxdecoderPF\4.4.0\RTL\mipicsi2rxdecoderPF.v":4672:7:4672:27|Synthesizing module byte2pixel_conversion in library work.
@N: CG179 :"D:\Delme\SEV_PFSoC_OpenVX\component\Microsemi\SolutionCore\mipicsi2rxdecoderPF\4.4.0\RTL\mipicsi2rxdecoderPF.v":5900:24:5900:33|Removing redundant assignment.
@N: CG364 :"D:\Delme\SEV_PFSoC_OpenVX\component\Microsemi\SolutionCore\mipicsi2rxdecoderPF\4.4.0\RTL\mipicsi2rxdecoderPF.v":380:7:380:25|Synthesizing module mipi_csi2_rxdecoder in library work.
@N: CG179 :"D:\Delme\SEV_PFSoC_OpenVX\component\Microsemi\SolutionCore\mipicsi2rxdecoderPF\4.4.0\RTL\mipicsi2rxdecoderPF.v":1541:76:1541:90|Removing redundant assignment.
@N: CG364 :"D:\Delme\SEV_PFSoC_OpenVX\component\Microsemi\SolutionCore\mipicsi2rxdecoderPF\4.4.0\RTL\mipicsi2rxdecoderPF.v":208:7:208:32|Synthesizing module mipicsi2rxdecoderPF_native in library work.
@N: CG364 :"D:\Delme\SEV_PFSoC_OpenVX\component\work\mipicsi2rxdecoderPF_C0\mipicsi2rxdecoderPF_C0.v":27:7:27:28|Synthesizing module mipicsi2rxdecoderPF_C0 in library work.
@N: CG364 :"D:\Delme\SEV_PFSoC_OpenVX\component\work\PF_CCC_C2\PF_CCC_C2_0\PF_CCC_C2_PF_CCC_C2_0_PF_CCC.v":5:7:5:34|Synthesizing module PF_CCC_C2_PF_CCC_C2_0_PF_CCC in library work.
@N: CG364 :"D:\Delme\SEV_PFSoC_OpenVX\component\work\PF_CCC_C2\PF_CCC_C2.v":264:7:264:15|Synthesizing module PF_CCC_C2 in library work.
@N: CG364 :"D:\Microchip\Libero_SoC_v2022.2\SynplifyPro\lib\generic\acg5.v":187:7:187:10|Synthesizing module AND4 in library work.
@N: CG775 :"D:\Delme\SEV_PFSoC_OpenVX\component\work\CORERXIODBITALIGN_C0\CORERXIODBITALIGN_C0_0\rtl\vlog\core\CoreRxIODBitAlign_top.v":2:7:2:67|Component CORERXIODBITALIGN_C0_CORERXIODBITALIGN_C0_0_CORERXIODBITALIGN not found in library "work" or "__hyper__lib__", but found in library CORERXIODBITALIGN_LIB
@N: CG364 :"D:\Delme\SEV_PFSoC_OpenVX\component\work\CORERXIODBITALIGN_C0\CORERXIODBITALIGN_C0_0\rtl\vlog\core\CoreRxIODBitAlign.v":2:7:2:72|Synthesizing module CORERXIODBITALIGN_C0_CORERXIODBITALIGN_C0_0_CORERXIODBITALIGN_TRNG in library CORERXIODBITALIGN_LIB.
@N: CG179 :"D:\Delme\SEV_PFSoC_OpenVX\component\work\CORERXIODBITALIGN_C0\CORERXIODBITALIGN_C0_0\rtl\vlog\core\CoreRxIODBitAlign.v":631:36:631:47|Removing redundant assignment.
@N: CG364 :"D:\Delme\SEV_PFSoC_OpenVX\component\work\CORERXIODBITALIGN_C0\CORERXIODBITALIGN_C0_0\rtl\vlog\core\CoreRxIODBitAlign_top.v":2:7:2:67|Synthesizing module CORERXIODBITALIGN_C0_CORERXIODBITALIGN_C0_0_CORERXIODBITALIGN in library CORERXIODBITALIGN_LIB.
@N: CG364 :"D:\Delme\SEV_PFSoC_OpenVX\component\work\CORERXIODBITALIGN_C0\CORERXIODBITALIGN_C0.v":25:7:25:26|Synthesizing module CORERXIODBITALIGN_C0 in library work.
@N: CG775 :"D:\Delme\SEV_PFSoC_OpenVX\component\work\CORERXIODBITALIGN_C1\CORERXIODBITALIGN_C1_0\rtl\vlog\core\CoreRxIODBitAlign_top.v":2:7:2:67|Component CORERXIODBITALIGN_C1_CORERXIODBITALIGN_C1_0_CORERXIODBITALIGN not found in library "work" or "__hyper__lib__", but found in library CORERXIODBITALIGN_LIB
@N: CG364 :"D:\Delme\SEV_PFSoC_OpenVX\component\work\CORERXIODBITALIGN_C1\CORERXIODBITALIGN_C1_0\rtl\vlog\core\CoreRxIODBitAlign.v":2:7:2:72|Synthesizing module CORERXIODBITALIGN_C1_CORERXIODBITALIGN_C1_0_CORERXIODBITALIGN_TRNG in library CORERXIODBITALIGN_LIB.
@N: CG179 :"D:\Delme\SEV_PFSoC_OpenVX\component\work\CORERXIODBITALIGN_C1\CORERXIODBITALIGN_C1_0\rtl\vlog\core\CoreRxIODBitAlign.v":631:36:631:47|Removing redundant assignment.
@N: CG364 :"D:\Delme\SEV_PFSoC_OpenVX\component\work\CORERXIODBITALIGN_C1\CORERXIODBITALIGN_C1_0\rtl\vlog\core\CoreRxIODBitAlign_top.v":2:7:2:67|Synthesizing module CORERXIODBITALIGN_C1_CORERXIODBITALIGN_C1_0_CORERXIODBITALIGN in library CORERXIODBITALIGN_LIB.
@N: CG364 :"D:\Delme\SEV_PFSoC_OpenVX\component\work\CORERXIODBITALIGN_C1\CORERXIODBITALIGN_C1.v":25:7:25:26|Synthesizing module CORERXIODBITALIGN_C1 in library work.
@N: CG775 :"D:\Delme\SEV_PFSoC_OpenVX\component\work\CORERXIODBITALIGN_C2\CORERXIODBITALIGN_C2_0\rtl\vlog\core\CoreRxIODBitAlign_top.v":2:7:2:67|Component CORERXIODBITALIGN_C2_CORERXIODBITALIGN_C2_0_CORERXIODBITALIGN not found in library "work" or "__hyper__lib__", but found in library CORERXIODBITALIGN_LIB
@N: CG364 :"D:\Delme\SEV_PFSoC_OpenVX\component\work\CORERXIODBITALIGN_C2\CORERXIODBITALIGN_C2_0\rtl\vlog\core\CoreRxIODBitAlign.v":2:7:2:72|Synthesizing module CORERXIODBITALIGN_C2_CORERXIODBITALIGN_C2_0_CORERXIODBITALIGN_TRNG in library CORERXIODBITALIGN_LIB.
@N: CG179 :"D:\Delme\SEV_PFSoC_OpenVX\component\work\CORERXIODBITALIGN_C2\CORERXIODBITALIGN_C2_0\rtl\vlog\core\CoreRxIODBitAlign.v":631:36:631:47|Removing redundant assignment.
@N: CG364 :"D:\Delme\SEV_PFSoC_OpenVX\component\work\CORERXIODBITALIGN_C2\CORERXIODBITALIGN_C2_0\rtl\vlog\core\CoreRxIODBitAlign_top.v":2:7:2:67|Synthesizing module CORERXIODBITALIGN_C2_CORERXIODBITALIGN_C2_0_CORERXIODBITALIGN in library CORERXIODBITALIGN_LIB.
@N: CG364 :"D:\Delme\SEV_PFSoC_OpenVX\component\work\CORERXIODBITALIGN_C2\CORERXIODBITALIGN_C2.v":25:7:25:26|Synthesizing module CORERXIODBITALIGN_C2 in library work.
@N: CG775 :"D:\Delme\SEV_PFSoC_OpenVX\component\work\CORERXIODBITALIGN_C3\CORERXIODBITALIGN_C3_0\rtl\vlog\core\CoreRxIODBitAlign_top.v":2:7:2:67|Component CORERXIODBITALIGN_C3_CORERXIODBITALIGN_C3_0_CORERXIODBITALIGN not found in library "work" or "__hyper__lib__", but found in library CORERXIODBITALIGN_LIB
@N: CG364 :"D:\Delme\SEV_PFSoC_OpenVX\component\work\CORERXIODBITALIGN_C3\CORERXIODBITALIGN_C3_0\rtl\vlog\core\CoreRxIODBitAlign.v":2:7:2:72|Synthesizing module CORERXIODBITALIGN_C3_CORERXIODBITALIGN_C3_0_CORERXIODBITALIGN_TRNG in library CORERXIODBITALIGN_LIB.
@N: CG179 :"D:\Delme\SEV_PFSoC_OpenVX\component\work\CORERXIODBITALIGN_C3\CORERXIODBITALIGN_C3_0\rtl\vlog\core\CoreRxIODBitAlign.v":631:36:631:47|Removing redundant assignment.
@N: CG364 :"D:\Delme\SEV_PFSoC_OpenVX\component\work\CORERXIODBITALIGN_C3\CORERXIODBITALIGN_C3_0\rtl\vlog\core\CoreRxIODBitAlign_top.v":2:7:2:67|Synthesizing module CORERXIODBITALIGN_C3_CORERXIODBITALIGN_C3_0_CORERXIODBITALIGN in library CORERXIODBITALIGN_LIB.
@N: CG364 :"D:\Delme\SEV_PFSoC_OpenVX\component\work\CORERXIODBITALIGN_C3\CORERXIODBITALIGN_C3.v":25:7:25:26|Synthesizing module CORERXIODBITALIGN_C3 in library work.
@N: CG364 :"D:\Microchip\Libero_SoC_v2022.2\SynplifyPro\lib\generic\acg5.v":357:7:357:16|Synthesizing module INBUF_DIFF in library work.
@N: CG364 :"D:\Delme\SEV_PFSoC_OpenVX\component\work\PF_IOD_GENERIC_RX_C0_TR\PF_IOD_GENERIC_RX_C0_TR_0\rtl\vlog\core\CoreBclkSclkAlign.v":17:7:17:73|Synthesizing module PF_IOD_GENERIC_RX_C0_TR_PF_IOD_GENERIC_RX_C0_TR_0_COREBCLKSCLKALIGN in library work.
@N: CG364 :"D:\Delme\SEV_PFSoC_OpenVX\component\Actel\DirectCore\COREBCLKSCLKALIGN\2.0.111\rtl\vlog\core\ICB_BclkSclkAlign.v":2:7:2:23|Synthesizing module ICB_BCLKSCLKALIGN in library work.
@N: CG364 :"D:\Delme\SEV_PFSoC_OpenVX\component\work\PF_IOD_GENERIC_RX_C0_TR\PF_IOD_GENERIC_RX_C0_TR.v":27:7:27:29|Synthesizing module PF_IOD_GENERIC_RX_C0_TR in library work.
@N: CG364 :"D:\Delme\SEV_PFSoC_OpenVX\component\polarfire_syn_comps.v":1470:7:1470:15|Synthesizing module HS_IO_CLK in library work.
@N: CG364 :"D:\Microchip\Libero_SoC_v2022.2\SynplifyPro\lib\generic\acg5.v":181:7:181:9|Synthesizing module MX2 in library work.
@N: CG364 :"D:\Delme\SEV_PFSoC_OpenVX\component\polarfire_syn_comps.v":1505:7:1505:21|Synthesizing module ICB_CLKDIVDELAY in library work.
@N: CG364 :"D:\Delme\SEV_PFSoC_OpenVX\component\work\PF_IOD_GENERIC_RX_C0\PF_CLK_DIV_FIFO\PF_IOD_GENERIC_RX_C0_PF_CLK_DIV_FIFO_PF_CLK_DIV_DELAY.v":5:7:5:59|Synthesizing module PF_IOD_GENERIC_RX_C0_PF_CLK_DIV_FIFO_PF_CLK_DIV_DELAY in library work.
@N: CG364 :"D:\Delme\SEV_PFSoC_OpenVX\component\work\PF_IOD_GENERIC_RX_C0\PF_CLK_DIV_RXCLK\PF_IOD_GENERIC_RX_C0_PF_CLK_DIV_RXCLK_PF_CLK_DIV_DELAY.v":5:7:5:60|Synthesizing module PF_IOD_GENERIC_RX_C0_PF_CLK_DIV_RXCLK_PF_CLK_DIV_DELAY in library work.
@N: CG364 :"D:\Delme\SEV_PFSoC_OpenVX\component\polarfire_syn_comps.v":1738:7:1738:9|Synthesizing module IOD in library work.
@N: CG364 :"D:\Delme\SEV_PFSoC_OpenVX\component\work\PF_IOD_GENERIC_RX_C0\PF_IOD_CLK_TRAINING\PF_IOD_GENERIC_RX_C0_PF_IOD_CLK_TRAINING_PF_IOD.v":5:7:5:53|Synthesizing module PF_IOD_GENERIC_RX_C0_PF_IOD_CLK_TRAINING_PF_IOD in library work.
@N: CG364 :"D:\Microchip\Libero_SoC_v2022.2\SynplifyPro\lib\generic\acg5.v":1781:7:1781:21|Synthesizing module INBUF_DIFF_MIPI in library work.
@N: CG364 :"D:\Delme\SEV_PFSoC_OpenVX\component\work\PF_IOD_GENERIC_RX_C0\PF_IOD_RX\PF_IOD_GENERIC_RX_C0_PF_IOD_RX_PF_IOD.v":5:7:5:43|Synthesizing module PF_IOD_GENERIC_RX_C0_PF_IOD_RX_PF_IOD in library work.
@N: CG364 :"D:\Delme\SEV_PFSoC_OpenVX\component\polarfire_syn_comps.v":1979:7:1979:14|Synthesizing module LANECTRL in library work.
@N: CG364 :"D:\Delme\SEV_PFSoC_OpenVX\component\work\PF_IOD_GENERIC_RX_C0\PF_LANECTRL_0\PF_LANECTRL_PAUSE_SYNC.v":13:7:13:63|Synthesizing module PF_IOD_GENERIC_RX_C0_PF_LANECTRL_0_PF_LANECTRL_PAUSE_SYNC in library work.
@N: CG364 :"D:\Microchip\Libero_SoC_v2022.2\SynplifyPro\lib\generic\acg5.v":4:7:4:9|Synthesizing module SLE in library work.
@N: CG364 :"D:\Delme\SEV_PFSoC_OpenVX\component\work\PF_IOD_GENERIC_RX_C0\PF_LANECTRL_0\PF_IOD_GENERIC_RX_C0_PF_LANECTRL_0_PF_LANECTRL.v":5:7:5:52|Synthesizing module PF_IOD_GENERIC_RX_C0_PF_LANECTRL_0_PF_LANECTRL in library work.
@N: CG364 :"D:\Delme\SEV_PFSoC_OpenVX\component\work\PF_IOD_GENERIC_RX_C0\PF_IOD_GENERIC_RX_C0.v":59:7:59:26|Synthesizing module PF_IOD_GENERIC_RX_C0 in library work.
@N: CG364 :"D:\Delme\SEV_PFSoC_OpenVX\component\work\CAM_IOD_TIP_TOP\CAM_IOD_TIP_TOP.v":9:7:9:21|Synthesizing module CAM_IOD_TIP_TOP in library work.
@N: CG364 :"D:\Delme\SEV_PFSoC_OpenVX\component\work\IMX334_IF_TOP\IMX334_IF_TOP.v":9:7:9:19|Synthesizing module IMX334_IF_TOP in library work.
@N: CG364 :"D:\Microchip\Libero_SoC_v2022.2\SynplifyPro\lib\generic\acg5.v":484:7:484:13|Synthesizing module RCLKINT in library work.
@N: CG364 :"D:\Delme\SEV_PFSoC_OpenVX\component\polarfire_syn_comps.v":9980:7:9980:14|Synthesizing module XCVR_PMA in library work.
@N: CG364 :"D:\Delme\SEV_PFSoC_OpenVX\component\work\PF_XCVR_ERM_C0\I_XCVR\PF_XCVR_ERM_C0_I_XCVR_PF_XCVR.v":5:7:5:35|Synthesizing module PF_XCVR_ERM_C0_I_XCVR_PF_XCVR in library work.
@N: CG364 :"D:\Delme\SEV_PFSoC_OpenVX\component\work\PF_XCVR_ERM_C0\PF_XCVR_ERM_C0.v":70:7:70:20|Synthesizing module PF_XCVR_ERM_C0 in library work.
@N: CG364 :"D:\Delme\SEV_PFSoC_OpenVX\hdl\video_axi_fifo.v":15:7:15:58|Synthesizing module ddr_rw_arbiter_C0_ddr_rw_arbiter_C0_0_video_axi_fifo in library work.
@N: CG364 :"D:\Delme\SEV_PFSoC_OpenVX\hdl\axi_lbus_corefifo_sync_scntr.v":16:7:16:63|Synthesizing module ddr_rw_arbiter_C0_ddr_rw_arbiter_C0_0_corefifo_sync_scntr in library work.
@N: CG364 :"D:\Delme\SEV_PFSoC_OpenVX\hdl\axi_lbus_corefifo_fwft.v":16:7:16:57|Synthesizing module ddr_rw_arbiter_C0_ddr_rw_arbiter_C0_0_corefifo_fwft in library work.
@N: CG179 :"D:\Delme\SEV_PFSoC_OpenVX\hdl\axi_lbus_corefifo_fwft.v":180:38:180:55|Removing redundant assignment.
@N: CG364 :"D:\Delme\SEV_PFSoC_OpenVX\hdl\axi_lbus_LSRAM_top.v":16:7:16:53|Synthesizing module ddr_rw_arbiter_C0_ddr_rw_arbiter_C0_0_LSRAM_top in library work.
@N: CG364 :"D:\Microchip\Libero_SoC_v2022.2\SynplifyPro\lib\generic\acg5.v":578:7:578:13|Synthesizing module RAM1K20 in library work.
@N: CG364 :"D:\Delme\SEV_PFSoC_OpenVX\hdl\axi_lbus_ram_wrapper.v":17:7:17:55|Synthesizing module ddr_rw_arbiter_C0_ddr_rw_arbiter_C0_0_ram_wrapper in library work.
@N: CG364 :"D:\Delme\SEV_PFSoC_OpenVX\hdl\video_axi_fifo.v":15:7:15:58|Synthesizing module ddr_rw_arbiter_C0_ddr_rw_arbiter_C0_0_video_axi_fifo in library work.
@N: CG364 :"D:\Delme\SEV_PFSoC_OpenVX\hdl\axi_lbus_corefifo_sync_scntr.v":16:7:16:63|Synthesizing module ddr_rw_arbiter_C0_ddr_rw_arbiter_C0_0_corefifo_sync_scntr in library work.
@N: CG364 :"D:\Delme\SEV_PFSoC_OpenVX\hdl\axi_lbus_corefifo_fwft.v":16:7:16:57|Synthesizing module ddr_rw_arbiter_C0_ddr_rw_arbiter_C0_0_corefifo_fwft in library work.
@N: CG364 :"D:\Delme\SEV_PFSoC_OpenVX\hdl\axi_lbus_LSRAM_top.v":16:7:16:53|Synthesizing module ddr_rw_arbiter_C0_ddr_rw_arbiter_C0_0_LSRAM_top in library work.
@N: CG794 :"D:\Delme\SEV_PFSoC_OpenVX\component\work\read_top\read_top.v":172:11:172:22|Using module read_demux from library work
@N: CG794 :"D:\Delme\SEV_PFSoC_OpenVX\component\work\read_top\read_top.v":195:9:195:18|Using module read_mux from library work
@N: CG794 :"D:\Delme\SEV_PFSoC_OpenVX\component\work\read_top\read_top.v":212:18:212:36|Using module request_scheduler from library work
@N: CG794 :"D:\Delme\SEV_PFSoC_OpenVX\component\work\write_top\write_top.v":197:12:197:24|Using module write_demux from library work
@N: CG794 :"D:\Delme\SEV_PFSoC_OpenVX\component\work\write_top\write_top.v":215:10:215:20|Using module write_mux from library work
@N: CG794 :"D:\Delme\SEV_PFSoC_OpenVX\component\work\video_processing\video_processing.v":156:0:156:15|Using module apb3_interface from library work
@N: CG794 :"D:\Delme\SEV_PFSoC_OpenVX\component\work\video_processing\video_processing.v":180:23:180:46|Using module Bayer_Interpolation_C0 from library work
@N: CG794 :"D:\Delme\SEV_PFSoC_OpenVX\component\work\video_processing\video_processing.v":197:20:197:40|Using module Gamma_Correction_C0 from library work
@N: CG794 :"D:\Delme\SEV_PFSoC_OpenVX\component\work\video_processing\video_processing.v":213:21:213:42|Using module Image_Enhancement_C0 from library work
@N: CG794 :"D:\Delme\SEV_PFSoC_OpenVX\component\work\video_processing\video_processing.v":230:18:230:36|Using module intensity_average from library work
@N: CG794 :"D:\Delme\SEV_PFSoC_OpenVX\component\work\video_processing\video_processing.v":244:14:244:28|Using module RGBtoYCbCr_C0 from library work
@N: CG794 :"D:\Delme\SEV_PFSoC_OpenVX\component\work\DDR4_RD_WR\DDR4_RD_WR.v":532:22:532:46|Using module Display_Controller_C0 from library work
@N: CG794 :"D:\Delme\SEV_PFSoC_OpenVX\component\work\DDR4_RD_WR\DDR4_RD_WR.v":550:11:550:22|Using module HDMI_TX_C0 from library work
@N: CG794 :"D:\Delme\SEV_PFSoC_OpenVX\component\work\DDR4_RD_WR\DDR4_RD_WR.v":764:14:764:28|Using module YCbCrtoRGB_C0 from library work
@N: CL134 :"D:\Delme\SEV_PFSoC_OpenVX\component\Actel\DirectCore\COREAXI4INTERCONNECT\2.8.103\rtl\vlog\core\Axi4Convertors\RAM_BLOCK.v":65:7:65:12|Found RAM mem, depth=64, width=41
@N: CL134 :"D:\Delme\SEV_PFSoC_OpenVX\component\Actel\DirectCore\COREAXI4INTERCONNECT\2.8.103\rtl\vlog\core\Axi4Convertors\RAM_BLOCK.v":65:7:65:12|Found RAM mem, depth=64, width=5
@N: CL134 :"D:\Delme\SEV_PFSoC_OpenVX\component\Actel\DirectCore\COREAXI4INTERCONNECT\2.8.103\rtl\vlog\core\Axi4Convertors\RAM_BLOCK.v":65:7:65:12|Found RAM mem, depth=256, width=5
@N: CL159 :"D:\Delme\SEV_PFSoC_OpenVX\component\Actel\DirectCore\COREAXI4INTERCONNECT\2.8.103\rtl\vlog\core\Axi4Convertors\SlaveConvertor.v":63:30:63:36|Input ARESETN is unused.
@N: CL159 :"D:\Delme\SEV_PFSoC_OpenVX\component\Actel\DirectCore\COREAXI4INTERCONNECT\2.8.103\rtl\vlog\core\Axi4Convertors\SlvClockDomainCrossing.v":35:26:35:32|Input SLV_CLK is unused.
@N: CL159 :"D:\Delme\SEV_PFSoC_OpenVX\component\Actel\DirectCore\COREAXI4INTERCONNECT\2.8.103\rtl\vlog\core\Axi4Convertors\SlvClockDomainCrossing.v":36:33:36:40|Input XBAR_CLK is unused.
@N: CL159 :"D:\Delme\SEV_PFSoC_OpenVX\component\Actel\DirectCore\COREAXI4INTERCONNECT\2.8.103\rtl\vlog\core\Axi4Convertors\SlvClockDomainCrossing.v":37:25:37:32|Input sysReset is unused.
@N: CL159 :"D:\Delme\SEV_PFSoC_OpenVX\component\Actel\DirectCore\COREAXI4INTERCONNECT\2.8.103\rtl\vlog\core\Axi4Convertors\SlvClockDomainCrossing.v":38:25:38:38|Input ACLK_syncReset is unused.
@N: CL159 :"D:\Delme\SEV_PFSoC_OpenVX\component\Actel\DirectCore\COREAXI4INTERCONNECT\2.8.103\rtl\vlog\core\Axi4Convertors\SlvAxi4ProtConvAXI4ID.v":42:30:42:37|Input SLAVE_ID is unused.
@N: CL159 :"D:\Delme\SEV_PFSoC_OpenVX\component\Actel\DirectCore\COREAXI4INTERCONNECT\2.8.103\rtl\vlog\core\Axi4Convertors\SlvProtocolConverter.v":95:33:95:44|Input int_slaveWID is unused.
@N: CL159 :"D:\Delme\SEV_PFSoC_OpenVX\component\Actel\DirectCore\COREAXI4INTERCONNECT\2.8.103\rtl\vlog\core\Axi4Convertors\SlvDataWidthConverter.v":53:26:53:29|Input ACLK is unused.
@N: CL159 :"D:\Delme\SEV_PFSoC_OpenVX\component\Actel\DirectCore\COREAXI4INTERCONNECT\2.8.103\rtl\vlog\core\Axi4Convertors\SlvDataWidthConverter.v":54:25:54:32|Input sysReset is unused.
@N: CL201 :"D:\Delme\SEV_PFSoC_OpenVX\component\Actel\DirectCore\COREAXI4INTERCONNECT\2.8.103\rtl\vlog\core\Axi4Convertors\RegSliceFull.v":185:1:185:6|Trying to extract state machine for register currState.
@N: CL201 :"D:\Delme\SEV_PFSoC_OpenVX\component\Actel\DirectCore\COREAXI4INTERCONNECT\2.8.103\rtl\vlog\core\Axi4Convertors\RegSliceFull.v":185:1:185:6|Trying to extract state machine for register currState.
@N: CL201 :"D:\Delme\SEV_PFSoC_OpenVX\component\Actel\DirectCore\COREAXI4INTERCONNECT\2.8.103\rtl\vlog\core\Axi4Convertors\RegSliceFull.v":185:1:185:6|Trying to extract state machine for register currState.
@N: CL201 :"D:\Delme\SEV_PFSoC_OpenVX\component\Actel\DirectCore\COREAXI4INTERCONNECT\2.8.103\rtl\vlog\core\Axi4Convertors\RegSliceFull.v":185:1:185:6|Trying to extract state machine for register currState.
@N: CL159 :"D:\Delme\SEV_PFSoC_OpenVX\component\Actel\DirectCore\COREAXI4INTERCONNECT\2.8.103\rtl\vlog\core\Axi4Convertors\MstrProtocolConverter.v":43:38:43:41|Input ACLK is unused.
@N: CL159 :"D:\Delme\SEV_PFSoC_OpenVX\component\Actel\DirectCore\COREAXI4INTERCONNECT\2.8.103\rtl\vlog\core\Axi4Convertors\MstrProtocolConverter.v":44:37:44:44|Input sysReset is unused.
@N: CL159 :"D:\Delme\SEV_PFSoC_OpenVX\component\Actel\DirectCore\COREAXI4INTERCONNECT\2.8.103\rtl\vlog\core\Axi4Convertors\MstrProtocolConverter.v":142:31:142:40|Input MASTER_WID is unused.
@N: CL159 :"D:\Delme\SEV_PFSoC_OpenVX\component\Actel\DirectCore\COREAXI4INTERCONNECT\2.8.103\rtl\vlog\core\Axi4Convertors\MasterConvertor.v":57:25:57:31|Input ARESETN is unused.
@N: CL159 :"D:\Delme\SEV_PFSoC_OpenVX\component\Actel\DirectCore\COREAXI4INTERCONNECT\2.8.103\rtl\vlog\core\Axi4Convertors\MasterConvertor.v":174:18:174:29|Input MASTER_HADDR is unused.
@N: CL159 :"D:\Delme\SEV_PFSoC_OpenVX\component\Actel\DirectCore\COREAXI4INTERCONNECT\2.8.103\rtl\vlog\core\Axi4Convertors\MasterConvertor.v":175:17:175:29|Input MASTER_HBURST is unused.
@N: CL159 :"D:\Delme\SEV_PFSoC_OpenVX\component\Actel\DirectCore\COREAXI4INTERCONNECT\2.8.103\rtl\vlog\core\Axi4Convertors\MasterConvertor.v":176:12:176:27|Input MASTER_HMASTLOCK is unused.
@N: CL159 :"D:\Delme\SEV_PFSoC_OpenVX\component\Actel\DirectCore\COREAXI4INTERCONNECT\2.8.103\rtl\vlog\core\Axi4Convertors\MasterConvertor.v":177:17:177:28|Input MASTER_HPROT is unused.
@N: CL159 :"D:\Delme\SEV_PFSoC_OpenVX\component\Actel\DirectCore\COREAXI4INTERCONNECT\2.8.103\rtl\vlog\core\Axi4Convertors\MasterConvertor.v":178:17:178:28|Input MASTER_HSIZE is unused.
@N: CL159 :"D:\Delme\SEV_PFSoC_OpenVX\component\Actel\DirectCore\COREAXI4INTERCONNECT\2.8.103\rtl\vlog\core\Axi4Convertors\MasterConvertor.v":179:12:179:25|Input MASTER_HNONSEC is unused.
@N: CL159 :"D:\Delme\SEV_PFSoC_OpenVX\component\Actel\DirectCore\COREAXI4INTERCONNECT\2.8.103\rtl\vlog\core\Axi4Convertors\MasterConvertor.v":180:17:180:29|Input MASTER_HTRANS is unused.
@N: CL159 :"D:\Delme\SEV_PFSoC_OpenVX\component\Actel\DirectCore\COREAXI4INTERCONNECT\2.8.103\rtl\vlog\core\Axi4Convertors\MasterConvertor.v":181:35:181:47|Input MASTER_HWDATA is unused.
@N: CL159 :"D:\Delme\SEV_PFSoC_OpenVX\component\Actel\DirectCore\COREAXI4INTERCONNECT\2.8.103\rtl\vlog\core\Axi4Convertors\MasterConvertor.v":183:12:183:24|Input MASTER_HWRITE is unused.
@N: CL159 :"D:\Delme\SEV_PFSoC_OpenVX\component\Actel\DirectCore\COREAXI4INTERCONNECT\2.8.103\rtl\vlog\core\Axi4Convertors\MasterConvertor.v":186:12:186:22|Input MASTER_HSEL is unused.
@N: CL159 :"D:\Delme\SEV_PFSoC_OpenVX\component\Actel\DirectCore\COREAXI4INTERCONNECT\2.8.103\rtl\vlog\core\Axi4Convertors\MstrClockDomainCrossing.v":35:26:35:32|Input MST_CLK is unused.
@N: CL159 :"D:\Delme\SEV_PFSoC_OpenVX\component\Actel\DirectCore\COREAXI4INTERCONNECT\2.8.103\rtl\vlog\core\Axi4Convertors\MstrClockDomainCrossing.v":36:33:36:40|Input XBAR_CLK is unused.
@N: CL159 :"D:\Delme\SEV_PFSoC_OpenVX\component\Actel\DirectCore\COREAXI4INTERCONNECT\2.8.103\rtl\vlog\core\Axi4Convertors\MstrClockDomainCrossing.v":37:25:37:32|Input sysReset is unused.
@N: CL159 :"D:\Delme\SEV_PFSoC_OpenVX\component\Actel\DirectCore\COREAXI4INTERCONNECT\2.8.103\rtl\vlog\core\Axi4Convertors\MstrClockDomainCrossing.v":38:25:38:38|Input ACLK_syncReset is unused.
@N: CL159 :"D:\Delme\SEV_PFSoC_OpenVX\component\Actel\DirectCore\COREAXI4INTERCONNECT\2.8.103\rtl\vlog\core\Axi4Convertors\DWC_DownConv_readWidthConv.v":103:21:103:29|Input SLAVE_RID is unused.
@N: CL159 :"D:\Delme\SEV_PFSoC_OpenVX\component\Actel\DirectCore\COREAXI4INTERCONNECT\2.8.103\rtl\vlog\core\Axi4Convertors\DWC_DownConv_writeWidthConv.v":104:21:104:29|Input SLAVE_BID is unused.
@N: CL159 :"D:\Delme\SEV_PFSoC_OpenVX\component\Actel\DirectCore\COREAXI4INTERCONNECT\2.8.103\rtl\vlog\core\Axi4Convertors\DWC_DownConv_writeWidthConv.v":138:15:138:26|Input MASTER_WLAST is unused.
@N: CL201 :"D:\Delme\SEV_PFSoC_OpenVX\component\Actel\DirectCore\COREAXI4INTERCONNECT\2.8.103\rtl\vlog\core\Axi4Convertors\RegSliceFull.v":185:1:185:6|Trying to extract state machine for register currState.
@N: CL201 :"D:\Delme\SEV_PFSoC_OpenVX\component\Actel\DirectCore\COREAXI4INTERCONNECT\2.8.103\rtl\vlog\core\Axi4Convertors\RegSliceFull.v":185:1:185:6|Trying to extract state machine for register currState.
@N: CL201 :"D:\Delme\SEV_PFSoC_OpenVX\component\Actel\DirectCore\COREAXI4INTERCONNECT\2.8.103\rtl\vlog\core\Axi4Convertors\RegSliceFull.v":185:1:185:6|Trying to extract state machine for register currState.
@N: CL201 :"D:\Delme\SEV_PFSoC_OpenVX\component\Actel\DirectCore\COREAXI4INTERCONNECT\2.8.103\rtl\vlog\core\Axi4Convertors\RegSliceFull.v":185:1:185:6|Trying to extract state machine for register currState.
@N: CL159 :"D:\Delme\SEV_PFSoC_OpenVX\component\Actel\DirectCore\COREAXI4INTERCONNECT\2.8.103\rtl\vlog\core\CoreAxi4Interconnect.v":33:2:33:7|Input M_CLK0 is unused.
@N: CL159 :"D:\Delme\SEV_PFSoC_OpenVX\component\Actel\DirectCore\COREAXI4INTERCONNECT\2.8.103\rtl\vlog\core\CoreAxi4Interconnect.v":34:2:34:7|Input M_CLK1 is unused.
@N: CL159 :"D:\Delme\SEV_PFSoC_OpenVX\component\Actel\DirectCore\COREAXI4INTERCONNECT\2.8.103\rtl\vlog\core\CoreAxi4Interconnect.v":35:2:35:7|Input M_CLK2 is unused.
@N: CL159 :"D:\Delme\SEV_PFSoC_OpenVX\component\Actel\DirectCore\COREAXI4INTERCONNECT\2.8.103\rtl\vlog\core\CoreAxi4Interconnect.v":36:2:36:7|Input M_CLK3 is unused.
@N: CL159 :"D:\Delme\SEV_PFSoC_OpenVX\component\Actel\DirectCore\COREAXI4INTERCONNECT\2.8.103\rtl\vlog\core\CoreAxi4Interconnect.v":37:2:37:7|Input M_CLK4 is unused.
@N: CL159 :"D:\Delme\SEV_PFSoC_OpenVX\component\Actel\DirectCore\COREAXI4INTERCONNECT\2.8.103\rtl\vlog\core\CoreAxi4Interconnect.v":38:2:38:7|Input M_CLK5 is unused.
@N: CL159 :"D:\Delme\SEV_PFSoC_OpenVX\component\Actel\DirectCore\COREAXI4INTERCONNECT\2.8.103\rtl\vlog\core\CoreAxi4Interconnect.v":39:2:39:7|Input M_CLK6 is unused.
@N: CL159 :"D:\Delme\SEV_PFSoC_OpenVX\component\Actel\DirectCore\COREAXI4INTERCONNECT\2.8.103\rtl\vlog\core\CoreAxi4Interconnect.v":40:2:40:7|Input M_CLK7 is unused.
@N: CL159 :"D:\Delme\SEV_PFSoC_OpenVX\component\Actel\DirectCore\COREAXI4INTERCONNECT\2.8.103\rtl\vlog\core\CoreAxi4Interconnect.v":41:2:41:7|Input M_CLK8 is unused.
@N: CL159 :"D:\Delme\SEV_PFSoC_OpenVX\component\Actel\DirectCore\COREAXI4INTERCONNECT\2.8.103\rtl\vlog\core\CoreAxi4Interconnect.v":42:2:42:7|Input M_CLK9 is unused.
@N: CL159 :"D:\Delme\SEV_PFSoC_OpenVX\component\Actel\DirectCore\COREAXI4INTERCONNECT\2.8.103\rtl\vlog\core\CoreAxi4Interconnect.v":43:2:43:8|Input M_CLK10 is unused.
@N: CL159 :"D:\Delme\SEV_PFSoC_OpenVX\component\Actel\DirectCore\COREAXI4INTERCONNECT\2.8.103\rtl\vlog\core\CoreAxi4Interconnect.v":44:2:44:8|Input M_CLK11 is unused.
@N: CL159 :"D:\Delme\SEV_PFSoC_OpenVX\component\Actel\DirectCore\COREAXI4INTERCONNECT\2.8.103\rtl\vlog\core\CoreAxi4Interconnect.v":45:2:45:8|Input M_CLK12 is unused.
@N: CL159 :"D:\Delme\SEV_PFSoC_OpenVX\component\Actel\DirectCore\COREAXI4INTERCONNECT\2.8.103\rtl\vlog\core\CoreAxi4Interconnect.v":46:2:46:8|Input M_CLK13 is unused.
@N: CL159 :"D:\Delme\SEV_PFSoC_OpenVX\component\Actel\DirectCore\COREAXI4INTERCONNECT\2.8.103\rtl\vlog\core\CoreAxi4Interconnect.v":47:2:47:8|Input M_CLK14 is unused.
@N: CL159 :"D:\Delme\SEV_PFSoC_OpenVX\component\Actel\DirectCore\COREAXI4INTERCONNECT\2.8.103\rtl\vlog\core\CoreAxi4Interconnect.v":48:2:48:8|Input M_CLK15 is unused.
@N: CL159 :"D:\Delme\SEV_PFSoC_OpenVX\component\Actel\DirectCore\COREAXI4INTERCONNECT\2.8.103\rtl\vlog\core\CoreAxi4Interconnect.v":50:2:50:7|Input S_CLK0 is unused.
@N: CL159 :"D:\Delme\SEV_PFSoC_OpenVX\component\Actel\DirectCore\COREAXI4INTERCONNECT\2.8.103\rtl\vlog\core\CoreAxi4Interconnect.v":51:2:51:7|Input S_CLK1 is unused.
@N: CL159 :"D:\Delme\SEV_PFSoC_OpenVX\component\Actel\DirectCore\COREAXI4INTERCONNECT\2.8.103\rtl\vlog\core\CoreAxi4Interconnect.v":52:2:52:7|Input S_CLK2 is unused.
@N: CL159 :"D:\Delme\SEV_PFSoC_OpenVX\component\Actel\DirectCore\COREAXI4INTERCONNECT\2.8.103\rtl\vlog\core\CoreAxi4Interconnect.v":53:2:53:7|Input S_CLK3 is unused.
@N: CL159 :"D:\Delme\SEV_PFSoC_OpenVX\component\Actel\DirectCore\COREAXI4INTERCONNECT\2.8.103\rtl\vlog\core\CoreAxi4Interconnect.v":54:2:54:7|Input S_CLK4 is unused.
@N: CL159 :"D:\Delme\SEV_PFSoC_OpenVX\component\Actel\DirectCore\COREAXI4INTERCONNECT\2.8.103\rtl\vlog\core\CoreAxi4Interconnect.v":55:2:55:7|Input S_CLK5 is unused.
@N: CL159 :"D:\Delme\SEV_PFSoC_OpenVX\component\Actel\DirectCore\COREAXI4INTERCONNECT\2.8.103\rtl\vlog\core\CoreAxi4Interconnect.v":56:2:56:7|Input S_CLK6 is unused.
@N: CL159 :"D:\Delme\SEV_PFSoC_OpenVX\component\Actel\DirectCore\COREAXI4INTERCONNECT\2.8.103\rtl\vlog\core\CoreAxi4Interconnect.v":57:2:57:7|Input S_CLK7 is unused.
@N: CL159 :"D:\Delme\SEV_PFSoC_OpenVX\component\Actel\DirectCore\COREAXI4INTERCONNECT\2.8.103\rtl\vlog\core\CoreAxi4Interconnect.v":60:2:60:7|Input S_CLK8 is unused.
@N: CL159 :"D:\Delme\SEV_PFSoC_OpenVX\component\Actel\DirectCore\COREAXI4INTERCONNECT\2.8.103\rtl\vlog\core\CoreAxi4Interconnect.v":61:2:61:7|Input S_CLK9 is unused.
@N: CL159 :"D:\Delme\SEV_PFSoC_OpenVX\component\Actel\DirectCore\COREAXI4INTERCONNECT\2.8.103\rtl\vlog\core\CoreAxi4Interconnect.v":62:2:62:8|Input S_CLK10 is unused.
@N: CL159 :"D:\Delme\SEV_PFSoC_OpenVX\component\Actel\DirectCore\COREAXI4INTERCONNECT\2.8.103\rtl\vlog\core\CoreAxi4Interconnect.v":63:2:63:8|Input S_CLK11 is unused.
@N: CL159 :"D:\Delme\SEV_PFSoC_OpenVX\component\Actel\DirectCore\COREAXI4INTERCONNECT\2.8.103\rtl\vlog\core\CoreAxi4Interconnect.v":64:2:64:8|Input S_CLK12 is unused.
@N: CL159 :"D:\Delme\SEV_PFSoC_OpenVX\component\Actel\DirectCore\COREAXI4INTERCONNECT\2.8.103\rtl\vlog\core\CoreAxi4Interconnect.v":65:2:65:8|Input S_CLK13 is unused.
@N: CL159 :"D:\Delme\SEV_PFSoC_OpenVX\component\Actel\DirectCore\COREAXI4INTERCONNECT\2.8.103\rtl\vlog\core\CoreAxi4Interconnect.v":66:2:66:8|Input S_CLK14 is unused.
@N: CL159 :"D:\Delme\SEV_PFSoC_OpenVX\component\Actel\DirectCore\COREAXI4INTERCONNECT\2.8.103\rtl\vlog\core\CoreAxi4Interconnect.v":67:2:67:8|Input S_CLK15 is unused.
@N: CL159 :"D:\Delme\SEV_PFSoC_OpenVX\component\Actel\DirectCore\COREAXI4INTERCONNECT\2.8.103\rtl\vlog\core\CoreAxi4Interconnect.v":68:2:68:8|Input S_CLK16 is unused.
@N: CL159 :"D:\Delme\SEV_PFSoC_OpenVX\component\Actel\DirectCore\COREAXI4INTERCONNECT\2.8.103\rtl\vlog\core\CoreAxi4Interconnect.v":69:2:69:8|Input S_CLK17 is unused.
@N: CL159 :"D:\Delme\SEV_PFSoC_OpenVX\component\Actel\DirectCore\COREAXI4INTERCONNECT\2.8.103\rtl\vlog\core\CoreAxi4Interconnect.v":70:2:70:8|Input S_CLK18 is unused.
@N: CL159 :"D:\Delme\SEV_PFSoC_OpenVX\component\Actel\DirectCore\COREAXI4INTERCONNECT\2.8.103\rtl\vlog\core\CoreAxi4Interconnect.v":71:2:71:8|Input S_CLK19 is unused.
@N: CL159 :"D:\Delme\SEV_PFSoC_OpenVX\component\Actel\DirectCore\COREAXI4INTERCONNECT\2.8.103\rtl\vlog\core\CoreAxi4Interconnect.v":72:2:72:8|Input S_CLK20 is unused.
@N: CL159 :"D:\Delme\SEV_PFSoC_OpenVX\component\Actel\DirectCore\COREAXI4INTERCONNECT\2.8.103\rtl\vlog\core\CoreAxi4Interconnect.v":73:2:73:8|Input S_CLK21 is unused.
@N: CL159 :"D:\Delme\SEV_PFSoC_OpenVX\component\Actel\DirectCore\COREAXI4INTERCONNECT\2.8.103\rtl\vlog\core\CoreAxi4Interconnect.v":74:2:74:8|Input S_CLK22 is unused.
@N: CL159 :"D:\Delme\SEV_PFSoC_OpenVX\component\Actel\DirectCore\COREAXI4INTERCONNECT\2.8.103\rtl\vlog\core\CoreAxi4Interconnect.v":75:2:75:8|Input S_CLK23 is unused.
@N: CL159 :"D:\Delme\SEV_PFSoC_OpenVX\component\Actel\DirectCore\COREAXI4INTERCONNECT\2.8.103\rtl\vlog\core\CoreAxi4Interconnect.v":76:2:76:8|Input S_CLK24 is unused.
@N: CL159 :"D:\Delme\SEV_PFSoC_OpenVX\component\Actel\DirectCore\COREAXI4INTERCONNECT\2.8.103\rtl\vlog\core\CoreAxi4Interconnect.v":77:2:77:8|Input S_CLK25 is unused.
@N: CL159 :"D:\Delme\SEV_PFSoC_OpenVX\component\Actel\DirectCore\COREAXI4INTERCONNECT\2.8.103\rtl\vlog\core\CoreAxi4Interconnect.v":78:2:78:8|Input S_CLK26 is unused.
@N: CL159 :"D:\Delme\SEV_PFSoC_OpenVX\component\Actel\DirectCore\COREAXI4INTERCONNECT\2.8.103\rtl\vlog\core\CoreAxi4Interconnect.v":79:2:79:8|Input S_CLK27 is unused.
@N: CL159 :"D:\Delme\SEV_PFSoC_OpenVX\component\Actel\DirectCore\COREAXI4INTERCONNECT\2.8.103\rtl\vlog\core\CoreAxi4Interconnect.v":80:2:80:8|Input S_CLK28 is unused.
@N: CL159 :"D:\Delme\SEV_PFSoC_OpenVX\component\Actel\DirectCore\COREAXI4INTERCONNECT\2.8.103\rtl\vlog\core\CoreAxi4Interconnect.v":81:2:81:8|Input S_CLK29 is unused.
@N: CL159 :"D:\Delme\SEV_PFSoC_OpenVX\component\Actel\DirectCore\COREAXI4INTERCONNECT\2.8.103\rtl\vlog\core\CoreAxi4Interconnect.v":82:2:82:8|Input S_CLK30 is unused.
@N: CL159 :"D:\Delme\SEV_PFSoC_OpenVX\component\Actel\DirectCore\COREAXI4INTERCONNECT\2.8.103\rtl\vlog\core\CoreAxi4Interconnect.v":83:2:83:8|Input S_CLK31 is unused.
@N: CL159 :"D:\Delme\SEV_PFSoC_OpenVX\component\Actel\DirectCore\COREAXI4INTERCONNECT\2.8.103\rtl\vlog\core\CoreAxi4Interconnect.v":100:2:100:13|Input MASTER1_AWID is unused.
@N: CL159 :"D:\Delme\SEV_PFSoC_OpenVX\component\Actel\DirectCore\COREAXI4INTERCONNECT\2.8.103\rtl\vlog\core\CoreAxi4Interconnect.v":101:2:101:15|Input MASTER1_AWADDR is unused.
@N: CL159 :"D:\Delme\SEV_PFSoC_OpenVX\component\Actel\DirectCore\COREAXI4INTERCONNECT\2.8.103\rtl\vlog\core\CoreAxi4Interconnect.v":102:2:102:14|Input MASTER1_AWLEN is unused.
@N: CL159 :"D:\Delme\SEV_PFSoC_OpenVX\component\Actel\DirectCore\COREAXI4INTERCONNECT\2.8.103\rtl\vlog\core\CoreAxi4Interconnect.v":103:2:103:15|Input MASTER1_AWSIZE is unused.
@N: CL159 :"D:\Delme\SEV_PFSoC_OpenVX\component\Actel\DirectCore\COREAXI4INTERCONNECT\2.8.103\rtl\vlog\core\CoreAxi4Interconnect.v":104:2:104:16|Input MASTER1_AWBURST is unused.
@N: CL159 :"D:\Delme\SEV_PFSoC_OpenVX\component\Actel\DirectCore\COREAXI4INTERCONNECT\2.8.103\rtl\vlog\core\CoreAxi4Interconnect.v":105:2:105:15|Input MASTER1_AWLOCK is unused.
@N: CL159 :"D:\Delme\SEV_PFSoC_OpenVX\component\Actel\DirectCore\COREAXI4INTERCONNECT\2.8.103\rtl\vlog\core\CoreAxi4Interconnect.v":106:2:106:16|Input MASTER1_AWCACHE is unused.
@N: CL159 :"D:\Delme\SEV_PFSoC_OpenVX\component\Actel\DirectCore\COREAXI4INTERCONNECT\2.8.103\rtl\vlog\core\CoreAxi4Interconnect.v":107:2:107:15|Input MASTER1_AWPROT is unused.
@N: CL159 :"D:\Delme\SEV_PFSoC_OpenVX\component\Actel\DirectCore\COREAXI4INTERCONNECT\2.8.103\rtl\vlog\core\CoreAxi4Interconnect.v":108:2:108:17|Input MASTER1_AWREGION is unused.
@N: CL159 :"D:\Delme\SEV_PFSoC_OpenVX\component\Actel\DirectCore\COREAXI4INTERCONNECT\2.8.103\rtl\vlog\core\CoreAxi4Interconnect.v":109:2:109:14|Input MASTER1_AWQOS is unused.
@N: CL159 :"D:\Delme\SEV_PFSoC_OpenVX\component\Actel\DirectCore\COREAXI4INTERCONNECT\2.8.103\rtl\vlog\core\CoreAxi4Interconnect.v":110:2:110:15|Input MASTER1_AWUSER is unused.
@N: CL159 :"D:\Delme\SEV_PFSoC_OpenVX\component\Actel\DirectCore\COREAXI4INTERCONNECT\2.8.103\rtl\vlog\core\CoreAxi4Interconnect.v":111:2:111:16|Input MASTER1_AWVALID is unused.
@N: CL159 :"D:\Delme\SEV_PFSoC_OpenVX\component\Actel\DirectCore\COREAXI4INTERCONNECT\2.8.103\rtl\vlog\core\CoreAxi4Interconnect.v":114:2:114:13|Input MASTER2_AWID is unused.
@N: CL159 :"D:\Delme\SEV_PFSoC_OpenVX\component\Actel\DirectCore\COREAXI4INTERCONNECT\2.8.103\rtl\vlog\core\CoreAxi4Interconnect.v":115:2:115:15|Input MASTER2_AWADDR is unused.
@N: CL159 :"D:\Delme\SEV_PFSoC_OpenVX\component\Actel\DirectCore\COREAXI4INTERCONNECT\2.8.103\rtl\vlog\core\CoreAxi4Interconnect.v":116:2:116:14|Input MASTER2_AWLEN is unused.
@N: CL159 :"D:\Delme\SEV_PFSoC_OpenVX\component\Actel\DirectCore\COREAXI4INTERCONNECT\2.8.103\rtl\vlog\core\CoreAxi4Interconnect.v":117:2:117:15|Input MASTER2_AWSIZE is unused.
@N: CL159 :"D:\Delme\SEV_PFSoC_OpenVX\component\Actel\DirectCore\COREAXI4INTERCONNECT\2.8.103\rtl\vlog\core\CoreAxi4Interconnect.v":118:2:118:16|Input MASTER2_AWBURST is unused.
@N: CL159 :"D:\Delme\SEV_PFSoC_OpenVX\component\Actel\DirectCore\COREAXI4INTERCONNECT\2.8.103\rtl\vlog\core\CoreAxi4Interconnect.v":119:2:119:15|Input MASTER2_AWLOCK is unused.
@N: CL159 :"D:\Delme\SEV_PFSoC_OpenVX\component\Actel\DirectCore\COREAXI4INTERCONNECT\2.8.103\rtl\vlog\core\CoreAxi4Interconnect.v":120:2:120:16|Input MASTER2_AWCACHE is unused.
@N: CL159 :"D:\Delme\SEV_PFSoC_OpenVX\component\Actel\DirectCore\COREAXI4INTERCONNECT\2.8.103\rtl\vlog\core\CoreAxi4Interconnect.v":121:2:121:15|Input MASTER2_AWPROT is unused.
@N: CL159 :"D:\Delme\SEV_PFSoC_OpenVX\component\Actel\DirectCore\COREAXI4INTERCONNECT\2.8.103\rtl\vlog\core\CoreAxi4Interconnect.v":122:2:122:17|Input MASTER2_AWREGION is unused.
@N: CL159 :"D:\Delme\SEV_PFSoC_OpenVX\component\Actel\DirectCore\COREAXI4INTERCONNECT\2.8.103\rtl\vlog\core\CoreAxi4Interconnect.v":123:2:123:14|Input MASTER2_AWQOS is unused.
@N: CL201 :"D:\Delme\SEV_PFSoC_OpenVX\hdl\ddr_rw_arbiter_lpddr4.v":400:0:400:5|Trying to extract state machine for register video_bus_state.
@N: CL201 :"D:\Delme\SEV_PFSoC_OpenVX\hdl\ddr_rw_arbiter_lpddr4.v":303:0:303:5|Trying to extract state machine for register local_wbus_state.
@N: CL201 :"D:\Delme\SEV_PFSoC_OpenVX\component\Actel\DirectCore\COREBCLKSCLKALIGN\2.0.111\rtl\vlog\core\ICB_BclkSclkAlign.v":214:3:214:8|Trying to extract state machine for register clkalign_curr_state.
@N: CL201 :"D:\Delme\SEV_PFSoC_OpenVX\component\work\CORERXIODBITALIGN_C3\CORERXIODBITALIGN_C3_0\rtl\vlog\core\CoreRxIODBitAlign.v":269:3:269:8|Trying to extract state machine for register bitalign_curr_state.
@N: CL201 :"D:\Delme\SEV_PFSoC_OpenVX\component\work\CORERXIODBITALIGN_C2\CORERXIODBITALIGN_C2_0\rtl\vlog\core\CoreRxIODBitAlign.v":269:3:269:8|Trying to extract state machine for register bitalign_curr_state.
@N: CL201 :"D:\Delme\SEV_PFSoC_OpenVX\component\work\CORERXIODBITALIGN_C1\CORERXIODBITALIGN_C1_0\rtl\vlog\core\CoreRxIODBitAlign.v":269:3:269:8|Trying to extract state machine for register bitalign_curr_state.
@N: CL201 :"D:\Delme\SEV_PFSoC_OpenVX\component\work\CORERXIODBITALIGN_C0\CORERXIODBITALIGN_C0_0\rtl\vlog\core\CoreRxIODBitAlign.v":269:3:269:8|Trying to extract state machine for register bitalign_curr_state.
@N: CL135 :"D:\Delme\SEV_PFSoC_OpenVX\component\Microsemi\SolutionCore\mipicsi2rxdecoderPF\4.4.0\RTL\mipicsi2rxdecoderPF.v":1514:2:1514:7|Found sequential shift data_type_o with address depth of 3 words and data bit width of 6.
@N: CL135 :"D:\Delme\SEV_PFSoC_OpenVX\component\Microsemi\SolutionCore\mipicsi2rxdecoderPF\4.4.0\RTL\mipicsi2rxdecoderPF.v":1569:2:1569:7|Found sequential shift word_count_o with address depth of 3 words and data bit width of 16.
@N: CL135 :"D:\Delme\SEV_PFSoC_OpenVX\component\Microsemi\SolutionCore\mipicsi2rxdecoderPF\4.4.0\RTL\mipicsi2rxdecoderPF.v":1548:2:1548:7|Found sequential shift ecc_error_o with address depth of 3 words and data bit width of 1.
@N: CL135 :"D:\Delme\SEV_PFSoC_OpenVX\component\Microsemi\SolutionCore\mipicsi2rxdecoderPF\4.4.0\RTL\mipicsi2rxdecoderPF.v":1588:2:1588:7|Found sequential shift virtual_channel_o with address depth of 3 words and data bit width of 2.
@N: CL201 :"D:\Delme\SEV_PFSoC_OpenVX\component\Microsemi\SolutionCore\mipicsi2rxdecoderPF\4.4.0\RTL\mipicsi2rxdecoderPF.v":1125:10:1125:15|Trying to extract state machine for register genblk2.state_FS.
@N: CL201 :"D:\Delme\SEV_PFSoC_OpenVX\component\Microsemi\SolutionCore\mipicsi2rxdecoderPF\4.4.0\RTL\mipicsi2rxdecoderPF.v":6133:12:6133:17|Trying to extract state machine for register genblk7.pix_distribute_4lane.
@N: CL135 :"D:\Delme\SEV_PFSoC_OpenVX\component\Microsemi\SolutionCore\mipicsi2rxdecoderPF\4.4.0\RTL\mipicsi2rxdecoderPF.v":1949:8:1949:13|Found sequential shift genblk1.L0_data_in_reg5 with address depth of 3 words and data bit width of 8.
@N: CL135 :"D:\Delme\SEV_PFSoC_OpenVX\component\Microsemi\SolutionCore\mipicsi2rxdecoderPF\4.4.0\RTL\mipicsi2rxdecoderPF.v":2982:8:2982:13|Found sequential shift genblk2.L1_data_in_reg5 with address depth of 3 words and data bit width of 8.
@N: CL135 :"D:\Delme\SEV_PFSoC_OpenVX\component\Microsemi\SolutionCore\mipicsi2rxdecoderPF\4.4.0\RTL\mipicsi2rxdecoderPF.v":3146:8:3146:13|Found sequential shift genblk3.L2_data_in_reg5 with address depth of 3 words and data bit width of 8.
@N: CL135 :"D:\Delme\SEV_PFSoC_OpenVX\component\Microsemi\SolutionCore\mipicsi2rxdecoderPF\4.4.0\RTL\mipicsi2rxdecoderPF.v":3311:8:3311:13|Found sequential shift genblk4.L3_data_in_reg5 with address depth of 3 words and data bit width of 8.
@N: CL201 :"D:\Delme\SEV_PFSoC_OpenVX\component\Microsemi\SolutionCore\mipicsi2rxdecoderPF\4.4.0\RTL\mipicsi2rxdecoderPF.v":2557:2:2557:7|Trying to extract state machine for register genblk1.state_3.
@N: CL201 :"D:\Delme\SEV_PFSoC_OpenVX\component\Microsemi\SolutionCore\mipicsi2rxdecoderPF\4.4.0\RTL\mipicsi2rxdecoderPF.v":2496:2:2496:7|Trying to extract state machine for register genblk1.state_2.
@N: CL201 :"D:\Delme\SEV_PFSoC_OpenVX\component\Microsemi\SolutionCore\mipicsi2rxdecoderPF\4.4.0\RTL\mipicsi2rxdecoderPF.v":2435:2:2435:7|Trying to extract state machine for register genblk1.state_1.
@N: CL201 :"D:\Delme\SEV_PFSoC_OpenVX\component\Microsemi\SolutionCore\mipicsi2rxdecoderPF\4.4.0\RTL\mipicsi2rxdecoderPF.v":2374:2:2374:7|Trying to extract state machine for register genblk1.state_0.
@N: CL201 :"D:\Delme\SEV_PFSoC_OpenVX\component\Microsemi\SolutionCore\mipicsi2rxdecoderPF\4.4.0\RTL\mipicsi2rxdecoderPF.v":1986:4:1986:9|Trying to extract state machine for register genblk1.state_enb.
@N: CL135 :"D:\Delme\SEV_PFSoC_OpenVX\component\work\CORERESET_PF_C2\CORERESET_PF_C2_0\core\corereset_pf.v":58:0:58:5|Found sequential shift dff with address depth of 16 words and data bit width of 1.
@N: CL135 :"D:\Delme\SEV_PFSoC_OpenVX\component\work\CORERESET_PF_C1\CORERESET_PF_C1_0\core\corereset_pf.v":58:0:58:5|Found sequential shift dff with address depth of 16 words and data bit width of 1.
@N: CL135 :"D:\Delme\SEV_PFSoC_OpenVX\component\work\CORERESET_PF_C0\CORERESET_PF_C0_0\core\corereset_pf.v":58:0:58:5|Found sequential shift dff with address depth of 16 words and data bit width of 1.
@N: CL135 :"D:\Delme\SEV_PFSoC_OpenVX\component\work\CORERESET_PF_C4\CORERESET_PF_C4_0\core\corereset_pf.v":58:0:58:5|Found sequential shift dff with address depth of 16 words and data bit width of 1.
@N: CL135 :"D:\Delme\SEV_PFSoC_OpenVX\component\work\CORERESET_PF_C3\CORERESET_PF_C3_0\core\corereset_pf.v":58:0:58:5|Found sequential shift dff with address depth of 16 words and data bit width of 1.
@N:"D:\Delme\SEV_PFSoC_OpenVX\hdl\data_unpacker_FHD_RX_0.vhd":25:7:25:26|Top entity is set to data_unpacker_FHD_RX.
@N: CD140 :	| Using the VHDL 2008 Standard for file 'D:\Delme\SEV_PFSoC_OpenVX\hdl\DDR_read_controller_FHD_HDMI_RX.vhd'.
@N: CD140 :	| Using the VHDL 2008 Standard for file 'D:\Delme\SEV_PFSoC_OpenVX\hdl\register_config.vhd'.
@N: CD140 :	| Using the VHDL 2008 Standard for file 'D:\Delme\SEV_PFSoC_OpenVX\hdl\data_unpacker_FHD_RX_0.vhd'.
@N: CD140 :	| Using the VHDL 2008 Standard for file 'D:\Delme\SEV_PFSoC_OpenVX\hdl\ram2port.vhd'.
@N: CD140 :	| Using the VHDL 2008 Standard for file 'D:\Delme\SEV_PFSoC_OpenVX\hdl\DDR_write_controller_lpddr4.vhd'.
@N: CD140 :	| Using the VHDL 2008 Standard for file 'D:\Delme\SEV_PFSoC_OpenVX\hdl\data_packer_lpddr4.vhd'.
@N: CD140 :	| Using the VHDL 2008 Standard for file 'D:\Delme\SEV_PFSoC_OpenVX\hdl\synchronizer_circuit.vhd'.
@N: CD140 :	| Using the VHDL 2008 Standard for file 'D:\Delme\SEV_PFSoC_OpenVX\component\Microsemi\SolutionCore\Display_Controller\4.5.0\RTL\Display_Controller.vhd'.
@N: CD140 :	| Using the VHDL 2008 Standard for file 'D:\Delme\SEV_PFSoC_OpenVX\component\Microsemi\SolutionCore\HDMI_TX\4.4.0\HDL\HDMI_TX.vhd'.
@N: CD140 :	| Using the VHDL 2008 Standard for file 'D:\Delme\SEV_PFSoC_OpenVX\hdl\read_demux.vhd'.
@N: CD140 :	| Using the VHDL 2008 Standard for file 'D:\Delme\SEV_PFSoC_OpenVX\hdl\read_mux.vhd'.
@N: CD140 :	| Using the VHDL 2008 Standard for file 'D:\Delme\SEV_PFSoC_OpenVX\hdl\request_scheduler.vhd'.
@N: CD140 :	| Using the VHDL 2008 Standard for file 'D:\Delme\SEV_PFSoC_OpenVX\hdl\write_demux.vhd'.
@N: CD140 :	| Using the VHDL 2008 Standard for file 'D:\Delme\SEV_PFSoC_OpenVX\hdl\write_mux.vhd'.
@N: CD140 :	| Using the VHDL 2008 Standard for file 'D:\Delme\SEV_PFSoC_OpenVX\component\Microsemi\SolutionCore\YCbCrtoRGB\4.4.0\Encrypted\YCbCrtoRGB.vhd'.
@N: CD140 :	| Using the VHDL 2008 Standard for file 'D:\Delme\SEV_PFSoC_OpenVX\component\Microsemi\SolutionCore\Bayer_Interpolation\4.2.0\RTL\Bayer_Interpolation.vhd'.
@N: CD140 :	| Using the VHDL 2008 Standard for file 'D:\Delme\SEV_PFSoC_OpenVX\component\Microsemi\SolutionCore\Gamma_Correction\4.2.0\Encrypted\Gamma_Correction.vhd'.
@N: CD140 :	| Using the VHDL 2008 Standard for file 'D:\Delme\SEV_PFSoC_OpenVX\component\Microsemi\SolutionCore\Image_Enhancement\4.3.0\Encrypted\Image_Enhancement.vhd'.
@N: CD140 :	| Using the VHDL 2008 Standard for file 'D:\Delme\SEV_PFSoC_OpenVX\component\Microsemi\SolutionCore\RGBtoYCbCr\4.4.0\Encrypted\RGBtoYCbCr.vhd'.
@N: CD140 :	| Using the VHDL 2008 Standard for file 'D:\Delme\SEV_PFSoC_OpenVX\hdl\apb3_interface.vhd'.
@N: CD140 :	| Using the VHDL 2008 Standard for file 'D:\Delme\SEV_PFSoC_OpenVX\hdl\intensity_average.vhd'.
@N: CD140 :	| Using the VHDL 2008 Standard for file 'D:\Delme\SEV_PFSoC_OpenVX\hdl\video_fifo.vhd'.
@N: CD140 :	| Using the VHDL 2008 Standard for file 'D:\Delme\SEV_PFSoC_OpenVX\component\work\Display_Controller_C0\Display_Controller_C0.vhd'.
@N: CD140 :	| Using the VHDL 2008 Standard for file 'D:\Delme\SEV_PFSoC_OpenVX\component\work\HDMI_TX_C0\HDMI_TX_C0.vhd'.
@N: CD140 :	| Using the VHDL 2008 Standard for file 'D:\Delme\SEV_PFSoC_OpenVX\component\work\YCbCrtoRGB_C0\YCbCrtoRGB_C0.vhd'.
@N: CD140 :	| Using the VHDL 2008 Standard for file 'D:\Delme\SEV_PFSoC_OpenVX\component\work\Bayer_Interpolation_C0\Bayer_Interpolation_C0.vhd'.
@N: CD140 :	| Using the VHDL 2008 Standard for file 'D:\Delme\SEV_PFSoC_OpenVX\component\work\Gamma_Correction_C0\Gamma_Correction_C0.vhd'.
@N: CD140 :	| Using the VHDL 2008 Standard for file 'D:\Delme\SEV_PFSoC_OpenVX\component\work\Image_Enhancement_C0\Image_Enhancement_C0.vhd'.
@N: CD140 :	| Using the VHDL 2008 Standard for file 'D:\Delme\SEV_PFSoC_OpenVX\component\work\RGBtoYCbCr_C0\RGBtoYCbCr_C0.vhd'.
@N: CD231 :"D:\Microchip\Libero_SoC_v2022.2\SynplifyPro\lib\vhd2008\std1164.vhd":889:16:889:17|Using onehot encoding for type mvl9plus. For example, enumeration 'U' is mapped to "1000000000".
@N: CD630 :"D:\Delme\SEV_PFSoC_OpenVX\component\work\YCbCrtoRGB_C0\YCbCrtoRGB_C0.vhd":31:7:31:19|Synthesizing work.ycbcrtorgb_c0.rtl.
@N: CD630 :"D:\Delme\SEV_PFSoC_OpenVX\component\work\HDMI_TX_C0\HDMI_TX_C0.vhd":29:7:29:16|Synthesizing work.hdmi_tx_c0.rtl.
@N: CD630 :"D:\Delme\SEV_PFSoC_OpenVX\component\Microsemi\SolutionCore\HDMI_TX\4.4.0\HDL\HDMI_TX.vhd":24:7:24:13|Synthesizing work.hdmi_tx.rtl.
@N: CD630 :"D:\Delme\SEV_PFSoC_OpenVX\component\Microsemi\SolutionCore\HDMI_TX\4.4.0\HDL\HDMI_TX.vhd":375:7:375:20|Synthesizing work.hdmi_tx_native.hdmi_tx_native.
@N: CD630 :"D:\Delme\SEV_PFSoC_OpenVX\component\Microsemi\SolutionCore\HDMI_TX\4.4.0\HDL\HDMI_TX.vhd":874:7:874:17|Synthesizing work.tx_fifo_top.fifo_arch.
@N: CD630 :"D:\Delme\SEV_PFSoC_OpenVX\component\Microsemi\SolutionCore\HDMI_TX\4.4.0\HDL\HDMI_TX.vhd":1032:7:1032:24|Synthesizing work.video_fifo_hdmi_tx.video_fifo_hdmi_tx.
@N: CD630 :"D:\Delme\SEV_PFSoC_OpenVX\component\Microsemi\SolutionCore\HDMI_TX\4.4.0\HDL\HDMI_TX.vhd":1453:7:1453:22|Synthesizing work.ram2port_hdmi_tx.ram2port_hdmi_tx.
@N: CL134 :"D:\Delme\SEV_PFSoC_OpenVX\component\Microsemi\SolutionCore\HDMI_TX\4.4.0\HDL\HDMI_TX.vhd":1494:9:1494:11|Found RAM ram, depth=64, width=10
@N: CD630 :"D:\Delme\SEV_PFSoC_OpenVX\component\Microsemi\SolutionCore\HDMI_TX\4.4.0\HDL\HDMI_TX.vhd":822:7:822:26|Synthesizing work.synchronizer_hdmi_tx.behaviour.
@N: CD630 :"D:\Delme\SEV_PFSoC_OpenVX\component\Microsemi\SolutionCore\HDMI_TX\4.4.0\HDL\HDMI_TX.vhd":634:7:634:18|Synthesizing work.tmds_encoder.tmds_encoder_architecture.
@N: CD630 :"D:\Delme\SEV_PFSoC_OpenVX\component\work\Display_Controller_C0\Display_Controller_C0.vhd":30:7:30:27|Synthesizing work.display_controller_c0.rtl.
@N: CD630 :"D:\Delme\SEV_PFSoC_OpenVX\component\Microsemi\SolutionCore\Display_Controller\4.5.0\RTL\Display_Controller.vhd":25:7:25:24|Synthesizing work.display_controller.rtl.
@N: CD630 :"D:\Delme\SEV_PFSoC_OpenVX\component\Microsemi\SolutionCore\Display_Controller\4.5.0\RTL\Display_Controller.vhd":280:7:280:31|Synthesizing work.display_controller_native.display_controller_native.
@N: CD630 :"D:\Delme\SEV_PFSoC_OpenVX\component\work\RGBtoYCbCr_C0\RGBtoYCbCr_C0.vhd":31:7:31:19|Synthesizing work.rgbtoycbcr_c0.rtl.
@N: CD630 :"D:\Delme\SEV_PFSoC_OpenVX\hdl\intensity_average.vhd":23:7:23:23|Synthesizing work.intensity_average.architecture_intensity_average.
@N: CD630 :"D:\Delme\SEV_PFSoC_OpenVX\component\work\Image_Enhancement_C0\Image_Enhancement_C0.vhd":31:7:31:26|Synthesizing work.image_enhancement_c0.rtl.
@N: CD630 :"D:\Delme\SEV_PFSoC_OpenVX\component\Microsemi\SolutionCore\Image_Enhancement\4.3.0\Encrypted\Image_Enhancement.vhd":24:7:24:23|Synthesizing work.image_enhancement.rtl.
@N: CD630 :"D:\Delme\SEV_PFSoC_OpenVX\component\work\Gamma_Correction_C0\Gamma_Correction_C0.vhd":30:7:30:25|Synthesizing work.gamma_correction_c0.rtl.
@N: CD630 :"D:\Delme\SEV_PFSoC_OpenVX\component\Microsemi\SolutionCore\Gamma_Correction\4.2.0\Encrypted\Gamma_Correction.vhd":24:7:24:22|Synthesizing work.gamma_correction.rtl.
@N: CD630 :"D:\Delme\SEV_PFSoC_OpenVX\component\work\Bayer_Interpolation_C0\Bayer_Interpolation_C0.vhd":32:7:32:28|Synthesizing work.bayer_interpolation_c0.rtl.
@N: CD630 :"D:\Delme\SEV_PFSoC_OpenVX\component\Microsemi\SolutionCore\Bayer_Interpolation\4.2.0\RTL\Bayer_Interpolation.vhd":24:7:24:25|Synthesizing work.bayer_interpolation.rtl.
@N: CD630 :"D:\Delme\SEV_PFSoC_OpenVX\component\Microsemi\SolutionCore\Bayer_Interpolation\4.2.0\RTL\Bayer_Interpolation.vhd":686:7:686:18|Synthesizing work.bayer_native.bayer_native_arch.
@N: CD630 :"D:\Delme\SEV_PFSoC_OpenVX\component\Microsemi\SolutionCore\Bayer_Interpolation\4.2.0\RTL\Bayer_Interpolation.vhd":856:7:856:28|Synthesizing work.bayer_interpolation_1p.bayer_interpolation_1p.
@N: CD630 :"D:\Delme\SEV_PFSoC_OpenVX\component\Microsemi\SolutionCore\Bayer_Interpolation\4.2.0\RTL\Bayer_Interpolation.vhd":2211:7:2211:23|Synthesizing work.ramdualport_bayer.rtl.
@N: CL134 :"D:\Delme\SEV_PFSoC_OpenVX\component\Microsemi\SolutionCore\Bayer_Interpolation\4.2.0\RTL\Bayer_Interpolation.vhd":2234:9:2234:11|Found RAM ram, depth=2048, width=8
@N: CD630 :"D:\Delme\SEV_PFSoC_OpenVX\component\Microsemi\SolutionCore\Bayer_Interpolation\4.2.0\RTL\Bayer_Interpolation.vhd":1240:7:1240:18|Synthesizing work.bayer_filter.bayer_filter.
@N: CD630 :"D:\Delme\SEV_PFSoC_OpenVX\component\Microsemi\SolutionCore\Bayer_Interpolation\4.2.0\RTL\Bayer_Interpolation.vhd":1780:7:1780:16|Synthesizing work.read_lsram.read_lsram.
@N: CD233 :"D:\Delme\SEV_PFSoC_OpenVX\component\Microsemi\SolutionCore\Bayer_Interpolation\4.2.0\RTL\Bayer_Interpolation.vhd":1889:17:1889:18|Using sequential encoding for type fsm_state.
@N: CD364 :"D:\Delme\SEV_PFSoC_OpenVX\component\Microsemi\SolutionCore\Bayer_Interpolation\4.2.0\RTL\Bayer_Interpolation.vhd":2078:8:2078:21|Removing redundant assignment.
@N: CD604 :"D:\Delme\SEV_PFSoC_OpenVX\component\Microsemi\SolutionCore\Bayer_Interpolation\4.2.0\RTL\Bayer_Interpolation.vhd":2140:8:2140:21|OTHERS clause is not synthesized.
@N: CD630 :"D:\Delme\SEV_PFSoC_OpenVX\component\Microsemi\SolutionCore\Bayer_Interpolation\4.2.0\RTL\Bayer_Interpolation.vhd":1519:7:1519:17|Synthesizing work.write_lsram.write_lsram.
@N: CD364 :"D:\Delme\SEV_PFSoC_OpenVX\component\Microsemi\SolutionCore\Bayer_Interpolation\4.2.0\RTL\Bayer_Interpolation.vhd":1737:8:1737:20|Removing redundant assignment.
@N: Setting default value for generic g_apb3_interface_data_width to 32;
@N: Setting default value for generic g_const_width to 12;
@N: CD630 :"D:\Delme\SEV_PFSoC_OpenVX\hdl\apb3_interface.vhd":23:7:23:20|Synthesizing work.apb3_interface.apb3_interface.
@N: CD630 :"D:\Delme\SEV_PFSoC_OpenVX\hdl\write_mux.vhd":23:7:23:15|Synthesizing work.write_mux.write_mux.
@N: CD630 :"D:\Delme\SEV_PFSoC_OpenVX\hdl\write_demux.vhd":23:7:23:17|Synthesizing work.write_demux.write_demux.
@N: CD630 :"D:\Delme\SEV_PFSoC_OpenVX\hdl\request_scheduler.vhd":23:7:23:23|Synthesizing work.request_scheduler.request_scheduler.
@N: CD231 :"D:\Delme\SEV_PFSoC_OpenVX\hdl\request_scheduler.vhd":68:24:68:25|Using onehot encoding for type scheduler_states. For example, enumeration idle is mapped to "100000".
@N: CD604 :"D:\Delme\SEV_PFSoC_OpenVX\hdl\request_scheduler.vhd":262:8:262:21|OTHERS clause is not synthesized.
@N: CD630 :"D:\Delme\SEV_PFSoC_OpenVX\hdl\read_mux.vhd":23:7:23:14|Synthesizing work.read_mux.read_mux.
@N: CD630 :"D:\Delme\SEV_PFSoC_OpenVX\hdl\read_demux.vhd":23:7:23:16|Synthesizing work.read_demux.read_demux.
@N: Setting default value for generic g_video_fifo_awidth to 9;
@N: Setting default value for generic g_input_video_data_bit_width to 512;
@N: Setting default value for generic g_half_empty_threshold to 256;
@N: CD630 :"D:\Delme\SEV_PFSoC_OpenVX\hdl\video_fifo.vhd":25:7:25:16|Synthesizing work.video_fifo.video_fifo.
@N: CD630 :"D:\Delme\SEV_PFSoC_OpenVX\hdl\ram2port.vhd":5:7:5:14|Synthesizing work.ram2port.ram2port.
@N: CL134 :"D:\Delme\SEV_PFSoC_OpenVX\hdl\ram2port.vhd":22:7:22:10|Found RAM io1l, depth=512, width=512
@N: Setting default value for generic g_data_width to 1;
@N: CD630 :"D:\Delme\SEV_PFSoC_OpenVX\hdl\synchronizer_circuit.vhd":22:7:22:26|Synthesizing work.synchronizer_circuit.behaviour.
@N: CD630 :"D:\Delme\SEV_PFSoC_OpenVX\hdl\DDR_write_controller_lpddr4.vhd":25:7:25:33|Synthesizing work.ddr_write_controller_lpddr4.ddr_write_controller.
@N: CD233 :"D:\Delme\SEV_PFSoC_OpenVX\hdl\DDR_write_controller_lpddr4.vhd":98:17:98:18|Using sequential encoding for type fsm_state.
@N: CD604 :"D:\Delme\SEV_PFSoC_OpenVX\hdl\DDR_write_controller_lpddr4.vhd":238:8:238:21|OTHERS clause is not synthesized.
@N: CD630 :"D:\Delme\SEV_PFSoC_OpenVX\hdl\data_packer_lpddr4.vhd":25:7:25:24|Synthesizing work.data_packer_lpddr4.data_packer_arch.
@N: Setting default value for generic g_video_fifo_awidth to 12;
@N: Setting default value for generic g_input_video_data_bit_width to 512;
@N: Setting default value for generic g_half_empty_threshold to 1048;
@N: CD630 :"D:\Delme\SEV_PFSoC_OpenVX\hdl\video_fifo.vhd":25:7:25:16|Synthesizing work.video_fifo.video_fifo.
@N: CD630 :"D:\Delme\SEV_PFSoC_OpenVX\hdl\ram2port.vhd":5:7:5:14|Synthesizing work.ram2port.ram2port.
@N: CL134 :"D:\Delme\SEV_PFSoC_OpenVX\hdl\ram2port.vhd":22:7:22:10|Found RAM io1l, depth=4096, width=512
@N: Setting default value for generic g_register_width to 513;
@N: CD630 :"D:\Delme\SEV_PFSoC_OpenVX\hdl\register_config.vhd":26:7:26:21|Synthesizing work.register_config.register_config.
@N: CD630 :"D:\Delme\SEV_PFSoC_OpenVX\hdl\DDR_read_controller_FHD_HDMI_RX.vhd":25:7:25:37|Synthesizing work.ddr_read_controller_fhd_hdmi_rx.ddr_read_controller_hdmi_rx.
@N: CD233 :"D:\Delme\SEV_PFSoC_OpenVX\hdl\DDR_read_controller_FHD_HDMI_RX.vhd":90:17:90:18|Using sequential encoding for type fsm_state.
@N: CD604 :"D:\Delme\SEV_PFSoC_OpenVX\hdl\DDR_read_controller_FHD_HDMI_RX.vhd":209:8:209:21|OTHERS clause is not synthesized.
@N: CD630 :"D:\Delme\SEV_PFSoC_OpenVX\hdl\data_unpacker_FHD_RX_0.vhd":25:7:25:26|Synthesizing work.data_unpacker_fhd_rx.data_unpacker_fhd_rx.
@N: CL201 :"D:\Delme\SEV_PFSoC_OpenVX\hdl\DDR_read_controller_FHD_HDMI_RX.vhd":171:4:171:5|Trying to extract state machine for register s_state.
@N: CL201 :"D:\Delme\SEV_PFSoC_OpenVX\hdl\DDR_write_controller_lpddr4.vhd":187:4:187:5|Trying to extract state machine for register s_state.
@N: CL201 :"D:\Delme\SEV_PFSoC_OpenVX\hdl\request_scheduler.vhd":190:4:190:5|Trying to extract state machine for register s_state.
@N: CL135 :"D:\Delme\SEV_PFSoC_OpenVX\component\Microsemi\SolutionCore\Bayer_Interpolation\4.2.0\RTL\Bayer_Interpolation.vhd":2001:4:2001:5|Found sequential shift s_v_counter_dly3 with address depth of 3 words and data bit width of 16.
@N: CL135 :"D:\Delme\SEV_PFSoC_OpenVX\component\Microsemi\SolutionCore\Bayer_Interpolation\4.2.0\RTL\Bayer_Interpolation.vhd":2001:4:2001:5|Found sequential shift s_h_counter_dly3 with address depth of 3 words and data bit width of 16.
@N: CL201 :"D:\Delme\SEV_PFSoC_OpenVX\component\Microsemi\SolutionCore\Bayer_Interpolation\4.2.0\RTL\Bayer_Interpolation.vhd":2090:4:2090:5|Trying to extract state machine for register s_state.
@N: CL159 :"D:\Delme\SEV_PFSoC_OpenVX\component\Microsemi\SolutionCore\Bayer_Interpolation\4.2.0\RTL\Bayer_Interpolation.vhd":52:4:52:10|Input TDATA_I is unused.
@N: CL159 :"D:\Delme\SEV_PFSoC_OpenVX\component\Microsemi\SolutionCore\Bayer_Interpolation\4.2.0\RTL\Bayer_Interpolation.vhd":55:4:55:11|Input TVALID_I is unused.
@N: CL159 :"D:\Delme\SEV_PFSoC_OpenVX\component\Microsemi\SolutionCore\Bayer_Interpolation\4.2.0\RTL\Bayer_Interpolation.vhd":59:4:59:10|Input TUSER_I is unused.
@N: CL159 :"D:\Delme\SEV_PFSoC_OpenVX\component\Microsemi\SolutionCore\Bayer_Interpolation\4.2.0\RTL\Bayer_Interpolation.vhd":71:4:71:15|Input AXI_RESETN_I is unused.
@N: CL159 :"D:\Delme\SEV_PFSoC_OpenVX\component\Microsemi\SolutionCore\Bayer_Interpolation\4.2.0\RTL\Bayer_Interpolation.vhd":73:4:73:12|Input AXI_CLK_I is unused.
@N: CL159 :"D:\Delme\SEV_PFSoC_OpenVX\component\Microsemi\SolutionCore\Bayer_Interpolation\4.2.0\RTL\Bayer_Interpolation.vhd":76:4:76:16|Input AXI_AWVALID_I is unused.
@N: CL159 :"D:\Delme\SEV_PFSoC_OpenVX\component\Microsemi\SolutionCore\Bayer_Interpolation\4.2.0\RTL\Bayer_Interpolation.vhd":80:4:80:15|Input AXI_AWADDR_I is unused.
@N: CL159 :"D:\Delme\SEV_PFSoC_OpenVX\component\Microsemi\SolutionCore\Bayer_Interpolation\4.2.0\RTL\Bayer_Interpolation.vhd":82:4:82:15|Input AXI_AWPROT_I is unused.
@N: CL159 :"D:\Delme\SEV_PFSoC_OpenVX\component\Microsemi\SolutionCore\Bayer_Interpolation\4.2.0\RTL\Bayer_Interpolation.vhd":84:4:84:16|Input AXI_AWBURST_I is unused.
@N: CL159 :"D:\Delme\SEV_PFSoC_OpenVX\component\Microsemi\SolutionCore\Bayer_Interpolation\4.2.0\RTL\Bayer_Interpolation.vhd":86:4:86:14|Input AXI_WDATA_I is unused.
@N: CL159 :"D:\Delme\SEV_PFSoC_OpenVX\component\Microsemi\SolutionCore\Bayer_Interpolation\4.2.0\RTL\Bayer_Interpolation.vhd":88:4:88:15|Input AXI_WVALID_I is unused.
@N: CL159 :"D:\Delme\SEV_PFSoC_OpenVX\component\Microsemi\SolutionCore\Bayer_Interpolation\4.2.0\RTL\Bayer_Interpolation.vhd":92:4:92:14|Input AXI_WSTRB_I is unused.
@N: CL159 :"D:\Delme\SEV_PFSoC_OpenVX\component\Microsemi\SolutionCore\Bayer_Interpolation\4.2.0\RTL\Bayer_Interpolation.vhd":96:4:96:15|Input AXI_BREADY_I is unused.
@N: CL159 :"D:\Delme\SEV_PFSoC_OpenVX\component\Microsemi\SolutionCore\Bayer_Interpolation\4.2.0\RTL\Bayer_Interpolation.vhd":100:4:100:16|Input AXI_ARVALID_I is unused.
@N: CL159 :"D:\Delme\SEV_PFSoC_OpenVX\component\Microsemi\SolutionCore\Bayer_Interpolation\4.2.0\RTL\Bayer_Interpolation.vhd":104:4:104:15|Input AXI_ARADDR_I is unused.
@N: CL159 :"D:\Delme\SEV_PFSoC_OpenVX\component\Microsemi\SolutionCore\Bayer_Interpolation\4.2.0\RTL\Bayer_Interpolation.vhd":106:4:106:15|Input AXI_ARPROT_I is unused.
@N: CL159 :"D:\Delme\SEV_PFSoC_OpenVX\component\Microsemi\SolutionCore\Bayer_Interpolation\4.2.0\RTL\Bayer_Interpolation.vhd":108:4:108:16|Input AXI_ARBURST_I is unused.
@N: CL159 :"D:\Delme\SEV_PFSoC_OpenVX\component\Microsemi\SolutionCore\Bayer_Interpolation\4.2.0\RTL\Bayer_Interpolation.vhd":114:4:114:15|Input AXI_RREADY_I is unused.
@N: CL159 :"D:\Delme\SEV_PFSoC_OpenVX\component\Microsemi\SolutionCore\Bayer_Interpolation\4.2.0\RTL\Bayer_Interpolation.vhd":118:4:118:13|Input AXI_AWID_I is unused.
@N: CL159 :"D:\Delme\SEV_PFSoC_OpenVX\component\Microsemi\SolutionCore\Bayer_Interpolation\4.2.0\RTL\Bayer_Interpolation.vhd":120:4:120:14|Input AXI_AWLEN_I is unused.
@N: CL159 :"D:\Delme\SEV_PFSoC_OpenVX\component\Microsemi\SolutionCore\Bayer_Interpolation\4.2.0\RTL\Bayer_Interpolation.vhd":122:4:122:15|Input AXI_AWSIZE_I is unused.
@N: CL159 :"D:\Delme\SEV_PFSoC_OpenVX\component\Microsemi\SolutionCore\Bayer_Interpolation\4.2.0\RTL\Bayer_Interpolation.vhd":124:4:124:15|Input AXI_AWLOCK_I is unused.
@N: CL159 :"D:\Delme\SEV_PFSoC_OpenVX\component\Microsemi\SolutionCore\Bayer_Interpolation\4.2.0\RTL\Bayer_Interpolation.vhd":126:4:126:16|Input AXI_AWCACHE_I is unused.
@N: CL159 :"D:\Delme\SEV_PFSoC_OpenVX\component\Microsemi\SolutionCore\Bayer_Interpolation\4.2.0\RTL\Bayer_Interpolation.vhd":128:4:128:15|Input AXI_AWUSER_I is unused.
@N: CL159 :"D:\Delme\SEV_PFSoC_OpenVX\component\Microsemi\SolutionCore\Bayer_Interpolation\4.2.0\RTL\Bayer_Interpolation.vhd":130:4:130:14|Input AXI_AWQOS_I is unused.
@N: CL159 :"D:\Delme\SEV_PFSoC_OpenVX\component\Microsemi\SolutionCore\Bayer_Interpolation\4.2.0\RTL\Bayer_Interpolation.vhd":132:4:132:17|Input AXI_AWREGION_I is unused.
@N: CL159 :"D:\Delme\SEV_PFSoC_OpenVX\component\Microsemi\SolutionCore\Bayer_Interpolation\4.2.0\RTL\Bayer_Interpolation.vhd":134:4:134:14|Input AXI_WLAST_I is unused.
@N: CL159 :"D:\Delme\SEV_PFSoC_OpenVX\component\Microsemi\SolutionCore\Bayer_Interpolation\4.2.0\RTL\Bayer_Interpolation.vhd":136:4:136:14|Input AXI_WUSER_I is unused.
@N: CL159 :"D:\Delme\SEV_PFSoC_OpenVX\component\Microsemi\SolutionCore\Bayer_Interpolation\4.2.0\RTL\Bayer_Interpolation.vhd":140:4:140:15|Input AXI_ARUSER_I is unused.
@N: CL159 :"D:\Delme\SEV_PFSoC_OpenVX\component\Microsemi\SolutionCore\Bayer_Interpolation\4.2.0\RTL\Bayer_Interpolation.vhd":150:4:150:13|Input AXI_ARID_I is unused.
@N: CL159 :"D:\Delme\SEV_PFSoC_OpenVX\component\Microsemi\SolutionCore\Bayer_Interpolation\4.2.0\RTL\Bayer_Interpolation.vhd":152:4:152:14|Input AXI_ARLEN_I is unused.
@N: CL159 :"D:\Delme\SEV_PFSoC_OpenVX\component\Microsemi\SolutionCore\Bayer_Interpolation\4.2.0\RTL\Bayer_Interpolation.vhd":154:4:154:15|Input AXI_ARSIZE_I is unused.
@N: CL159 :"D:\Delme\SEV_PFSoC_OpenVX\component\Microsemi\SolutionCore\Bayer_Interpolation\4.2.0\RTL\Bayer_Interpolation.vhd":156:4:156:15|Input AXI_ARLOCK_I is unused.
@N: CL159 :"D:\Delme\SEV_PFSoC_OpenVX\component\Microsemi\SolutionCore\Bayer_Interpolation\4.2.0\RTL\Bayer_Interpolation.vhd":158:4:158:16|Input AXI_ARCACHE_I is unused.
@N: CL159 :"D:\Delme\SEV_PFSoC_OpenVX\component\Microsemi\SolutionCore\Bayer_Interpolation\4.2.0\RTL\Bayer_Interpolation.vhd":160:4:160:14|Input AXI_ARQOS_I is unused.
@N: CL159 :"D:\Delme\SEV_PFSoC_OpenVX\component\Microsemi\SolutionCore\Bayer_Interpolation\4.2.0\RTL\Bayer_Interpolation.vhd":162:4:162:17|Input AXI_ARREGION_I is unused.
@N: CL159 :"D:\Delme\SEV_PFSoC_OpenVX\component\Microsemi\SolutionCore\Gamma_Correction\4.2.0\Encrypted\Gamma_Correction.vhd":45:4:45:10|Input TDATA_I is unused.
@N: CL159 :"D:\Delme\SEV_PFSoC_OpenVX\component\Microsemi\SolutionCore\Gamma_Correction\4.2.0\Encrypted\Gamma_Correction.vhd":48:4:48:11|Input TVALID_I is unused.
@N: CL159 :"D:\Delme\SEV_PFSoC_OpenVX\component\Microsemi\SolutionCore\Gamma_Correction\4.2.0\Encrypted\Gamma_Correction.vhd":50:1:50:7|Input TUSER_I is unused.
@N: CL159 :"D:\Delme\SEV_PFSoC_OpenVX\component\Microsemi\SolutionCore\Image_Enhancement\4.3.0\Encrypted\Image_Enhancement.vhd":51:4:51:10|Input TDATA_I is unused.
@N: CL159 :"D:\Delme\SEV_PFSoC_OpenVX\component\Microsemi\SolutionCore\Image_Enhancement\4.3.0\Encrypted\Image_Enhancement.vhd":54:4:54:11|Input TVALID_I is unused.
@N: CL159 :"D:\Delme\SEV_PFSoC_OpenVX\component\Microsemi\SolutionCore\Image_Enhancement\4.3.0\Encrypted\Image_Enhancement.vhd":58:1:58:7|Input TUSER_I is unused.
@N: CL159 :"D:\Delme\SEV_PFSoC_OpenVX\component\Microsemi\SolutionCore\Image_Enhancement\4.3.0\Encrypted\Image_Enhancement.vhd":64:1:64:12|Input AXI_RESETN_I is unused.
@N: CL159 :"D:\Delme\SEV_PFSoC_OpenVX\component\Microsemi\SolutionCore\Image_Enhancement\4.3.0\Encrypted\Image_Enhancement.vhd":66:1:66:9|Input AXI_CLK_I is unused.
@N: CL159 :"D:\Delme\SEV_PFSoC_OpenVX\component\Microsemi\SolutionCore\Image_Enhancement\4.3.0\Encrypted\Image_Enhancement.vhd":69:1:69:13|Input AXI_AWVALID_I is unused.
@N: CL159 :"D:\Delme\SEV_PFSoC_OpenVX\component\Microsemi\SolutionCore\Image_Enhancement\4.3.0\Encrypted\Image_Enhancement.vhd":73:1:73:12|Input AXI_AWADDR_I is unused.
@N: CL159 :"D:\Delme\SEV_PFSoC_OpenVX\component\Microsemi\SolutionCore\Image_Enhancement\4.3.0\Encrypted\Image_Enhancement.vhd":75:1:75:12|Input AXI_AWPROT_I is unused.
@N: CL159 :"D:\Delme\SEV_PFSoC_OpenVX\component\Microsemi\SolutionCore\Image_Enhancement\4.3.0\Encrypted\Image_Enhancement.vhd":77:1:77:13|Input AXI_AWBURST_I is unused.
@N: CL159 :"D:\Delme\SEV_PFSoC_OpenVX\component\Microsemi\SolutionCore\Image_Enhancement\4.3.0\Encrypted\Image_Enhancement.vhd":79:1:79:11|Input AXI_WDATA_I is unused.
@N: CL159 :"D:\Delme\SEV_PFSoC_OpenVX\component\Microsemi\SolutionCore\Image_Enhancement\4.3.0\Encrypted\Image_Enhancement.vhd":81:1:81:12|Input AXI_WVALID_I is unused.
@N: CL159 :"D:\Delme\SEV_PFSoC_OpenVX\component\Microsemi\SolutionCore\Image_Enhancement\4.3.0\Encrypted\Image_Enhancement.vhd":85:1:85:11|Input AXI_WSTRB_I is unused.
@N: CL159 :"D:\Delme\SEV_PFSoC_OpenVX\component\Microsemi\SolutionCore\Image_Enhancement\4.3.0\Encrypted\Image_Enhancement.vhd":89:1:89:12|Input AXI_BREADY_I is unused.
@N: CL159 :"D:\Delme\SEV_PFSoC_OpenVX\component\Microsemi\SolutionCore\Image_Enhancement\4.3.0\Encrypted\Image_Enhancement.vhd":93:1:93:13|Input AXI_ARVALID_I is unused.
@N: CL159 :"D:\Delme\SEV_PFSoC_OpenVX\component\Microsemi\SolutionCore\Image_Enhancement\4.3.0\Encrypted\Image_Enhancement.vhd":97:1:97:12|Input AXI_ARADDR_I is unused.
@N: CL159 :"D:\Delme\SEV_PFSoC_OpenVX\component\Microsemi\SolutionCore\Image_Enhancement\4.3.0\Encrypted\Image_Enhancement.vhd":99:1:99:12|Input AXI_ARPROT_I is unused.
@N: CL159 :"D:\Delme\SEV_PFSoC_OpenVX\component\Microsemi\SolutionCore\Image_Enhancement\4.3.0\Encrypted\Image_Enhancement.vhd":101:1:101:13|Input AXI_ARBURST_I is unused.
@N: CL159 :"D:\Delme\SEV_PFSoC_OpenVX\component\Microsemi\SolutionCore\Image_Enhancement\4.3.0\Encrypted\Image_Enhancement.vhd":107:1:107:12|Input AXI_RREADY_I is unused.
@N: CL159 :"D:\Delme\SEV_PFSoC_OpenVX\component\Microsemi\SolutionCore\Image_Enhancement\4.3.0\Encrypted\Image_Enhancement.vhd":111:1:111:10|Input AXI_AWID_I is unused.
@N: CL159 :"D:\Delme\SEV_PFSoC_OpenVX\component\Microsemi\SolutionCore\Image_Enhancement\4.3.0\Encrypted\Image_Enhancement.vhd":113:1:113:11|Input AXI_AWLEN_I is unused.
@N: CL159 :"D:\Delme\SEV_PFSoC_OpenVX\component\Microsemi\SolutionCore\Image_Enhancement\4.3.0\Encrypted\Image_Enhancement.vhd":115:1:115:12|Input AXI_AWSIZE_I is unused.
@N: CL159 :"D:\Delme\SEV_PFSoC_OpenVX\component\Microsemi\SolutionCore\Image_Enhancement\4.3.0\Encrypted\Image_Enhancement.vhd":117:1:117:12|Input AXI_AWLOCK_I is unused.
@N: CL159 :"D:\Delme\SEV_PFSoC_OpenVX\component\Microsemi\SolutionCore\Image_Enhancement\4.3.0\Encrypted\Image_Enhancement.vhd":119:1:119:13|Input AXI_AWCACHE_I is unused.
@N: CL159 :"D:\Delme\SEV_PFSoC_OpenVX\component\Microsemi\SolutionCore\Image_Enhancement\4.3.0\Encrypted\Image_Enhancement.vhd":121:1:121:12|Input AXI_AWUSER_I is unused.
@N: CL159 :"D:\Delme\SEV_PFSoC_OpenVX\component\Microsemi\SolutionCore\Image_Enhancement\4.3.0\Encrypted\Image_Enhancement.vhd":123:1:123:11|Input AXI_AWQOS_I is unused.
@N: CL159 :"D:\Delme\SEV_PFSoC_OpenVX\component\Microsemi\SolutionCore\Image_Enhancement\4.3.0\Encrypted\Image_Enhancement.vhd":125:1:125:14|Input AXI_AWREGION_I is unused.
@N: CL159 :"D:\Delme\SEV_PFSoC_OpenVX\component\Microsemi\SolutionCore\Image_Enhancement\4.3.0\Encrypted\Image_Enhancement.vhd":127:1:127:11|Input AXI_WLAST_I is unused.
@N: CL159 :"D:\Delme\SEV_PFSoC_OpenVX\component\Microsemi\SolutionCore\Image_Enhancement\4.3.0\Encrypted\Image_Enhancement.vhd":129:1:129:11|Input AXI_WUSER_I is unused.
@N: CL159 :"D:\Delme\SEV_PFSoC_OpenVX\component\Microsemi\SolutionCore\Image_Enhancement\4.3.0\Encrypted\Image_Enhancement.vhd":133:1:133:12|Input AXI_ARUSER_I is unused.
@N: CL159 :"D:\Delme\SEV_PFSoC_OpenVX\component\Microsemi\SolutionCore\Image_Enhancement\4.3.0\Encrypted\Image_Enhancement.vhd":143:1:143:10|Input AXI_ARID_I is unused.
@N: CL159 :"D:\Delme\SEV_PFSoC_OpenVX\component\Microsemi\SolutionCore\Image_Enhancement\4.3.0\Encrypted\Image_Enhancement.vhd":145:1:145:11|Input AXI_ARLEN_I is unused.
@N: CL159 :"D:\Delme\SEV_PFSoC_OpenVX\component\Microsemi\SolutionCore\Image_Enhancement\4.3.0\Encrypted\Image_Enhancement.vhd":147:1:147:12|Input AXI_ARSIZE_I is unused.
@N: CL159 :"D:\Delme\SEV_PFSoC_OpenVX\component\Microsemi\SolutionCore\Image_Enhancement\4.3.0\Encrypted\Image_Enhancement.vhd":149:1:149:12|Input AXI_ARLOCK_I is unused.
@N: CL159 :"D:\Delme\SEV_PFSoC_OpenVX\component\Microsemi\SolutionCore\Image_Enhancement\4.3.0\Encrypted\Image_Enhancement.vhd":151:1:151:13|Input AXI_ARCACHE_I is unused.
@N: CL159 :"D:\Delme\SEV_PFSoC_OpenVX\component\Microsemi\SolutionCore\Image_Enhancement\4.3.0\Encrypted\Image_Enhancement.vhd":153:1:153:11|Input AXI_ARQOS_I is unused.
@N: CL159 :"D:\Delme\SEV_PFSoC_OpenVX\component\Microsemi\SolutionCore\Image_Enhancement\4.3.0\Encrypted\Image_Enhancement.vhd":155:1:155:14|Input AXI_ARREGION_I is unused.
@N: CL189 :"D:\Delme\SEV_PFSoC_OpenVX\component\Microsemi\SolutionCore\Display_Controller\4.5.0\RTL\Display_Controller.vhd":509:2:509:3|Register bit s_h_counter(14) is always 0.
@N: CL189 :"D:\Delme\SEV_PFSoC_OpenVX\component\Microsemi\SolutionCore\Display_Controller\4.5.0\RTL\Display_Controller.vhd":509:2:509:3|Register bit s_h_counter(13) is always 0.
@N: CL189 :"D:\Delme\SEV_PFSoC_OpenVX\component\Microsemi\SolutionCore\Display_Controller\4.5.0\RTL\Display_Controller.vhd":509:2:509:3|Register bit s_h_counter(12) is always 0.
@N: CL189 :"D:\Delme\SEV_PFSoC_OpenVX\component\Microsemi\SolutionCore\Display_Controller\4.5.0\RTL\Display_Controller.vhd":509:2:509:3|Register bit s_h_counter(11) is always 0.
@N: CL189 :"D:\Delme\SEV_PFSoC_OpenVX\component\Microsemi\SolutionCore\Display_Controller\4.5.0\RTL\Display_Controller.vhd":637:2:637:3|Register bit s_h_counterx(14) is always 0.
@N: CL189 :"D:\Delme\SEV_PFSoC_OpenVX\component\Microsemi\SolutionCore\Display_Controller\4.5.0\RTL\Display_Controller.vhd":637:2:637:3|Register bit s_h_counterx(13) is always 0.
@N: CL189 :"D:\Delme\SEV_PFSoC_OpenVX\component\Microsemi\SolutionCore\Display_Controller\4.5.0\RTL\Display_Controller.vhd":637:2:637:3|Register bit s_h_counterx(12) is always 0.
@N: CL189 :"D:\Delme\SEV_PFSoC_OpenVX\component\Microsemi\SolutionCore\Display_Controller\4.5.0\RTL\Display_Controller.vhd":637:2:637:3|Register bit s_h_counterx(11) is always 0.
@N: CL159 :"D:\Delme\SEV_PFSoC_OpenVX\component\Microsemi\SolutionCore\Display_Controller\4.5.0\RTL\Display_Controller.vhd":53:4:53:11|Input TVALID_I is unused.
@N: CL159 :"D:\Delme\SEV_PFSoC_OpenVX\component\Microsemi\SolutionCore\HDMI_TX\4.4.0\HDL\HDMI_TX.vhd":44:4:44:10|Input TDATA_I is unused.
@N: CL159 :"D:\Delme\SEV_PFSoC_OpenVX\component\Microsemi\SolutionCore\HDMI_TX\4.4.0\HDL\HDMI_TX.vhd":47:4:47:11|Input TVALID_I is unused.
@N: CL159 :"D:\Delme\SEV_PFSoC_OpenVX\component\Microsemi\SolutionCore\HDMI_TX\4.4.0\HDL\HDMI_TX.vhd":49:4:49:10|Input TUSER_I is unused.
@N|Running in 64-bit mode

