Copyright (C) 1994-2021 Synopsys, Inc. This Synopsys software and all associated documentation are proprietary to Synopsys, Inc. and may only be used pursuant to the terms and conditions of a written license agreement with Synopsys, Inc. All other use, reproduction, modification, or distribution of the Synopsys software or the associated documentation is strictly prohibited. Tool: Synplify Pro (R) Build: S-2021.09M-SP1 Install: D:\Microchip\Libero_SoC_v2022.2\SynplifyPro OS: Windows 6.2 Hostname: HYD-LT-I52882B Implementation : synthesis # Written on Mon Nov 21 15:26:26 2022 ##### DESIGN INFO ####################################################### Top View: "SEV_PFSoC_OpenVX" Constraint File(s): "D:\Delme\SEV_PFSoC_OpenVX\designer\SEV_PFSoC_OpenVX\synthesis.fdc" ##### SUMMARY ############################################################ Found 1 issues in 1 out of 393 constraints ##### DETAILS ############################################################ Clock Relationships ******************* Starting Ending | rise to rise | fall to fall | rise to fall | fall to rise --------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------- System CAM1_RX_CLK_P | 4.000 | No paths | No paths | No paths System DDR4_RD_WR_inst_0/PF_XCVR_ERM_C0_0/I_XCVR/LANE0/TX_CLK_R | 13.468 | No paths | No paths | No paths System CLOCKS_AND_RESETS_inst_0/PF_CCC_C0_0/PF_CCC_C0_0/pll_inst_0/OUT0 | 20.000 | No paths | No paths | No paths System DDR4_RD_WR_inst_0/IMX334_IF_TOP_0/PF_IOD_GENERIC_RX_C0_0/PF_IOD_0/PF_CLK_DIV_FIFO/I_CDD/Y_DIV | 16.000 | No paths | 16.000 | No paths System CLOCKS_AND_RESETS_inst_0/PF_CCC_C1_0/PF_CCC_C1_0/pll_inst_0/OUT0 | 5.000 | No paths | No paths | No paths System DDR4_RD_WR_inst_0/IMX334_IF_TOP_0/PF_CCC_C2_0/PF_CCC_C2_0/pll_inst_0/OUT0 | 5.882 | No paths | No paths | No paths DDR4_RD_WR_inst_0/PF_XCVR_ERM_C0_0/I_XCVR/LANE0/TX_CLK_R DDR4_RD_WR_inst_0/PF_XCVR_ERM_C0_0/I_XCVR/LANE0/TX_CLK_R | 13.468 | No paths | No paths | No paths DDR4_RD_WR_inst_0/PF_XCVR_ERM_C0_0/I_XCVR/LANE0/TX_CLK_R DDR4_RD_WR_inst_0/PF_XCVR_ERM_C0_0/I_XCVR/LANE1/TX_CLK_R | 13.468 | No paths | No paths | No paths DDR4_RD_WR_inst_0/PF_XCVR_ERM_C0_0/I_XCVR/LANE0/TX_CLK_R DDR4_RD_WR_inst_0/PF_XCVR_ERM_C0_0/I_XCVR/LANE2/TX_CLK_R | 13.468 | No paths | No paths | No paths DDR4_RD_WR_inst_0/PF_XCVR_ERM_C0_0/I_XCVR/LANE0/TX_CLK_R DDR4_RD_WR_inst_0/PF_XCVR_ERM_C0_0/I_XCVR/LANE3/TX_CLK_R | 13.468 | No paths | No paths | No paths DDR4_RD_WR_inst_0/PF_XCVR_ERM_C0_0/I_XCVR/LANE0/TX_CLK_R CLOCKS_AND_RESETS_inst_0/PF_CCC_C1_0/PF_CCC_C1_0/pll_inst_0/OUT0 | 0.004 | No paths | No paths | No paths DDR4_RD_WR_inst_0/PF_XCVR_ERM_C0_0/I_XCVR/LANE1/TX_CLK_R DDR4_RD_WR_inst_0/PF_XCVR_ERM_C0_0/I_XCVR/LANE0/TX_CLK_R | 13.468 | No paths | No paths | No paths DDR4_RD_WR_inst_0/PF_XCVR_ERM_C0_0/I_XCVR/LANE1/TX_CLK_R DDR4_RD_WR_inst_0/PF_XCVR_ERM_C0_0/I_XCVR/LANE1/TX_CLK_R | 13.468 | No paths | No paths | No paths DDR4_RD_WR_inst_0/PF_XCVR_ERM_C0_0/I_XCVR/LANE2/TX_CLK_R DDR4_RD_WR_inst_0/PF_XCVR_ERM_C0_0/I_XCVR/LANE0/TX_CLK_R | 13.468 | No paths | No paths | No paths DDR4_RD_WR_inst_0/PF_XCVR_ERM_C0_0/I_XCVR/LANE2/TX_CLK_R DDR4_RD_WR_inst_0/PF_XCVR_ERM_C0_0/I_XCVR/LANE2/TX_CLK_R | 13.468 | No paths | No paths | No paths DDR4_RD_WR_inst_0/PF_XCVR_ERM_C0_0/I_XCVR/LANE3/TX_CLK_R DDR4_RD_WR_inst_0/PF_XCVR_ERM_C0_0/I_XCVR/LANE0/TX_CLK_R | 13.468 | No paths | No paths | No paths DDR4_RD_WR_inst_0/PF_XCVR_ERM_C0_0/I_XCVR/LANE3/TX_CLK_R DDR4_RD_WR_inst_0/PF_XCVR_ERM_C0_0/I_XCVR/LANE3/TX_CLK_R | 13.468 | No paths | No paths | No paths CLOCKS_AND_RESETS_inst_0/PF_CCC_C0_0/PF_CCC_C0_0/pll_inst_0/OUT0 CLOCKS_AND_RESETS_inst_0/PF_CCC_C0_0/PF_CCC_C0_0/pll_inst_0/OUT0 | 20.000 | No paths | No paths | No paths CLOCKS_AND_RESETS_inst_0/PF_CCC_C0_0/PF_CCC_C0_0/pll_inst_0/OUT0 CLOCKS_AND_RESETS_inst_0/PF_CCC_C1_0/PF_CCC_C1_0/pll_inst_0/OUT0 | 5.000 | No paths | No paths | No paths CLOCKS_AND_RESETS_inst_0/PF_CCC_C0_0/PF_CCC_C0_0/pll_inst_0/OUT0 DDR4_RD_WR_inst_0/IMX334_IF_TOP_0/PF_CCC_C2_0/PF_CCC_C2_0/pll_inst_0/OUT0 | 1.177 | No paths | No paths | No paths DDR4_RD_WR_inst_0/IMX334_IF_TOP_0/PF_IOD_GENERIC_RX_C0_0/PF_IOD_0/PF_CLK_DIV_FIFO/I_CDD/Y_DIV DDR4_RD_WR_inst_0/IMX334_IF_TOP_0/PF_IOD_GENERIC_RX_C0_0/PF_IOD_0/PF_CLK_DIV_FIFO/I_CDD/Y_DIV | 16.000 | No paths | 8.000 | No paths DDR4_RD_WR_inst_0/IMX334_IF_TOP_0/PF_IOD_GENERIC_RX_C0_0/PF_IOD_0/PF_CLK_DIV_FIFO/I_CDD/Y_DIV DDR4_RD_WR_inst_0/IMX334_IF_TOP_0/PF_CCC_C2_0/PF_CCC_C2_0/pll_inst_0/OUT0 | 0.235 | No paths | No paths | No paths CLOCKS_AND_RESETS_inst_0/PF_CCC_C1_0/PF_CCC_C1_0/pll_inst_0/OUT0 DDR4_RD_WR_inst_0/PF_XCVR_ERM_C0_0/I_XCVR/LANE0/TX_CLK_R | 0.004 | No paths | No paths | No paths CLOCKS_AND_RESETS_inst_0/PF_CCC_C1_0/PF_CCC_C1_0/pll_inst_0/OUT0 CLOCKS_AND_RESETS_inst_0/PF_CCC_C1_0/PF_CCC_C1_0/pll_inst_0/OUT0 | 5.000 | No paths | No paths | No paths CLOCKS_AND_RESETS_inst_0/PF_CCC_C1_0/PF_CCC_C1_0/pll_inst_0/OUT0 DDR4_RD_WR_inst_0/IMX334_IF_TOP_0/PF_CCC_C2_0/PF_CCC_C2_0/pll_inst_0/OUT0 | 0.294 | No paths | No paths | No paths DDR4_RD_WR_inst_0/IMX334_IF_TOP_0/PF_CCC_C2_0/PF_CCC_C2_0/pll_inst_0/OUT0 CLOCKS_AND_RESETS_inst_0/PF_CCC_C0_0/PF_CCC_C0_0/pll_inst_0/OUT0 | 1.177 | No paths | No paths | No paths DDR4_RD_WR_inst_0/IMX334_IF_TOP_0/PF_CCC_C2_0/PF_CCC_C2_0/pll_inst_0/OUT0 CLOCKS_AND_RESETS_inst_0/PF_CCC_C1_0/PF_CCC_C1_0/pll_inst_0/OUT0 | 0.294 | No paths | No paths | No paths DDR4_RD_WR_inst_0/IMX334_IF_TOP_0/PF_CCC_C2_0/PF_CCC_C2_0/pll_inst_0/OUT0 DDR4_RD_WR_inst_0/IMX334_IF_TOP_0/PF_CCC_C2_0/PF_CCC_C2_0/pll_inst_0/OUT0 | 5.882 | No paths | No paths | No paths =============================================================================================================================================================================================================================================================================================================== Note: 'No paths' indicates there are no paths in the design for that pair of clock edges. 'Diff grp' indicates that paths exist but the starting clock and ending clock are in different clock groups. @W: : synthesis.fdc(9) | Paths from clock (DDR4_RD_WR_inst_0/PF_XCVR_ERM_C0_0/I_XCVR/LANE0/TX_CLK_R:r) to clock (CLOCKS_AND_RESETS_inst_0/PF_CCC_C1_0/PF_CCC_C1_0/pll_inst_0/OUT0:r) are overconstrained because the required time of 0.00 ns is too small. @W: : synthesis.fdc(15) | Paths from clock (CLOCKS_AND_RESETS_inst_0/PF_CCC_C1_0/PF_CCC_C1_0/pll_inst_0/OUT0:r) to clock (DDR4_RD_WR_inst_0/PF_XCVR_ERM_C0_0/I_XCVR/LANE0/TX_CLK_R:r) are overconstrained because the required time of 0.00 ns is too small. @W: : synthesis.fdc(15) | Paths from clock (CLOCKS_AND_RESETS_inst_0/PF_CCC_C1_0/PF_CCC_C1_0/pll_inst_0/OUT0:r) to clock (DDR4_RD_WR_inst_0/IMX334_IF_TOP_0/PF_CCC_C2_0/PF_CCC_C2_0/pll_inst_0/OUT0:r) are overconstrained because the required time of 0.29 ns is too small. @W: : synthesis.fdc(17) | Paths from clock (DDR4_RD_WR_inst_0/IMX334_IF_TOP_0/PF_IOD_GENERIC_RX_C0_0/PF_IOD_0/PF_CLK_DIV_FIFO/I_CDD/Y_DIV:r) to clock (DDR4_RD_WR_inst_0/IMX334_IF_TOP_0/PF_CCC_C2_0/PF_CCC_C2_0/pll_inst_0/OUT0:r) are overconstrained because the required time of 0.24 ns is too small. @W: : synthesis.fdc(16) | Paths from clock (DDR4_RD_WR_inst_0/IMX334_IF_TOP_0/PF_CCC_C2_0/PF_CCC_C2_0/pll_inst_0/OUT0:r) to clock (CLOCKS_AND_RESETS_inst_0/PF_CCC_C1_0/PF_CCC_C1_0/pll_inst_0/OUT0:r) are overconstrained because the required time of 0.29 ns is too small. @W: : synthesis.fdc(14) | Paths from clock (CLOCKS_AND_RESETS_inst_0/PF_CCC_C0_0/PF_CCC_C0_0/pll_inst_0/OUT0:r) to clock (DDR4_RD_WR_inst_0/IMX334_IF_TOP_0/PF_CCC_C2_0/PF_CCC_C2_0/pll_inst_0/OUT0:r) are overconstrained because the required time of 1.18 ns is too small. @W: : synthesis.fdc(16) | Paths from clock (DDR4_RD_WR_inst_0/IMX334_IF_TOP_0/PF_CCC_C2_0/PF_CCC_C2_0/pll_inst_0/OUT0:r) to clock (CLOCKS_AND_RESETS_inst_0/PF_CCC_C0_0/PF_CCC_C0_0/pll_inst_0/OUT0:r) are overconstrained because the required time of 1.18 ns is too small. Unconstrained Start/End Points ****************************** p:CAM1_RST p:CAM1_RXD[0] p:CAM1_RXD[1] p:CAM1_RXD[2] p:CAM1_RXD[3] p:CAM1_RXD_N[0] p:CAM1_RXD_N[1] p:CAM1_RXD_N[2] p:CAM1_RXD_N[3] p:CAM1_RX_CLK_N p:CAM1_SCL (bidir end point) p:CAM1_SCL (bidir start point) p:CAM1_SDA (bidir end point) p:CAM1_SDA (bidir start point) p:CAM_CLK_EN p:CA[0] p:CA[1] p:CA[2] p:CA[3] p:CA[4] p:CA[5] p:CK p:CKE p:CK_N p:CS p:DM[0] p:DM[1] p:DM[2] p:DM[3] p:DQS[0] (bidir end point) p:DQS[0] (bidir start point) p:DQS[1] (bidir end point) p:DQS[1] (bidir start point) p:DQS[2] (bidir end point) p:DQS[2] (bidir start point) p:DQS[3] (bidir end point) p:DQS[3] (bidir start point) p:DQS_N[0] (bidir end point) p:DQS_N[0] (bidir start point) p:DQS_N[1] (bidir end point) p:DQS_N[1] (bidir start point) p:DQS_N[2] (bidir end point) p:DQS_N[2] (bidir start point) p:DQS_N[3] (bidir end point) p:DQS_N[3] (bidir start point) p:DQ[0] (bidir end point) p:DQ[0] (bidir start point) p:DQ[1] (bidir end point) p:DQ[1] (bidir start point) p:DQ[2] (bidir end point) p:DQ[2] (bidir start point) p:DQ[3] (bidir end point) p:DQ[3] (bidir start point) p:DQ[4] (bidir end point) p:DQ[4] (bidir start point) p:DQ[5] (bidir end point) p:DQ[5] (bidir start point) p:DQ[6] (bidir end point) p:DQ[6] (bidir start point) p:DQ[7] (bidir end point) p:DQ[7] (bidir start point) p:DQ[8] (bidir end point) p:DQ[8] (bidir start point) p:DQ[9] (bidir end point) p:DQ[9] (bidir start point) p:DQ[10] (bidir end point) p:DQ[10] (bidir start point) p:DQ[11] (bidir end point) p:DQ[11] (bidir start point) p:DQ[12] (bidir end point) p:DQ[12] (bidir start point) p:DQ[13] (bidir end point) p:DQ[13] (bidir start point) p:DQ[14] (bidir end point) p:DQ[14] (bidir start point) p:DQ[15] (bidir end point) p:DQ[15] (bidir start point) p:DQ[16] (bidir end point) p:DQ[16] (bidir start point) p:DQ[17] (bidir end point) p:DQ[17] (bidir start point) p:DQ[18] (bidir end point) p:DQ[18] (bidir start point) p:DQ[19] (bidir end point) p:DQ[19] (bidir start point) p:DQ[20] (bidir end point) p:DQ[20] (bidir start point) p:DQ[21] (bidir end point) p:DQ[21] (bidir start point) p:DQ[22] (bidir end point) p:DQ[22] (bidir start point) p:DQ[23] (bidir end point) p:DQ[23] (bidir start point) p:DQ[24] (bidir end point) p:DQ[24] (bidir start point) p:DQ[25] (bidir end point) p:DQ[25] (bidir start point) p:DQ[26] (bidir end point) p:DQ[26] (bidir start point) p:DQ[27] (bidir end point) p:DQ[27] (bidir start point) p:DQ[28] (bidir end point) p:DQ[28] (bidir start point) p:DQ[29] (bidir end point) p:DQ[29] (bidir start point) p:DQ[30] (bidir end point) p:DQ[30] (bidir start point) p:DQ[31] (bidir end point) p:DQ[31] (bidir start point) p:EMMC_CLK p:EMMC_CMD (bidir end point) p:EMMC_CMD (bidir start point) p:EMMC_DATA0 (bidir end point) p:EMMC_DATA0 (bidir start point) p:EMMC_DATA1 (bidir end point) p:EMMC_DATA1 (bidir start point) p:EMMC_DATA2 (bidir end point) p:EMMC_DATA2 (bidir start point) p:EMMC_DATA3 (bidir end point) p:EMMC_DATA3 (bidir start point) p:EMMC_DATA4 (bidir end point) p:EMMC_DATA4 (bidir start point) p:EMMC_DATA5 (bidir end point) p:EMMC_DATA5 (bidir start point) p:EMMC_DATA6 (bidir end point) p:EMMC_DATA6 (bidir start point) p:EMMC_DATA7 (bidir end point) p:EMMC_DATA7 (bidir start point) p:EMMC_RSTN p:EMMC_STRB p:LANE0_TXD_N p:LANE0_TXD_P p:LANE1_TXD_N p:LANE1_TXD_P p:LANE2_TXD_N p:LANE2_TXD_P p:LANE3_TXD_N p:LANE3_TXD_P p:LED2 p:LED3 p:MAC_0_MDC p:MAC_0_MDIO (bidir end point) p:MAC_0_MDIO (bidir start point) p:MMUART_0_RXD_F2M p:MMUART_0_TXD_M2F p:MMUART_1_RXD_F2M p:MMUART_1_TXD_M2F p:ODT p:REFCLK p:REFCLK_N p:REF_CLK_PAD_N p:RESET_N p:SDIO_SW_EN_N p:SDIO_SW_SEL0 p:SDIO_SW_SEL1 p:SGMII_RX0_N p:SGMII_RX0_P p:SGMII_TX0_N p:SGMII_TX0_P p:TEN p:USB_CLK p:USB_DATA0 (bidir end point) p:USB_DATA0 (bidir start point) p:USB_DATA1 (bidir end point) p:USB_DATA1 (bidir start point) p:USB_DATA2 (bidir end point) p:USB_DATA2 (bidir start point) p:USB_DATA3 (bidir end point) p:USB_DATA3 (bidir start point) p:USB_DATA4 (bidir end point) p:USB_DATA4 (bidir start point) p:USB_DATA5 (bidir end point) p:USB_DATA5 (bidir start point) p:USB_DATA6 (bidir end point) p:USB_DATA6 (bidir start point) p:USB_DATA7 (bidir end point) p:USB_DATA7 (bidir start point) p:USB_DIR p:USB_NXT p:USB_STP p:USB_ULPI_RESET_N p:VSC_8662_CMODE3 p:VSC_8662_CMODE4 p:VSC_8662_CMODE5 p:VSC_8662_CMODE6 p:VSC_8662_CMODE7 p:VSC_8662_RESETN p:VSC_8662_SRESET p:cam1inck p:cam1xmaster Inapplicable constraints ************************ (none) Applicable constraints with issues ********************************** set_false_path -to [get_pins { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.PF_LANECTRL_0.I_LANECTRL*.HS_IO_CLK_PAUSE }] @W::"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":50:0:50:0|Timing constraint (to [get_pins { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.PF_LANECTRL_0.I_LANECTRL*.HS_IO_CLK_PAUSE }]) (false path) was not applied to the design because none of the paths specified by the constraint exist in the design Constraints with matching wildcard expressions ********************************************** set_false_path -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.*.u_CoreRxIODBitAlign.mv_dn_fg }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":20:0:20:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.*.u_CoreRxIODBitAlign.mv_dn_fg }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.mv_dn_fg set_false_path -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.*.u_CoreRxIODBitAlign.mv_up_fg }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":18:0:18:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.*.u_CoreRxIODBitAlign.mv_up_fg }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.mv_up_fg set_false_path -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.*.u_CoreRxIODBitAlign.reset_dly_fg }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":22:0:22:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.*.u_CoreRxIODBitAlign.reset_dly_fg }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.reset_dly_fg set_false_path -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.*.u_CoreRxIODBitAlign.rx_trng_done }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":23:0:23:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.*.u_CoreRxIODBitAlign.rx_trng_done }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.rx_trng_done set_false_path -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.*.u_CoreRxIODBitAlign.timeout_cnt[*] }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":24:0:24:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.*.u_CoreRxIODBitAlign.timeout_cnt[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.timeout_cnt[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.timeout_cnt[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.timeout_cnt[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.timeout_cnt[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.timeout_cnt[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.timeout_cnt[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.timeout_cnt[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.timeout_cnt[7] set_false_path -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.*.u_CoreRxIODBitAlign.mv_dn_fg }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":28:0:28:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.*.u_CoreRxIODBitAlign.mv_dn_fg }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.mv_dn_fg set_false_path -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.*.u_CoreRxIODBitAlign.mv_up_fg }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":26:0:26:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.*.u_CoreRxIODBitAlign.mv_up_fg }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.mv_up_fg set_false_path -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.*.u_CoreRxIODBitAlign.reset_dly_fg }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":30:0:30:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.*.u_CoreRxIODBitAlign.reset_dly_fg }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.reset_dly_fg set_false_path -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.*.u_CoreRxIODBitAlign.rx_trng_done }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":31:0:31:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.*.u_CoreRxIODBitAlign.rx_trng_done }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.rx_trng_done set_false_path -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.*.u_CoreRxIODBitAlign.timeout_cnt[*] }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":32:0:32:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.*.u_CoreRxIODBitAlign.timeout_cnt[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.timeout_cnt[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.timeout_cnt[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.timeout_cnt[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.timeout_cnt[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.timeout_cnt[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.timeout_cnt[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.timeout_cnt[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.timeout_cnt[7] set_false_path -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.*.u_CoreRxIODBitAlign.mv_dn_fg }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":36:0:36:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.*.u_CoreRxIODBitAlign.mv_dn_fg }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.mv_dn_fg set_false_path -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.*.u_CoreRxIODBitAlign.mv_up_fg }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":34:0:34:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.*.u_CoreRxIODBitAlign.mv_up_fg }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.mv_up_fg set_false_path -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.*.u_CoreRxIODBitAlign.reset_dly_fg }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":38:0:38:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.*.u_CoreRxIODBitAlign.reset_dly_fg }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.reset_dly_fg set_false_path -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.*.u_CoreRxIODBitAlign.rx_trng_done }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":39:0:39:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.*.u_CoreRxIODBitAlign.rx_trng_done }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.rx_trng_done set_false_path -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.*.u_CoreRxIODBitAlign.timeout_cnt[*] }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":40:0:40:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.*.u_CoreRxIODBitAlign.timeout_cnt[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.timeout_cnt[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.timeout_cnt[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.timeout_cnt[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.timeout_cnt[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.timeout_cnt[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.timeout_cnt[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.timeout_cnt[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.timeout_cnt[7] set_false_path -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.*.u_CoreRxIODBitAlign.mv_dn_fg }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":44:0:44:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.*.u_CoreRxIODBitAlign.mv_dn_fg }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.mv_dn_fg set_false_path -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.*.u_CoreRxIODBitAlign.mv_up_fg }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":42:0:42:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.*.u_CoreRxIODBitAlign.mv_up_fg }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.mv_up_fg set_false_path -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.*.u_CoreRxIODBitAlign.reset_dly_fg }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":46:0:46:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.*.u_CoreRxIODBitAlign.reset_dly_fg }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.reset_dly_fg set_false_path -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.*.u_CoreRxIODBitAlign.rx_trng_done }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":47:0:47:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.*.u_CoreRxIODBitAlign.rx_trng_done }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.rx_trng_done set_false_path -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.*.u_CoreRxIODBitAlign.timeout_cnt[*] }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":48:0:48:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.*.u_CoreRxIODBitAlign.timeout_cnt[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.timeout_cnt[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.timeout_cnt[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.timeout_cnt[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.timeout_cnt[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.timeout_cnt[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.timeout_cnt[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.timeout_cnt[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.timeout_cnt[7] set_false_path -through [get_nets { FIC_BRIDGE_0.DMA_MASTER_0.ARESETN* }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":51:0:51:0|expression "[get_nets { FIC_BRIDGE_0.DMA_MASTER_0.ARESETN* }]" applies to objects: FIC_BRIDGE_0.DMA_MASTER_0.ARESETN FIC_BRIDGE_0.DMA_MASTER_0.ARESETN_arst FIC_BRIDGE_0.DMA_MASTER_0.ARESETN_data FIC_BRIDGE_0.DMA_MASTER_0.ARESETN_i set_false_path -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.*.u_CoreRxIODBitAlign.mv_dn_fg }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":21:0:21:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.*.u_CoreRxIODBitAlign.mv_dn_fg }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.mv_dn_fg set_false_path -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.*.u_CoreRxIODBitAlign.mv_up_fg }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":19:0:19:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.*.u_CoreRxIODBitAlign.mv_up_fg }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.mv_up_fg set_false_path -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.*.u_CoreRxIODBitAlign.timeout_cnt[*] }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":25:0:25:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.*.u_CoreRxIODBitAlign.timeout_cnt[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.timeout_cnt[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.timeout_cnt[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.timeout_cnt[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.timeout_cnt[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.timeout_cnt[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.timeout_cnt[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.timeout_cnt[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.timeout_cnt[7] set_false_path -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.*.u_CoreRxIODBitAlign.mv_dn_fg }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":29:0:29:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.*.u_CoreRxIODBitAlign.mv_dn_fg }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.mv_dn_fg set_false_path -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.*.u_CoreRxIODBitAlign.mv_up_fg }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":27:0:27:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.*.u_CoreRxIODBitAlign.mv_up_fg }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.mv_up_fg set_false_path -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.*.u_CoreRxIODBitAlign.timeout_cnt[*] }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":33:0:33:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.*.u_CoreRxIODBitAlign.timeout_cnt[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.timeout_cnt[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.timeout_cnt[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.timeout_cnt[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.timeout_cnt[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.timeout_cnt[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.timeout_cnt[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.timeout_cnt[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.timeout_cnt[7] set_false_path -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.*.u_CoreRxIODBitAlign.mv_dn_fg }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":37:0:37:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.*.u_CoreRxIODBitAlign.mv_dn_fg }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.mv_dn_fg set_false_path -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.*.u_CoreRxIODBitAlign.mv_up_fg }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":35:0:35:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.*.u_CoreRxIODBitAlign.mv_up_fg }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.mv_up_fg set_false_path -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.*.u_CoreRxIODBitAlign.timeout_cnt[*] }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":41:0:41:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.*.u_CoreRxIODBitAlign.timeout_cnt[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.timeout_cnt[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.timeout_cnt[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.timeout_cnt[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.timeout_cnt[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.timeout_cnt[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.timeout_cnt[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.timeout_cnt[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.timeout_cnt[7] set_false_path -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.*.u_CoreRxIODBitAlign.mv_dn_fg }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":45:0:45:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.*.u_CoreRxIODBitAlign.mv_dn_fg }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.mv_dn_fg set_false_path -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.*.u_CoreRxIODBitAlign.mv_up_fg }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":43:0:43:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.*.u_CoreRxIODBitAlign.mv_up_fg }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.mv_up_fg set_false_path -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.*.u_CoreRxIODBitAlign.timeout_cnt[*] }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":49:0:49:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.*.u_CoreRxIODBitAlign.timeout_cnt[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.timeout_cnt[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.timeout_cnt[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.timeout_cnt[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.timeout_cnt[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.timeout_cnt[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.timeout_cnt[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.timeout_cnt[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.timeout_cnt[7] set_false_path -to [get_pins { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.PF_LANECTRL_0.I_LANECTRL*.HS_IO_CLK_PAUSE }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":50:0:50:0|expression "[get_pins { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.PF_LANECTRL_0.I_LANECTRL*.HS_IO_CLK_PAUSE }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.PF_LANECTRL_0.I_LANECTRL.HS_IO_CLK_PAUSE DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.PF_LANECTRL_0.I_LANECTRL_PAUSE_SYNC.HS_IO_CLK_PAUSE set_multicycle_path -hold 1 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.*.u_CoreRxIODBitAlign.bitalign_curr_state[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.*.u_CoreRxIODBitAlign.early_flags_lsb[*] }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":101:0:101:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.*.u_CoreRxIODBitAlign.bitalign_curr_state[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.bitalign_curr_state[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.bitalign_curr_state[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.bitalign_curr_state[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.bitalign_curr_state[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.bitalign_curr_state[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.bitalign_curr_state[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.bitalign_curr_state[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.bitalign_curr_state[7] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.bitalign_curr_state[8] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.bitalign_curr_state[9] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.bitalign_curr_state[10] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.bitalign_curr_state[11] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.bitalign_curr_state[12] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.bitalign_curr_state[13] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.bitalign_curr_state[14] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.bitalign_curr_state[15] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.bitalign_curr_state[16] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.bitalign_curr_state[17] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.bitalign_curr_state[18] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.bitalign_curr_state[19] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.bitalign_curr_state[20] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.bitalign_curr_state[21] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.bitalign_curr_state[22] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.bitalign_curr_state[23] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.bitalign_curr_state[24] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.bitalign_curr_state[25] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.bitalign_curr_state[26] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.bitalign_curr_state[27] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.bitalign_curr_state[28] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.bitalign_curr_state[29] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":101:0:101:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.*.u_CoreRxIODBitAlign.early_flags_lsb[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[7] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[8] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[9] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[10] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[11] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[12] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[13] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[14] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[15] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[16] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[17] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[18] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[19] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[20] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[21] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[22] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[23] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[24] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[25] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[26] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[27] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[28] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[29] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[30] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[31] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[32] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[33] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[34] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[35] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[36] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[37] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[38] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[39] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[40] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[41] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[42] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[43] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[44] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[45] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[46] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[47] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[48] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[49] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[50] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[51] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[52] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[53] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[54] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[55] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[56] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[57] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[58] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[59] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[60] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[61] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[62] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[63] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[64] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[65] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[66] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[67] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[68] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[69] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[70] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[71] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[72] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[73] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[74] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[75] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[76] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[77] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[78] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[79] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[80] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[81] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[82] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[83] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[84] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[85] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[86] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[87] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[88] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[89] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[90] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[91] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[92] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[93] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[94] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[95] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[96] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[97] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[98] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[99] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[100] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[101] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[102] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[103] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[104] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[105] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[106] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[107] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[108] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[109] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[110] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[111] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[112] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[113] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[114] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[115] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[116] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[117] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[118] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[119] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[120] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[121] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[122] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[123] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[124] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[125] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[126] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[127] set_multicycle_path -hold 1 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.*.u_CoreRxIODBitAlign.bitalign_curr_state[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.*.u_CoreRxIODBitAlign.early_flags_msb[*] }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":103:0:103:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.*.u_CoreRxIODBitAlign.bitalign_curr_state[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.bitalign_curr_state[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.bitalign_curr_state[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.bitalign_curr_state[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.bitalign_curr_state[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.bitalign_curr_state[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.bitalign_curr_state[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.bitalign_curr_state[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.bitalign_curr_state[7] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.bitalign_curr_state[8] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.bitalign_curr_state[9] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.bitalign_curr_state[10] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.bitalign_curr_state[11] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.bitalign_curr_state[12] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.bitalign_curr_state[13] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.bitalign_curr_state[14] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.bitalign_curr_state[15] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.bitalign_curr_state[16] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.bitalign_curr_state[17] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.bitalign_curr_state[18] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.bitalign_curr_state[19] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.bitalign_curr_state[20] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.bitalign_curr_state[21] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.bitalign_curr_state[22] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.bitalign_curr_state[23] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.bitalign_curr_state[24] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.bitalign_curr_state[25] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.bitalign_curr_state[26] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.bitalign_curr_state[27] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.bitalign_curr_state[28] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.bitalign_curr_state[29] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":103:0:103:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.*.u_CoreRxIODBitAlign.early_flags_msb[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[7] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[8] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[9] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[10] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[11] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[12] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[13] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[14] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[15] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[16] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[17] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[18] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[19] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[20] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[21] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[22] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[23] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[24] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[25] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[26] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[27] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[28] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[29] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[30] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[31] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[32] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[33] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[34] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[35] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[36] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[37] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[38] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[39] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[40] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[41] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[42] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[43] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[44] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[45] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[46] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[47] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[48] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[49] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[50] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[51] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[52] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[53] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[54] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[55] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[56] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[57] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[58] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[59] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[60] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[61] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[62] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[63] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[64] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[65] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[66] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[67] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[68] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[69] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[70] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[71] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[72] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[73] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[74] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[75] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[76] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[77] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[78] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[79] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[80] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[81] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[82] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[83] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[84] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[85] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[86] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[87] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[88] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[89] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[90] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[91] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[92] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[93] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[94] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[95] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[96] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[97] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[98] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[99] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[100] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[101] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[102] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[103] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[104] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[105] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[106] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[107] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[108] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[109] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[110] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[111] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[112] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[113] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[114] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[115] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[116] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[117] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[118] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[119] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[120] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[121] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[122] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[123] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[124] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[125] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[126] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[127] set_multicycle_path -hold 1 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.*.u_CoreRxIODBitAlign.bitalign_curr_state[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.*.u_CoreRxIODBitAlign.late_flags_lsb[*] }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":97:0:97:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.*.u_CoreRxIODBitAlign.bitalign_curr_state[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.bitalign_curr_state[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.bitalign_curr_state[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.bitalign_curr_state[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.bitalign_curr_state[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.bitalign_curr_state[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.bitalign_curr_state[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.bitalign_curr_state[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.bitalign_curr_state[7] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.bitalign_curr_state[8] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.bitalign_curr_state[9] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.bitalign_curr_state[10] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.bitalign_curr_state[11] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.bitalign_curr_state[12] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.bitalign_curr_state[13] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.bitalign_curr_state[14] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.bitalign_curr_state[15] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.bitalign_curr_state[16] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.bitalign_curr_state[17] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.bitalign_curr_state[18] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.bitalign_curr_state[19] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.bitalign_curr_state[20] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.bitalign_curr_state[21] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.bitalign_curr_state[22] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.bitalign_curr_state[23] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.bitalign_curr_state[24] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.bitalign_curr_state[25] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.bitalign_curr_state[26] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.bitalign_curr_state[27] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.bitalign_curr_state[28] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.bitalign_curr_state[29] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":97:0:97:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.*.u_CoreRxIODBitAlign.late_flags_lsb[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[7] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[8] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[9] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[10] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[11] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[12] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[13] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[14] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[15] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[16] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[17] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[18] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[19] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[20] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[21] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[22] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[23] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[24] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[25] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[26] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[27] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[28] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[29] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[30] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[31] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[32] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[33] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[34] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[35] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[36] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[37] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[38] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[39] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[40] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[41] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[42] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[43] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[44] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[45] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[46] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[47] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[48] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[49] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[50] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[51] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[52] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[53] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[54] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[55] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[56] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[57] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[58] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[59] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[60] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[61] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[62] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[63] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[64] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[65] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[66] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[67] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[68] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[69] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[70] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[71] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[72] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[73] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[74] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[75] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[76] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[77] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[78] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[79] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[80] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[81] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[82] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[83] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[84] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[85] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[86] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[87] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[88] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[89] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[90] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[91] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[92] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[93] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[94] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[95] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[96] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[97] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[98] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[99] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[100] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[101] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[102] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[103] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[104] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[105] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[106] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[107] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[108] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[109] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[110] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[111] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[112] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[113] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[114] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[115] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[116] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[117] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[118] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[119] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[120] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[121] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[122] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[123] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[124] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[125] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[126] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[127] set_multicycle_path -hold 1 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.*.u_CoreRxIODBitAlign.bitalign_curr_state[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.*.u_CoreRxIODBitAlign.late_flags_msb[*] }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":99:0:99:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.*.u_CoreRxIODBitAlign.bitalign_curr_state[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.bitalign_curr_state[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.bitalign_curr_state[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.bitalign_curr_state[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.bitalign_curr_state[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.bitalign_curr_state[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.bitalign_curr_state[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.bitalign_curr_state[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.bitalign_curr_state[7] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.bitalign_curr_state[8] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.bitalign_curr_state[9] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.bitalign_curr_state[10] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.bitalign_curr_state[11] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.bitalign_curr_state[12] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.bitalign_curr_state[13] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.bitalign_curr_state[14] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.bitalign_curr_state[15] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.bitalign_curr_state[16] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.bitalign_curr_state[17] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.bitalign_curr_state[18] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.bitalign_curr_state[19] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.bitalign_curr_state[20] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.bitalign_curr_state[21] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.bitalign_curr_state[22] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.bitalign_curr_state[23] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.bitalign_curr_state[24] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.bitalign_curr_state[25] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.bitalign_curr_state[26] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.bitalign_curr_state[27] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.bitalign_curr_state[28] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.bitalign_curr_state[29] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":99:0:99:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.*.u_CoreRxIODBitAlign.late_flags_msb[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[7] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[8] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[9] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[10] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[11] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[12] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[13] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[14] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[15] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[16] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[17] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[18] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[19] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[20] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[21] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[22] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[23] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[24] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[25] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[26] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[27] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[28] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[29] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[30] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[31] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[32] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[33] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[34] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[35] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[36] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[37] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[38] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[39] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[40] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[41] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[42] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[43] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[44] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[45] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[46] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[47] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[48] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[49] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[50] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[51] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[52] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[53] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[54] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[55] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[56] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[57] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[58] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[59] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[60] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[61] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[62] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[63] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[64] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[65] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[66] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[67] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[68] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[69] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[70] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[71] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[72] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[73] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[74] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[75] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[76] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[77] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[78] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[79] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[80] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[81] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[82] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[83] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[84] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[85] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[86] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[87] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[88] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[89] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[90] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[91] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[92] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[93] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[94] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[95] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[96] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[97] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[98] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[99] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[100] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[101] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[102] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[103] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[104] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[105] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[106] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[107] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[108] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[109] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[110] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[111] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[112] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[113] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[114] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[115] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[116] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[117] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[118] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[119] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[120] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[121] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[122] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[123] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[124] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[125] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[126] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[127] set_multicycle_path -hold 1 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.*.u_CoreRxIODBitAlign.cnt[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.*.u_CoreRxIODBitAlign.early_flags_lsb[*] }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":109:0:109:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.*.u_CoreRxIODBitAlign.cnt[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.cnt[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.cnt[1] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":109:0:109:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.*.u_CoreRxIODBitAlign.early_flags_lsb[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[7] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[8] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[9] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[10] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[11] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[12] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[13] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[14] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[15] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[16] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[17] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[18] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[19] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[20] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[21] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[22] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[23] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[24] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[25] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[26] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[27] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[28] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[29] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[30] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[31] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[32] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[33] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[34] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[35] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[36] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[37] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[38] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[39] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[40] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[41] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[42] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[43] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[44] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[45] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[46] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[47] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[48] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[49] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[50] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[51] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[52] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[53] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[54] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[55] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[56] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[57] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[58] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[59] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[60] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[61] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[62] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[63] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[64] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[65] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[66] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[67] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[68] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[69] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[70] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[71] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[72] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[73] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[74] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[75] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[76] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[77] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[78] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[79] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[80] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[81] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[82] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[83] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[84] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[85] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[86] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[87] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[88] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[89] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[90] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[91] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[92] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[93] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[94] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[95] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[96] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[97] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[98] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[99] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[100] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[101] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[102] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[103] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[104] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[105] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[106] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[107] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[108] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[109] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[110] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[111] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[112] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[113] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[114] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[115] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[116] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[117] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[118] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[119] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[120] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[121] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[122] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[123] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[124] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[125] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[126] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[127] set_multicycle_path -hold 1 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.*.u_CoreRxIODBitAlign.cnt[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.*.u_CoreRxIODBitAlign.early_flags_msb[*] }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":111:0:111:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.*.u_CoreRxIODBitAlign.cnt[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.cnt[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.cnt[1] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":111:0:111:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.*.u_CoreRxIODBitAlign.early_flags_msb[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[7] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[8] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[9] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[10] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[11] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[12] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[13] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[14] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[15] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[16] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[17] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[18] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[19] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[20] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[21] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[22] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[23] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[24] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[25] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[26] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[27] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[28] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[29] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[30] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[31] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[32] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[33] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[34] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[35] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[36] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[37] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[38] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[39] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[40] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[41] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[42] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[43] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[44] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[45] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[46] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[47] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[48] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[49] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[50] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[51] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[52] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[53] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[54] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[55] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[56] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[57] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[58] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[59] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[60] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[61] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[62] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[63] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[64] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[65] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[66] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[67] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[68] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[69] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[70] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[71] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[72] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[73] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[74] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[75] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[76] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[77] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[78] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[79] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[80] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[81] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[82] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[83] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[84] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[85] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[86] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[87] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[88] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[89] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[90] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[91] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[92] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[93] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[94] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[95] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[96] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[97] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[98] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[99] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[100] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[101] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[102] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[103] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[104] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[105] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[106] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[107] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[108] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[109] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[110] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[111] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[112] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[113] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[114] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[115] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[116] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[117] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[118] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[119] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[120] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[121] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[122] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[123] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[124] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[125] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[126] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[127] set_multicycle_path -hold 1 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.*.u_CoreRxIODBitAlign.cnt[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.*.u_CoreRxIODBitAlign.late_flags_lsb[*] }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":105:0:105:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.*.u_CoreRxIODBitAlign.cnt[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.cnt[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.cnt[1] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":105:0:105:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.*.u_CoreRxIODBitAlign.late_flags_lsb[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[7] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[8] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[9] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[10] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[11] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[12] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[13] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[14] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[15] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[16] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[17] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[18] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[19] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[20] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[21] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[22] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[23] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[24] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[25] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[26] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[27] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[28] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[29] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[30] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[31] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[32] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[33] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[34] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[35] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[36] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[37] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[38] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[39] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[40] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[41] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[42] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[43] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[44] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[45] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[46] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[47] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[48] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[49] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[50] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[51] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[52] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[53] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[54] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[55] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[56] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[57] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[58] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[59] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[60] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[61] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[62] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[63] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[64] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[65] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[66] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[67] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[68] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[69] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[70] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[71] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[72] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[73] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[74] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[75] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[76] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[77] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[78] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[79] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[80] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[81] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[82] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[83] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[84] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[85] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[86] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[87] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[88] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[89] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[90] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[91] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[92] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[93] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[94] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[95] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[96] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[97] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[98] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[99] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[100] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[101] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[102] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[103] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[104] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[105] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[106] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[107] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[108] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[109] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[110] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[111] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[112] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[113] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[114] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[115] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[116] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[117] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[118] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[119] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[120] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[121] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[122] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[123] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[124] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[125] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[126] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[127] set_multicycle_path -hold 1 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.*.u_CoreRxIODBitAlign.cnt[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.*.u_CoreRxIODBitAlign.late_flags_msb[*] }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":107:0:107:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.*.u_CoreRxIODBitAlign.cnt[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.cnt[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.cnt[1] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":107:0:107:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.*.u_CoreRxIODBitAlign.late_flags_msb[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[7] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[8] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[9] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[10] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[11] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[12] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[13] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[14] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[15] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[16] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[17] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[18] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[19] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[20] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[21] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[22] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[23] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[24] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[25] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[26] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[27] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[28] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[29] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[30] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[31] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[32] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[33] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[34] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[35] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[36] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[37] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[38] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[39] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[40] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[41] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[42] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[43] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[44] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[45] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[46] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[47] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[48] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[49] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[50] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[51] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[52] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[53] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[54] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[55] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[56] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[57] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[58] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[59] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[60] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[61] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[62] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[63] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[64] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[65] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[66] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[67] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[68] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[69] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[70] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[71] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[72] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[73] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[74] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[75] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[76] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[77] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[78] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[79] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[80] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[81] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[82] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[83] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[84] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[85] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[86] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[87] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[88] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[89] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[90] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[91] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[92] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[93] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[94] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[95] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[96] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[97] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[98] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[99] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[100] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[101] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[102] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[103] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[104] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[105] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[106] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[107] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[108] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[109] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[110] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[111] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[112] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[113] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[114] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[115] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[116] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[117] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[118] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[119] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[120] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[121] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[122] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[123] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[124] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[125] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[126] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[127] set_multicycle_path -hold 1 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.*.u_CoreRxIODBitAlign.cnt[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.*.u_CoreRxIODBitAlign.tap_cnt[*] }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":95:0:95:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.*.u_CoreRxIODBitAlign.cnt[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.cnt[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.cnt[1] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":95:0:95:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.*.u_CoreRxIODBitAlign.tap_cnt[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.tap_cnt[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.tap_cnt[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.tap_cnt[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.tap_cnt[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.tap_cnt[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.tap_cnt[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.tap_cnt[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.tap_cnt[7] set_multicycle_path -hold 1 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.*.u_CoreRxIODBitAlign.early_found_lsb_d }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":57:0:57:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[7] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":57:0:57:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.*.u_CoreRxIODBitAlign.early_found_lsb_d }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_found_lsb_d set_multicycle_path -hold 1 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.*.u_CoreRxIODBitAlign.early_found_msb_d }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":59:0:59:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[7] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":59:0:59:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.*.u_CoreRxIODBitAlign.early_found_msb_d }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_found_msb_d set_multicycle_path -hold 1 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.*.u_CoreRxIODBitAlign.early_not_found_lsb_d }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":61:0:61:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[7] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":61:0:61:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.*.u_CoreRxIODBitAlign.early_not_found_lsb_d }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_not_found_lsb_d set_multicycle_path -hold 1 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.*.u_CoreRxIODBitAlign.early_not_found_msb_d }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":63:0:63:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[7] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":63:0:63:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.*.u_CoreRxIODBitAlign.early_not_found_msb_d }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_not_found_msb_d set_multicycle_path -hold 1 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.*.u_CoreRxIODBitAlign.late_found_lsb_d }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":53:0:53:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[7] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":53:0:53:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.*.u_CoreRxIODBitAlign.late_found_lsb_d }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_found_lsb_d set_multicycle_path -hold 1 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.*.u_CoreRxIODBitAlign.late_found_msb_d }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":55:0:55:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[7] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":55:0:55:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.*.u_CoreRxIODBitAlign.late_found_msb_d }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_found_msb_d set_multicycle_path -hold 1 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.*.u_CoreRxIODBitAlign.late_not_found_lsb_d }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":65:0:65:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[7] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":65:0:65:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.*.u_CoreRxIODBitAlign.late_not_found_lsb_d }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_not_found_lsb_d set_multicycle_path -hold 1 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.*.u_CoreRxIODBitAlign.late_not_found_msb_d }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":67:0:67:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[7] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":67:0:67:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.*.u_CoreRxIODBitAlign.late_not_found_msb_d }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_not_found_msb_d set_multicycle_path -hold 1 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.*.u_CoreRxIODBitAlign.bitalign_curr_state[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.*.u_CoreRxIODBitAlign.early_flags_lsb[*] }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":161:0:161:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.*.u_CoreRxIODBitAlign.bitalign_curr_state[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.bitalign_curr_state[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.bitalign_curr_state[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.bitalign_curr_state[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.bitalign_curr_state[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.bitalign_curr_state[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.bitalign_curr_state[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.bitalign_curr_state[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.bitalign_curr_state[7] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.bitalign_curr_state[8] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.bitalign_curr_state[9] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.bitalign_curr_state[10] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.bitalign_curr_state[11] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.bitalign_curr_state[12] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.bitalign_curr_state[13] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.bitalign_curr_state[14] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.bitalign_curr_state[15] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.bitalign_curr_state[16] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.bitalign_curr_state[17] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.bitalign_curr_state[18] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.bitalign_curr_state[19] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.bitalign_curr_state[20] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.bitalign_curr_state[21] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.bitalign_curr_state[22] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.bitalign_curr_state[23] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.bitalign_curr_state[24] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.bitalign_curr_state[25] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.bitalign_curr_state[26] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.bitalign_curr_state[27] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.bitalign_curr_state[28] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.bitalign_curr_state[29] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":161:0:161:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.*.u_CoreRxIODBitAlign.early_flags_lsb[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[7] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[8] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[9] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[10] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[11] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[12] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[13] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[14] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[15] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[16] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[17] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[18] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[19] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[20] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[21] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[22] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[23] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[24] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[25] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[26] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[27] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[28] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[29] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[30] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[31] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[32] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[33] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[34] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[35] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[36] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[37] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[38] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[39] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[40] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[41] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[42] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[43] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[44] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[45] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[46] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[47] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[48] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[49] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[50] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[51] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[52] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[53] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[54] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[55] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[56] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[57] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[58] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[59] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[60] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[61] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[62] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[63] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[64] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[65] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[66] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[67] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[68] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[69] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[70] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[71] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[72] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[73] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[74] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[75] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[76] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[77] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[78] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[79] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[80] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[81] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[82] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[83] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[84] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[85] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[86] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[87] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[88] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[89] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[90] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[91] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[92] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[93] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[94] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[95] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[96] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[97] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[98] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[99] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[100] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[101] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[102] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[103] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[104] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[105] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[106] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[107] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[108] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[109] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[110] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[111] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[112] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[113] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[114] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[115] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[116] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[117] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[118] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[119] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[120] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[121] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[122] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[123] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[124] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[125] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[126] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[127] set_multicycle_path -hold 1 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.*.u_CoreRxIODBitAlign.bitalign_curr_state[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.*.u_CoreRxIODBitAlign.early_flags_msb[*] }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":163:0:163:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.*.u_CoreRxIODBitAlign.bitalign_curr_state[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.bitalign_curr_state[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.bitalign_curr_state[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.bitalign_curr_state[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.bitalign_curr_state[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.bitalign_curr_state[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.bitalign_curr_state[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.bitalign_curr_state[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.bitalign_curr_state[7] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.bitalign_curr_state[8] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.bitalign_curr_state[9] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.bitalign_curr_state[10] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.bitalign_curr_state[11] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.bitalign_curr_state[12] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.bitalign_curr_state[13] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.bitalign_curr_state[14] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.bitalign_curr_state[15] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.bitalign_curr_state[16] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.bitalign_curr_state[17] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.bitalign_curr_state[18] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.bitalign_curr_state[19] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.bitalign_curr_state[20] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.bitalign_curr_state[21] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.bitalign_curr_state[22] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.bitalign_curr_state[23] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.bitalign_curr_state[24] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.bitalign_curr_state[25] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.bitalign_curr_state[26] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.bitalign_curr_state[27] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.bitalign_curr_state[28] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.bitalign_curr_state[29] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":163:0:163:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.*.u_CoreRxIODBitAlign.early_flags_msb[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[7] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[8] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[9] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[10] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[11] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[12] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[13] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[14] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[15] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[16] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[17] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[18] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[19] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[20] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[21] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[22] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[23] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[24] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[25] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[26] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[27] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[28] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[29] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[30] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[31] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[32] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[33] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[34] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[35] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[36] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[37] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[38] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[39] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[40] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[41] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[42] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[43] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[44] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[45] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[46] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[47] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[48] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[49] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[50] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[51] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[52] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[53] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[54] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[55] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[56] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[57] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[58] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[59] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[60] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[61] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[62] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[63] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[64] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[65] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[66] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[67] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[68] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[69] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[70] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[71] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[72] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[73] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[74] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[75] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[76] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[77] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[78] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[79] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[80] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[81] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[82] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[83] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[84] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[85] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[86] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[87] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[88] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[89] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[90] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[91] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[92] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[93] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[94] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[95] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[96] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[97] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[98] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[99] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[100] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[101] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[102] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[103] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[104] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[105] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[106] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[107] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[108] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[109] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[110] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[111] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[112] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[113] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[114] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[115] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[116] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[117] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[118] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[119] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[120] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[121] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[122] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[123] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[124] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[125] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[126] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[127] set_multicycle_path -hold 1 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.*.u_CoreRxIODBitAlign.bitalign_curr_state[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.*.u_CoreRxIODBitAlign.late_flags_lsb[*] }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":157:0:157:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.*.u_CoreRxIODBitAlign.bitalign_curr_state[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.bitalign_curr_state[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.bitalign_curr_state[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.bitalign_curr_state[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.bitalign_curr_state[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.bitalign_curr_state[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.bitalign_curr_state[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.bitalign_curr_state[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.bitalign_curr_state[7] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.bitalign_curr_state[8] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.bitalign_curr_state[9] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.bitalign_curr_state[10] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.bitalign_curr_state[11] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.bitalign_curr_state[12] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.bitalign_curr_state[13] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.bitalign_curr_state[14] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.bitalign_curr_state[15] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.bitalign_curr_state[16] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.bitalign_curr_state[17] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.bitalign_curr_state[18] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.bitalign_curr_state[19] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.bitalign_curr_state[20] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.bitalign_curr_state[21] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.bitalign_curr_state[22] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.bitalign_curr_state[23] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.bitalign_curr_state[24] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.bitalign_curr_state[25] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.bitalign_curr_state[26] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.bitalign_curr_state[27] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.bitalign_curr_state[28] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.bitalign_curr_state[29] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":157:0:157:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.*.u_CoreRxIODBitAlign.late_flags_lsb[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[7] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[8] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[9] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[10] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[11] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[12] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[13] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[14] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[15] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[16] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[17] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[18] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[19] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[20] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[21] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[22] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[23] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[24] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[25] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[26] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[27] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[28] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[29] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[30] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[31] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[32] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[33] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[34] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[35] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[36] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[37] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[38] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[39] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[40] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[41] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[42] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[43] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[44] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[45] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[46] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[47] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[48] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[49] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[50] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[51] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[52] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[53] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[54] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[55] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[56] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[57] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[58] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[59] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[60] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[61] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[62] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[63] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[64] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[65] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[66] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[67] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[68] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[69] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[70] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[71] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[72] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[73] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[74] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[75] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[76] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[77] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[78] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[79] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[80] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[81] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[82] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[83] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[84] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[85] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[86] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[87] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[88] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[89] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[90] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[91] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[92] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[93] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[94] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[95] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[96] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[97] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[98] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[99] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[100] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[101] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[102] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[103] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[104] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[105] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[106] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[107] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[108] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[109] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[110] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[111] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[112] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[113] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[114] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[115] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[116] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[117] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[118] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[119] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[120] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[121] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[122] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[123] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[124] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[125] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[126] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[127] set_multicycle_path -hold 1 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.*.u_CoreRxIODBitAlign.bitalign_curr_state[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.*.u_CoreRxIODBitAlign.late_flags_msb[*] }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":159:0:159:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.*.u_CoreRxIODBitAlign.bitalign_curr_state[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.bitalign_curr_state[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.bitalign_curr_state[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.bitalign_curr_state[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.bitalign_curr_state[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.bitalign_curr_state[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.bitalign_curr_state[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.bitalign_curr_state[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.bitalign_curr_state[7] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.bitalign_curr_state[8] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.bitalign_curr_state[9] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.bitalign_curr_state[10] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.bitalign_curr_state[11] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.bitalign_curr_state[12] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.bitalign_curr_state[13] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.bitalign_curr_state[14] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.bitalign_curr_state[15] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.bitalign_curr_state[16] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.bitalign_curr_state[17] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.bitalign_curr_state[18] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.bitalign_curr_state[19] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.bitalign_curr_state[20] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.bitalign_curr_state[21] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.bitalign_curr_state[22] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.bitalign_curr_state[23] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.bitalign_curr_state[24] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.bitalign_curr_state[25] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.bitalign_curr_state[26] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.bitalign_curr_state[27] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.bitalign_curr_state[28] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.bitalign_curr_state[29] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":159:0:159:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.*.u_CoreRxIODBitAlign.late_flags_msb[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[7] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[8] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[9] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[10] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[11] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[12] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[13] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[14] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[15] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[16] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[17] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[18] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[19] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[20] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[21] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[22] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[23] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[24] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[25] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[26] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[27] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[28] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[29] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[30] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[31] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[32] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[33] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[34] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[35] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[36] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[37] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[38] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[39] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[40] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[41] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[42] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[43] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[44] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[45] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[46] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[47] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[48] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[49] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[50] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[51] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[52] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[53] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[54] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[55] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[56] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[57] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[58] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[59] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[60] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[61] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[62] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[63] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[64] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[65] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[66] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[67] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[68] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[69] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[70] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[71] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[72] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[73] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[74] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[75] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[76] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[77] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[78] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[79] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[80] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[81] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[82] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[83] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[84] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[85] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[86] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[87] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[88] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[89] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[90] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[91] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[92] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[93] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[94] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[95] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[96] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[97] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[98] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[99] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[100] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[101] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[102] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[103] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[104] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[105] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[106] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[107] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[108] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[109] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[110] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[111] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[112] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[113] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[114] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[115] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[116] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[117] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[118] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[119] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[120] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[121] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[122] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[123] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[124] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[125] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[126] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[127] set_multicycle_path -hold 1 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.*.u_CoreRxIODBitAlign.cnt[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.*.u_CoreRxIODBitAlign.early_flags_lsb[*] }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":169:0:169:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.*.u_CoreRxIODBitAlign.cnt[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.cnt[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.cnt[1] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":169:0:169:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.*.u_CoreRxIODBitAlign.early_flags_lsb[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[7] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[8] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[9] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[10] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[11] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[12] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[13] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[14] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[15] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[16] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[17] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[18] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[19] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[20] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[21] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[22] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[23] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[24] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[25] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[26] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[27] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[28] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[29] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[30] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[31] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[32] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[33] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[34] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[35] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[36] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[37] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[38] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[39] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[40] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[41] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[42] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[43] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[44] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[45] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[46] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[47] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[48] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[49] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[50] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[51] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[52] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[53] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[54] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[55] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[56] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[57] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[58] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[59] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[60] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[61] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[62] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[63] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[64] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[65] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[66] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[67] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[68] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[69] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[70] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[71] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[72] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[73] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[74] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[75] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[76] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[77] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[78] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[79] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[80] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[81] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[82] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[83] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[84] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[85] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[86] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[87] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[88] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[89] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[90] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[91] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[92] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[93] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[94] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[95] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[96] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[97] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[98] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[99] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[100] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[101] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[102] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[103] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[104] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[105] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[106] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[107] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[108] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[109] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[110] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[111] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[112] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[113] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[114] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[115] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[116] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[117] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[118] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[119] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[120] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[121] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[122] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[123] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[124] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[125] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[126] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[127] set_multicycle_path -hold 1 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.*.u_CoreRxIODBitAlign.cnt[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.*.u_CoreRxIODBitAlign.early_flags_msb[*] }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":171:0:171:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.*.u_CoreRxIODBitAlign.cnt[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.cnt[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.cnt[1] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":171:0:171:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.*.u_CoreRxIODBitAlign.early_flags_msb[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[7] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[8] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[9] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[10] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[11] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[12] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[13] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[14] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[15] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[16] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[17] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[18] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[19] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[20] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[21] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[22] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[23] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[24] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[25] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[26] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[27] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[28] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[29] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[30] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[31] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[32] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[33] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[34] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[35] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[36] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[37] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[38] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[39] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[40] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[41] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[42] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[43] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[44] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[45] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[46] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[47] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[48] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[49] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[50] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[51] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[52] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[53] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[54] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[55] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[56] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[57] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[58] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[59] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[60] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[61] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[62] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[63] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[64] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[65] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[66] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[67] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[68] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[69] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[70] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[71] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[72] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[73] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[74] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[75] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[76] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[77] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[78] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[79] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[80] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[81] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[82] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[83] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[84] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[85] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[86] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[87] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[88] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[89] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[90] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[91] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[92] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[93] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[94] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[95] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[96] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[97] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[98] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[99] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[100] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[101] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[102] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[103] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[104] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[105] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[106] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[107] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[108] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[109] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[110] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[111] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[112] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[113] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[114] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[115] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[116] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[117] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[118] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[119] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[120] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[121] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[122] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[123] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[124] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[125] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[126] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[127] set_multicycle_path -hold 1 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.*.u_CoreRxIODBitAlign.cnt[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.*.u_CoreRxIODBitAlign.late_flags_lsb[*] }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":165:0:165:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.*.u_CoreRxIODBitAlign.cnt[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.cnt[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.cnt[1] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":165:0:165:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.*.u_CoreRxIODBitAlign.late_flags_lsb[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[7] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[8] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[9] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[10] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[11] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[12] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[13] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[14] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[15] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[16] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[17] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[18] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[19] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[20] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[21] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[22] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[23] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[24] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[25] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[26] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[27] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[28] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[29] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[30] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[31] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[32] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[33] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[34] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[35] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[36] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[37] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[38] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[39] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[40] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[41] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[42] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[43] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[44] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[45] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[46] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[47] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[48] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[49] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[50] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[51] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[52] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[53] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[54] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[55] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[56] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[57] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[58] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[59] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[60] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[61] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[62] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[63] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[64] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[65] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[66] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[67] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[68] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[69] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[70] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[71] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[72] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[73] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[74] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[75] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[76] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[77] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[78] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[79] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[80] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[81] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[82] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[83] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[84] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[85] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[86] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[87] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[88] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[89] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[90] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[91] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[92] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[93] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[94] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[95] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[96] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[97] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[98] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[99] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[100] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[101] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[102] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[103] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[104] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[105] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[106] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[107] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[108] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[109] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[110] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[111] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[112] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[113] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[114] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[115] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[116] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[117] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[118] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[119] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[120] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[121] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[122] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[123] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[124] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[125] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[126] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[127] set_multicycle_path -hold 1 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.*.u_CoreRxIODBitAlign.cnt[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.*.u_CoreRxIODBitAlign.late_flags_msb[*] }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":167:0:167:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.*.u_CoreRxIODBitAlign.cnt[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.cnt[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.cnt[1] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":167:0:167:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.*.u_CoreRxIODBitAlign.late_flags_msb[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[7] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[8] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[9] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[10] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[11] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[12] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[13] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[14] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[15] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[16] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[17] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[18] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[19] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[20] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[21] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[22] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[23] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[24] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[25] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[26] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[27] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[28] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[29] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[30] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[31] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[32] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[33] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[34] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[35] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[36] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[37] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[38] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[39] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[40] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[41] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[42] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[43] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[44] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[45] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[46] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[47] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[48] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[49] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[50] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[51] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[52] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[53] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[54] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[55] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[56] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[57] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[58] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[59] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[60] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[61] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[62] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[63] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[64] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[65] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[66] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[67] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[68] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[69] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[70] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[71] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[72] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[73] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[74] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[75] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[76] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[77] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[78] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[79] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[80] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[81] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[82] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[83] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[84] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[85] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[86] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[87] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[88] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[89] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[90] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[91] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[92] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[93] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[94] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[95] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[96] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[97] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[98] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[99] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[100] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[101] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[102] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[103] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[104] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[105] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[106] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[107] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[108] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[109] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[110] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[111] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[112] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[113] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[114] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[115] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[116] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[117] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[118] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[119] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[120] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[121] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[122] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[123] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[124] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[125] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[126] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[127] set_multicycle_path -hold 1 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.*.u_CoreRxIODBitAlign.cnt[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.*.u_CoreRxIODBitAlign.tap_cnt[*] }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":155:0:155:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.*.u_CoreRxIODBitAlign.cnt[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.cnt[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.cnt[1] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":155:0:155:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.*.u_CoreRxIODBitAlign.tap_cnt[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.tap_cnt[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.tap_cnt[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.tap_cnt[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.tap_cnt[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.tap_cnt[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.tap_cnt[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.tap_cnt[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.tap_cnt[7] set_multicycle_path -hold 1 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.*.u_CoreRxIODBitAlign.early_found_lsb_d }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":117:0:117:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[7] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":117:0:117:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.*.u_CoreRxIODBitAlign.early_found_lsb_d }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_found_lsb_d set_multicycle_path -hold 1 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.*.u_CoreRxIODBitAlign.early_found_msb_d }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":119:0:119:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[7] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":119:0:119:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.*.u_CoreRxIODBitAlign.early_found_msb_d }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_found_msb_d set_multicycle_path -hold 1 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.*.u_CoreRxIODBitAlign.early_not_found_lsb_d }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":121:0:121:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[7] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":121:0:121:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.*.u_CoreRxIODBitAlign.early_not_found_lsb_d }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_not_found_lsb_d set_multicycle_path -hold 1 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.*.u_CoreRxIODBitAlign.early_not_found_msb_d }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":123:0:123:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[7] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":123:0:123:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.*.u_CoreRxIODBitAlign.early_not_found_msb_d }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_not_found_msb_d set_multicycle_path -hold 1 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.*.u_CoreRxIODBitAlign.late_found_lsb_d }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":113:0:113:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[7] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":113:0:113:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.*.u_CoreRxIODBitAlign.late_found_lsb_d }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_found_lsb_d set_multicycle_path -hold 1 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.*.u_CoreRxIODBitAlign.late_found_msb_d }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":115:0:115:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[7] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":115:0:115:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.*.u_CoreRxIODBitAlign.late_found_msb_d }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_found_msb_d set_multicycle_path -hold 1 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.*.u_CoreRxIODBitAlign.late_not_found_lsb_d }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":125:0:125:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[7] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":125:0:125:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.*.u_CoreRxIODBitAlign.late_not_found_lsb_d }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_not_found_lsb_d set_multicycle_path -hold 1 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.*.u_CoreRxIODBitAlign.late_not_found_msb_d }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":127:0:127:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[7] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":127:0:127:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.*.u_CoreRxIODBitAlign.late_not_found_msb_d }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_not_found_msb_d set_multicycle_path -hold 1 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.*.u_CoreRxIODBitAlign.bitalign_curr_state[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.*.u_CoreRxIODBitAlign.early_flags_lsb[*] }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":221:0:221:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.*.u_CoreRxIODBitAlign.bitalign_curr_state[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.bitalign_curr_state[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.bitalign_curr_state[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.bitalign_curr_state[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.bitalign_curr_state[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.bitalign_curr_state[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.bitalign_curr_state[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.bitalign_curr_state[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.bitalign_curr_state[7] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.bitalign_curr_state[8] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.bitalign_curr_state[9] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.bitalign_curr_state[10] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.bitalign_curr_state[11] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.bitalign_curr_state[12] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.bitalign_curr_state[13] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.bitalign_curr_state[14] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.bitalign_curr_state[15] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.bitalign_curr_state[16] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.bitalign_curr_state[17] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.bitalign_curr_state[18] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.bitalign_curr_state[19] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.bitalign_curr_state[20] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.bitalign_curr_state[21] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.bitalign_curr_state[22] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.bitalign_curr_state[23] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.bitalign_curr_state[24] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.bitalign_curr_state[25] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.bitalign_curr_state[26] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.bitalign_curr_state[27] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.bitalign_curr_state[28] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.bitalign_curr_state[29] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":221:0:221:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.*.u_CoreRxIODBitAlign.early_flags_lsb[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[7] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[8] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[9] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[10] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[11] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[12] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[13] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[14] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[15] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[16] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[17] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[18] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[19] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[20] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[21] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[22] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[23] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[24] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[25] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[26] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[27] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[28] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[29] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[30] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[31] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[32] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[33] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[34] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[35] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[36] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[37] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[38] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[39] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[40] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[41] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[42] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[43] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[44] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[45] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[46] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[47] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[48] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[49] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[50] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[51] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[52] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[53] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[54] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[55] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[56] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[57] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[58] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[59] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[60] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[61] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[62] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[63] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[64] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[65] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[66] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[67] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[68] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[69] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[70] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[71] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[72] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[73] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[74] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[75] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[76] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[77] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[78] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[79] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[80] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[81] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[82] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[83] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[84] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[85] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[86] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[87] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[88] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[89] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[90] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[91] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[92] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[93] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[94] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[95] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[96] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[97] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[98] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[99] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[100] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[101] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[102] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[103] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[104] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[105] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[106] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[107] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[108] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[109] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[110] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[111] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[112] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[113] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[114] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[115] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[116] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[117] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[118] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[119] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[120] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[121] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[122] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[123] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[124] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[125] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[126] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[127] set_multicycle_path -hold 1 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.*.u_CoreRxIODBitAlign.bitalign_curr_state[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.*.u_CoreRxIODBitAlign.early_flags_msb[*] }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":223:0:223:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.*.u_CoreRxIODBitAlign.bitalign_curr_state[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.bitalign_curr_state[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.bitalign_curr_state[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.bitalign_curr_state[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.bitalign_curr_state[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.bitalign_curr_state[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.bitalign_curr_state[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.bitalign_curr_state[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.bitalign_curr_state[7] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.bitalign_curr_state[8] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.bitalign_curr_state[9] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.bitalign_curr_state[10] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.bitalign_curr_state[11] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.bitalign_curr_state[12] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.bitalign_curr_state[13] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.bitalign_curr_state[14] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.bitalign_curr_state[15] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.bitalign_curr_state[16] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.bitalign_curr_state[17] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.bitalign_curr_state[18] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.bitalign_curr_state[19] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.bitalign_curr_state[20] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.bitalign_curr_state[21] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.bitalign_curr_state[22] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.bitalign_curr_state[23] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.bitalign_curr_state[24] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.bitalign_curr_state[25] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.bitalign_curr_state[26] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.bitalign_curr_state[27] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.bitalign_curr_state[28] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.bitalign_curr_state[29] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":223:0:223:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.*.u_CoreRxIODBitAlign.early_flags_msb[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[7] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[8] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[9] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[10] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[11] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[12] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[13] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[14] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[15] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[16] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[17] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[18] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[19] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[20] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[21] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[22] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[23] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[24] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[25] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[26] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[27] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[28] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[29] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[30] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[31] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[32] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[33] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[34] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[35] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[36] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[37] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[38] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[39] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[40] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[41] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[42] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[43] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[44] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[45] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[46] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[47] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[48] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[49] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[50] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[51] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[52] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[53] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[54] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[55] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[56] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[57] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[58] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[59] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[60] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[61] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[62] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[63] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[64] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[65] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[66] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[67] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[68] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[69] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[70] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[71] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[72] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[73] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[74] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[75] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[76] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[77] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[78] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[79] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[80] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[81] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[82] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[83] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[84] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[85] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[86] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[87] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[88] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[89] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[90] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[91] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[92] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[93] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[94] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[95] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[96] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[97] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[98] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[99] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[100] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[101] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[102] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[103] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[104] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[105] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[106] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[107] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[108] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[109] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[110] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[111] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[112] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[113] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[114] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[115] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[116] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[117] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[118] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[119] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[120] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[121] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[122] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[123] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[124] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[125] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[126] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[127] set_multicycle_path -hold 1 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.*.u_CoreRxIODBitAlign.bitalign_curr_state[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.*.u_CoreRxIODBitAlign.late_flags_lsb[*] }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":217:0:217:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.*.u_CoreRxIODBitAlign.bitalign_curr_state[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.bitalign_curr_state[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.bitalign_curr_state[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.bitalign_curr_state[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.bitalign_curr_state[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.bitalign_curr_state[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.bitalign_curr_state[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.bitalign_curr_state[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.bitalign_curr_state[7] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.bitalign_curr_state[8] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.bitalign_curr_state[9] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.bitalign_curr_state[10] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.bitalign_curr_state[11] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.bitalign_curr_state[12] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.bitalign_curr_state[13] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.bitalign_curr_state[14] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.bitalign_curr_state[15] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.bitalign_curr_state[16] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.bitalign_curr_state[17] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.bitalign_curr_state[18] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.bitalign_curr_state[19] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.bitalign_curr_state[20] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.bitalign_curr_state[21] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.bitalign_curr_state[22] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.bitalign_curr_state[23] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.bitalign_curr_state[24] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.bitalign_curr_state[25] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.bitalign_curr_state[26] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.bitalign_curr_state[27] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.bitalign_curr_state[28] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.bitalign_curr_state[29] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":217:0:217:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.*.u_CoreRxIODBitAlign.late_flags_lsb[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[7] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[8] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[9] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[10] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[11] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[12] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[13] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[14] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[15] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[16] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[17] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[18] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[19] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[20] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[21] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[22] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[23] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[24] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[25] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[26] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[27] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[28] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[29] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[30] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[31] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[32] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[33] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[34] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[35] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[36] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[37] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[38] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[39] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[40] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[41] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[42] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[43] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[44] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[45] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[46] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[47] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[48] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[49] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[50] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[51] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[52] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[53] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[54] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[55] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[56] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[57] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[58] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[59] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[60] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[61] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[62] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[63] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[64] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[65] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[66] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[67] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[68] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[69] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[70] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[71] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[72] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[73] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[74] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[75] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[76] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[77] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[78] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[79] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[80] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[81] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[82] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[83] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[84] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[85] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[86] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[87] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[88] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[89] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[90] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[91] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[92] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[93] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[94] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[95] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[96] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[97] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[98] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[99] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[100] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[101] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[102] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[103] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[104] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[105] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[106] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[107] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[108] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[109] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[110] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[111] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[112] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[113] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[114] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[115] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[116] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[117] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[118] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[119] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[120] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[121] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[122] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[123] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[124] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[125] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[126] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[127] set_multicycle_path -hold 1 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.*.u_CoreRxIODBitAlign.bitalign_curr_state[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.*.u_CoreRxIODBitAlign.late_flags_msb[*] }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":219:0:219:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.*.u_CoreRxIODBitAlign.bitalign_curr_state[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.bitalign_curr_state[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.bitalign_curr_state[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.bitalign_curr_state[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.bitalign_curr_state[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.bitalign_curr_state[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.bitalign_curr_state[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.bitalign_curr_state[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.bitalign_curr_state[7] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.bitalign_curr_state[8] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.bitalign_curr_state[9] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.bitalign_curr_state[10] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.bitalign_curr_state[11] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.bitalign_curr_state[12] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.bitalign_curr_state[13] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.bitalign_curr_state[14] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.bitalign_curr_state[15] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.bitalign_curr_state[16] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.bitalign_curr_state[17] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.bitalign_curr_state[18] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.bitalign_curr_state[19] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.bitalign_curr_state[20] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.bitalign_curr_state[21] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.bitalign_curr_state[22] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.bitalign_curr_state[23] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.bitalign_curr_state[24] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.bitalign_curr_state[25] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.bitalign_curr_state[26] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.bitalign_curr_state[27] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.bitalign_curr_state[28] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.bitalign_curr_state[29] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":219:0:219:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.*.u_CoreRxIODBitAlign.late_flags_msb[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[7] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[8] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[9] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[10] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[11] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[12] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[13] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[14] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[15] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[16] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[17] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[18] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[19] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[20] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[21] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[22] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[23] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[24] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[25] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[26] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[27] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[28] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[29] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[30] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[31] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[32] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[33] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[34] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[35] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[36] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[37] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[38] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[39] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[40] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[41] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[42] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[43] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[44] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[45] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[46] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[47] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[48] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[49] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[50] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[51] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[52] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[53] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[54] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[55] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[56] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[57] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[58] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[59] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[60] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[61] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[62] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[63] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[64] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[65] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[66] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[67] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[68] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[69] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[70] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[71] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[72] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[73] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[74] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[75] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[76] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[77] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[78] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[79] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[80] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[81] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[82] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[83] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[84] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[85] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[86] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[87] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[88] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[89] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[90] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[91] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[92] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[93] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[94] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[95] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[96] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[97] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[98] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[99] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[100] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[101] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[102] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[103] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[104] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[105] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[106] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[107] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[108] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[109] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[110] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[111] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[112] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[113] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[114] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[115] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[116] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[117] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[118] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[119] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[120] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[121] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[122] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[123] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[124] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[125] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[126] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[127] set_multicycle_path -hold 1 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.*.u_CoreRxIODBitAlign.cnt[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.*.u_CoreRxIODBitAlign.early_flags_lsb[*] }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":229:0:229:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.*.u_CoreRxIODBitAlign.cnt[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.cnt[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.cnt[1] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":229:0:229:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.*.u_CoreRxIODBitAlign.early_flags_lsb[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[7] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[8] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[9] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[10] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[11] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[12] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[13] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[14] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[15] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[16] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[17] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[18] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[19] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[20] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[21] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[22] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[23] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[24] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[25] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[26] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[27] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[28] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[29] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[30] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[31] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[32] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[33] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[34] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[35] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[36] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[37] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[38] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[39] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[40] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[41] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[42] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[43] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[44] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[45] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[46] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[47] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[48] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[49] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[50] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[51] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[52] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[53] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[54] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[55] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[56] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[57] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[58] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[59] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[60] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[61] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[62] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[63] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[64] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[65] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[66] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[67] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[68] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[69] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[70] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[71] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[72] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[73] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[74] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[75] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[76] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[77] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[78] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[79] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[80] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[81] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[82] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[83] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[84] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[85] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[86] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[87] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[88] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[89] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[90] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[91] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[92] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[93] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[94] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[95] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[96] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[97] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[98] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[99] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[100] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[101] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[102] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[103] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[104] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[105] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[106] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[107] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[108] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[109] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[110] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[111] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[112] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[113] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[114] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[115] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[116] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[117] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[118] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[119] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[120] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[121] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[122] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[123] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[124] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[125] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[126] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[127] set_multicycle_path -hold 1 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.*.u_CoreRxIODBitAlign.cnt[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.*.u_CoreRxIODBitAlign.early_flags_msb[*] }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":231:0:231:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.*.u_CoreRxIODBitAlign.cnt[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.cnt[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.cnt[1] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":231:0:231:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.*.u_CoreRxIODBitAlign.early_flags_msb[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[7] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[8] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[9] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[10] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[11] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[12] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[13] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[14] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[15] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[16] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[17] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[18] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[19] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[20] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[21] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[22] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[23] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[24] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[25] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[26] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[27] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[28] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[29] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[30] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[31] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[32] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[33] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[34] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[35] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[36] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[37] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[38] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[39] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[40] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[41] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[42] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[43] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[44] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[45] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[46] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[47] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[48] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[49] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[50] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[51] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[52] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[53] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[54] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[55] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[56] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[57] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[58] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[59] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[60] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[61] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[62] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[63] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[64] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[65] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[66] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[67] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[68] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[69] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[70] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[71] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[72] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[73] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[74] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[75] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[76] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[77] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[78] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[79] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[80] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[81] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[82] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[83] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[84] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[85] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[86] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[87] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[88] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[89] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[90] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[91] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[92] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[93] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[94] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[95] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[96] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[97] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[98] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[99] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[100] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[101] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[102] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[103] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[104] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[105] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[106] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[107] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[108] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[109] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[110] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[111] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[112] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[113] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[114] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[115] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[116] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[117] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[118] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[119] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[120] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[121] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[122] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[123] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[124] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[125] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[126] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[127] set_multicycle_path -hold 1 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.*.u_CoreRxIODBitAlign.cnt[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.*.u_CoreRxIODBitAlign.late_flags_lsb[*] }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":225:0:225:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.*.u_CoreRxIODBitAlign.cnt[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.cnt[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.cnt[1] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":225:0:225:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.*.u_CoreRxIODBitAlign.late_flags_lsb[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[7] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[8] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[9] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[10] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[11] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[12] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[13] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[14] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[15] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[16] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[17] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[18] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[19] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[20] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[21] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[22] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[23] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[24] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[25] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[26] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[27] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[28] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[29] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[30] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[31] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[32] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[33] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[34] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[35] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[36] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[37] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[38] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[39] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[40] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[41] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[42] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[43] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[44] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[45] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[46] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[47] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[48] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[49] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[50] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[51] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[52] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[53] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[54] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[55] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[56] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[57] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[58] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[59] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[60] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[61] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[62] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[63] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[64] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[65] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[66] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[67] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[68] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[69] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[70] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[71] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[72] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[73] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[74] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[75] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[76] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[77] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[78] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[79] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[80] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[81] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[82] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[83] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[84] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[85] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[86] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[87] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[88] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[89] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[90] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[91] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[92] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[93] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[94] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[95] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[96] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[97] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[98] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[99] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[100] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[101] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[102] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[103] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[104] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[105] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[106] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[107] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[108] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[109] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[110] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[111] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[112] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[113] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[114] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[115] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[116] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[117] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[118] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[119] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[120] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[121] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[122] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[123] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[124] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[125] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[126] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[127] set_multicycle_path -hold 1 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.*.u_CoreRxIODBitAlign.cnt[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.*.u_CoreRxIODBitAlign.late_flags_msb[*] }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":227:0:227:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.*.u_CoreRxIODBitAlign.cnt[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.cnt[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.cnt[1] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":227:0:227:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.*.u_CoreRxIODBitAlign.late_flags_msb[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[7] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[8] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[9] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[10] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[11] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[12] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[13] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[14] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[15] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[16] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[17] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[18] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[19] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[20] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[21] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[22] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[23] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[24] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[25] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[26] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[27] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[28] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[29] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[30] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[31] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[32] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[33] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[34] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[35] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[36] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[37] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[38] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[39] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[40] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[41] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[42] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[43] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[44] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[45] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[46] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[47] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[48] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[49] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[50] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[51] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[52] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[53] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[54] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[55] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[56] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[57] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[58] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[59] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[60] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[61] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[62] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[63] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[64] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[65] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[66] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[67] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[68] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[69] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[70] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[71] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[72] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[73] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[74] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[75] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[76] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[77] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[78] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[79] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[80] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[81] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[82] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[83] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[84] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[85] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[86] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[87] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[88] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[89] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[90] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[91] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[92] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[93] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[94] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[95] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[96] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[97] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[98] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[99] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[100] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[101] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[102] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[103] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[104] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[105] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[106] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[107] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[108] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[109] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[110] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[111] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[112] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[113] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[114] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[115] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[116] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[117] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[118] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[119] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[120] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[121] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[122] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[123] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[124] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[125] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[126] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[127] set_multicycle_path -hold 1 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.*.u_CoreRxIODBitAlign.cnt[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.*.u_CoreRxIODBitAlign.tap_cnt[*] }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":215:0:215:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.*.u_CoreRxIODBitAlign.cnt[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.cnt[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.cnt[1] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":215:0:215:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.*.u_CoreRxIODBitAlign.tap_cnt[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.tap_cnt[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.tap_cnt[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.tap_cnt[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.tap_cnt[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.tap_cnt[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.tap_cnt[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.tap_cnt[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.tap_cnt[7] set_multicycle_path -hold 1 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.*.u_CoreRxIODBitAlign.early_found_lsb_d }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":177:0:177:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[7] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":177:0:177:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.*.u_CoreRxIODBitAlign.early_found_lsb_d }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_found_lsb_d set_multicycle_path -hold 1 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.*.u_CoreRxIODBitAlign.early_found_msb_d }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":179:0:179:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[7] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":179:0:179:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.*.u_CoreRxIODBitAlign.early_found_msb_d }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_found_msb_d set_multicycle_path -hold 1 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.*.u_CoreRxIODBitAlign.early_not_found_lsb_d }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":181:0:181:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[7] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":181:0:181:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.*.u_CoreRxIODBitAlign.early_not_found_lsb_d }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_not_found_lsb_d set_multicycle_path -hold 1 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.*.u_CoreRxIODBitAlign.early_not_found_msb_d }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":183:0:183:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[7] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":183:0:183:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.*.u_CoreRxIODBitAlign.early_not_found_msb_d }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_not_found_msb_d set_multicycle_path -hold 1 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.*.u_CoreRxIODBitAlign.late_found_lsb_d }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":173:0:173:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[7] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":173:0:173:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.*.u_CoreRxIODBitAlign.late_found_lsb_d }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_found_lsb_d set_multicycle_path -hold 1 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.*.u_CoreRxIODBitAlign.late_found_msb_d }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":175:0:175:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[7] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":175:0:175:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.*.u_CoreRxIODBitAlign.late_found_msb_d }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_found_msb_d set_multicycle_path -hold 1 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.*.u_CoreRxIODBitAlign.late_not_found_lsb_d }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":185:0:185:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[7] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":185:0:185:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.*.u_CoreRxIODBitAlign.late_not_found_lsb_d }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_not_found_lsb_d set_multicycle_path -hold 1 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.*.u_CoreRxIODBitAlign.late_not_found_msb_d }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":187:0:187:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[7] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":187:0:187:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.*.u_CoreRxIODBitAlign.late_not_found_msb_d }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_not_found_msb_d set_multicycle_path -hold 1 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.*.u_CoreRxIODBitAlign.bitalign_curr_state[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.*.u_CoreRxIODBitAlign.early_flags_lsb[*] }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":281:0:281:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.*.u_CoreRxIODBitAlign.bitalign_curr_state[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.bitalign_curr_state[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.bitalign_curr_state[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.bitalign_curr_state[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.bitalign_curr_state[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.bitalign_curr_state[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.bitalign_curr_state[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.bitalign_curr_state[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.bitalign_curr_state[7] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.bitalign_curr_state[8] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.bitalign_curr_state[9] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.bitalign_curr_state[10] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.bitalign_curr_state[11] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.bitalign_curr_state[12] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.bitalign_curr_state[13] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.bitalign_curr_state[14] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.bitalign_curr_state[15] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.bitalign_curr_state[16] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.bitalign_curr_state[17] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.bitalign_curr_state[18] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.bitalign_curr_state[19] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.bitalign_curr_state[20] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.bitalign_curr_state[21] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.bitalign_curr_state[22] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.bitalign_curr_state[23] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.bitalign_curr_state[24] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.bitalign_curr_state[25] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.bitalign_curr_state[26] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.bitalign_curr_state[27] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.bitalign_curr_state[28] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.bitalign_curr_state[29] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":281:0:281:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.*.u_CoreRxIODBitAlign.early_flags_lsb[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[7] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[8] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[9] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[10] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[11] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[12] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[13] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[14] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[15] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[16] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[17] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[18] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[19] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[20] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[21] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[22] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[23] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[24] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[25] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[26] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[27] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[28] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[29] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[30] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[31] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[32] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[33] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[34] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[35] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[36] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[37] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[38] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[39] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[40] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[41] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[42] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[43] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[44] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[45] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[46] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[47] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[48] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[49] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[50] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[51] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[52] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[53] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[54] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[55] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[56] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[57] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[58] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[59] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[60] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[61] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[62] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[63] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[64] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[65] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[66] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[67] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[68] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[69] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[70] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[71] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[72] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[73] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[74] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[75] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[76] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[77] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[78] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[79] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[80] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[81] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[82] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[83] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[84] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[85] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[86] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[87] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[88] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[89] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[90] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[91] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[92] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[93] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[94] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[95] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[96] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[97] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[98] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[99] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[100] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[101] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[102] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[103] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[104] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[105] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[106] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[107] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[108] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[109] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[110] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[111] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[112] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[113] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[114] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[115] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[116] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[117] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[118] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[119] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[120] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[121] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[122] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[123] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[124] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[125] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[126] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[127] set_multicycle_path -hold 1 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.*.u_CoreRxIODBitAlign.bitalign_curr_state[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.*.u_CoreRxIODBitAlign.early_flags_msb[*] }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":283:0:283:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.*.u_CoreRxIODBitAlign.bitalign_curr_state[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.bitalign_curr_state[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.bitalign_curr_state[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.bitalign_curr_state[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.bitalign_curr_state[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.bitalign_curr_state[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.bitalign_curr_state[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.bitalign_curr_state[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.bitalign_curr_state[7] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.bitalign_curr_state[8] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.bitalign_curr_state[9] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.bitalign_curr_state[10] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.bitalign_curr_state[11] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.bitalign_curr_state[12] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.bitalign_curr_state[13] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.bitalign_curr_state[14] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.bitalign_curr_state[15] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.bitalign_curr_state[16] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.bitalign_curr_state[17] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.bitalign_curr_state[18] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.bitalign_curr_state[19] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.bitalign_curr_state[20] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.bitalign_curr_state[21] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.bitalign_curr_state[22] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.bitalign_curr_state[23] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.bitalign_curr_state[24] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.bitalign_curr_state[25] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.bitalign_curr_state[26] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.bitalign_curr_state[27] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.bitalign_curr_state[28] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.bitalign_curr_state[29] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":283:0:283:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.*.u_CoreRxIODBitAlign.early_flags_msb[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[7] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[8] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[9] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[10] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[11] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[12] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[13] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[14] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[15] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[16] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[17] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[18] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[19] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[20] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[21] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[22] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[23] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[24] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[25] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[26] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[27] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[28] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[29] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[30] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[31] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[32] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[33] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[34] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[35] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[36] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[37] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[38] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[39] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[40] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[41] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[42] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[43] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[44] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[45] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[46] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[47] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[48] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[49] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[50] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[51] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[52] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[53] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[54] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[55] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[56] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[57] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[58] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[59] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[60] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[61] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[62] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[63] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[64] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[65] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[66] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[67] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[68] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[69] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[70] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[71] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[72] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[73] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[74] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[75] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[76] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[77] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[78] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[79] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[80] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[81] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[82] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[83] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[84] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[85] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[86] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[87] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[88] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[89] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[90] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[91] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[92] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[93] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[94] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[95] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[96] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[97] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[98] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[99] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[100] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[101] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[102] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[103] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[104] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[105] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[106] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[107] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[108] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[109] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[110] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[111] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[112] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[113] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[114] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[115] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[116] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[117] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[118] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[119] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[120] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[121] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[122] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[123] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[124] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[125] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[126] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[127] set_multicycle_path -hold 1 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.*.u_CoreRxIODBitAlign.bitalign_curr_state[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.*.u_CoreRxIODBitAlign.late_flags_lsb[*] }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":277:0:277:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.*.u_CoreRxIODBitAlign.bitalign_curr_state[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.bitalign_curr_state[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.bitalign_curr_state[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.bitalign_curr_state[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.bitalign_curr_state[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.bitalign_curr_state[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.bitalign_curr_state[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.bitalign_curr_state[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.bitalign_curr_state[7] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.bitalign_curr_state[8] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.bitalign_curr_state[9] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.bitalign_curr_state[10] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.bitalign_curr_state[11] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.bitalign_curr_state[12] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.bitalign_curr_state[13] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.bitalign_curr_state[14] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.bitalign_curr_state[15] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.bitalign_curr_state[16] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.bitalign_curr_state[17] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.bitalign_curr_state[18] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.bitalign_curr_state[19] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.bitalign_curr_state[20] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.bitalign_curr_state[21] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.bitalign_curr_state[22] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.bitalign_curr_state[23] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.bitalign_curr_state[24] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.bitalign_curr_state[25] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.bitalign_curr_state[26] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.bitalign_curr_state[27] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.bitalign_curr_state[28] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.bitalign_curr_state[29] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":277:0:277:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.*.u_CoreRxIODBitAlign.late_flags_lsb[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[7] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[8] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[9] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[10] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[11] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[12] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[13] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[14] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[15] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[16] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[17] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[18] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[19] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[20] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[21] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[22] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[23] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[24] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[25] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[26] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[27] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[28] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[29] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[30] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[31] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[32] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[33] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[34] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[35] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[36] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[37] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[38] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[39] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[40] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[41] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[42] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[43] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[44] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[45] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[46] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[47] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[48] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[49] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[50] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[51] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[52] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[53] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[54] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[55] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[56] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[57] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[58] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[59] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[60] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[61] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[62] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[63] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[64] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[65] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[66] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[67] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[68] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[69] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[70] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[71] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[72] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[73] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[74] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[75] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[76] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[77] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[78] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[79] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[80] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[81] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[82] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[83] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[84] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[85] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[86] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[87] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[88] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[89] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[90] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[91] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[92] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[93] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[94] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[95] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[96] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[97] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[98] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[99] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[100] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[101] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[102] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[103] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[104] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[105] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[106] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[107] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[108] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[109] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[110] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[111] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[112] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[113] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[114] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[115] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[116] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[117] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[118] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[119] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[120] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[121] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[122] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[123] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[124] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[125] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[126] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[127] set_multicycle_path -hold 1 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.*.u_CoreRxIODBitAlign.bitalign_curr_state[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.*.u_CoreRxIODBitAlign.late_flags_msb[*] }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":279:0:279:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.*.u_CoreRxIODBitAlign.bitalign_curr_state[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.bitalign_curr_state[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.bitalign_curr_state[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.bitalign_curr_state[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.bitalign_curr_state[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.bitalign_curr_state[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.bitalign_curr_state[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.bitalign_curr_state[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.bitalign_curr_state[7] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.bitalign_curr_state[8] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.bitalign_curr_state[9] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.bitalign_curr_state[10] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.bitalign_curr_state[11] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.bitalign_curr_state[12] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.bitalign_curr_state[13] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.bitalign_curr_state[14] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.bitalign_curr_state[15] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.bitalign_curr_state[16] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.bitalign_curr_state[17] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.bitalign_curr_state[18] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.bitalign_curr_state[19] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.bitalign_curr_state[20] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.bitalign_curr_state[21] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.bitalign_curr_state[22] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.bitalign_curr_state[23] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.bitalign_curr_state[24] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.bitalign_curr_state[25] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.bitalign_curr_state[26] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.bitalign_curr_state[27] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.bitalign_curr_state[28] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.bitalign_curr_state[29] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":279:0:279:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.*.u_CoreRxIODBitAlign.late_flags_msb[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[7] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[8] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[9] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[10] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[11] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[12] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[13] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[14] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[15] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[16] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[17] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[18] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[19] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[20] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[21] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[22] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[23] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[24] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[25] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[26] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[27] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[28] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[29] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[30] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[31] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[32] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[33] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[34] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[35] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[36] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[37] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[38] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[39] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[40] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[41] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[42] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[43] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[44] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[45] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[46] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[47] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[48] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[49] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[50] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[51] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[52] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[53] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[54] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[55] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[56] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[57] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[58] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[59] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[60] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[61] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[62] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[63] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[64] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[65] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[66] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[67] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[68] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[69] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[70] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[71] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[72] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[73] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[74] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[75] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[76] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[77] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[78] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[79] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[80] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[81] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[82] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[83] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[84] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[85] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[86] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[87] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[88] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[89] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[90] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[91] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[92] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[93] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[94] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[95] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[96] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[97] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[98] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[99] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[100] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[101] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[102] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[103] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[104] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[105] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[106] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[107] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[108] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[109] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[110] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[111] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[112] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[113] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[114] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[115] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[116] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[117] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[118] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[119] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[120] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[121] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[122] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[123] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[124] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[125] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[126] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[127] set_multicycle_path -hold 1 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.*.u_CoreRxIODBitAlign.cnt[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.*.u_CoreRxIODBitAlign.early_flags_lsb[*] }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":289:0:289:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.*.u_CoreRxIODBitAlign.cnt[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.cnt[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.cnt[1] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":289:0:289:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.*.u_CoreRxIODBitAlign.early_flags_lsb[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[7] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[8] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[9] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[10] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[11] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[12] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[13] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[14] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[15] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[16] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[17] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[18] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[19] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[20] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[21] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[22] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[23] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[24] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[25] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[26] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[27] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[28] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[29] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[30] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[31] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[32] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[33] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[34] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[35] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[36] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[37] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[38] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[39] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[40] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[41] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[42] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[43] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[44] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[45] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[46] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[47] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[48] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[49] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[50] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[51] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[52] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[53] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[54] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[55] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[56] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[57] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[58] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[59] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[60] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[61] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[62] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[63] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[64] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[65] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[66] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[67] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[68] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[69] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[70] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[71] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[72] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[73] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[74] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[75] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[76] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[77] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[78] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[79] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[80] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[81] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[82] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[83] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[84] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[85] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[86] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[87] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[88] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[89] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[90] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[91] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[92] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[93] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[94] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[95] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[96] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[97] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[98] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[99] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[100] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[101] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[102] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[103] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[104] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[105] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[106] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[107] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[108] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[109] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[110] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[111] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[112] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[113] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[114] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[115] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[116] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[117] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[118] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[119] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[120] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[121] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[122] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[123] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[124] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[125] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[126] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[127] set_multicycle_path -hold 1 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.*.u_CoreRxIODBitAlign.cnt[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.*.u_CoreRxIODBitAlign.early_flags_msb[*] }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":291:0:291:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.*.u_CoreRxIODBitAlign.cnt[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.cnt[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.cnt[1] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":291:0:291:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.*.u_CoreRxIODBitAlign.early_flags_msb[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[7] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[8] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[9] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[10] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[11] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[12] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[13] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[14] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[15] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[16] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[17] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[18] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[19] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[20] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[21] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[22] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[23] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[24] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[25] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[26] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[27] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[28] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[29] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[30] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[31] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[32] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[33] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[34] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[35] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[36] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[37] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[38] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[39] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[40] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[41] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[42] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[43] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[44] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[45] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[46] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[47] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[48] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[49] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[50] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[51] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[52] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[53] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[54] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[55] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[56] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[57] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[58] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[59] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[60] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[61] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[62] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[63] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[64] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[65] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[66] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[67] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[68] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[69] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[70] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[71] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[72] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[73] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[74] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[75] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[76] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[77] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[78] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[79] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[80] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[81] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[82] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[83] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[84] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[85] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[86] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[87] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[88] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[89] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[90] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[91] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[92] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[93] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[94] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[95] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[96] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[97] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[98] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[99] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[100] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[101] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[102] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[103] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[104] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[105] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[106] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[107] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[108] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[109] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[110] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[111] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[112] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[113] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[114] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[115] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[116] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[117] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[118] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[119] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[120] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[121] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[122] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[123] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[124] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[125] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[126] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[127] set_multicycle_path -hold 1 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.*.u_CoreRxIODBitAlign.cnt[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.*.u_CoreRxIODBitAlign.late_flags_lsb[*] }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":285:0:285:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.*.u_CoreRxIODBitAlign.cnt[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.cnt[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.cnt[1] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":285:0:285:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.*.u_CoreRxIODBitAlign.late_flags_lsb[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[7] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[8] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[9] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[10] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[11] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[12] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[13] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[14] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[15] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[16] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[17] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[18] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[19] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[20] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[21] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[22] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[23] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[24] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[25] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[26] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[27] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[28] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[29] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[30] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[31] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[32] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[33] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[34] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[35] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[36] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[37] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[38] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[39] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[40] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[41] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[42] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[43] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[44] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[45] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[46] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[47] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[48] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[49] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[50] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[51] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[52] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[53] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[54] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[55] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[56] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[57] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[58] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[59] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[60] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[61] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[62] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[63] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[64] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[65] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[66] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[67] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[68] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[69] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[70] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[71] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[72] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[73] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[74] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[75] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[76] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[77] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[78] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[79] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[80] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[81] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[82] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[83] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[84] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[85] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[86] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[87] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[88] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[89] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[90] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[91] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[92] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[93] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[94] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[95] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[96] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[97] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[98] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[99] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[100] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[101] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[102] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[103] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[104] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[105] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[106] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[107] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[108] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[109] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[110] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[111] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[112] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[113] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[114] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[115] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[116] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[117] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[118] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[119] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[120] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[121] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[122] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[123] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[124] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[125] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[126] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[127] set_multicycle_path -hold 1 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.*.u_CoreRxIODBitAlign.cnt[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.*.u_CoreRxIODBitAlign.late_flags_msb[*] }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":287:0:287:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.*.u_CoreRxIODBitAlign.cnt[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.cnt[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.cnt[1] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":287:0:287:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.*.u_CoreRxIODBitAlign.late_flags_msb[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[7] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[8] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[9] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[10] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[11] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[12] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[13] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[14] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[15] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[16] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[17] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[18] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[19] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[20] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[21] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[22] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[23] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[24] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[25] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[26] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[27] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[28] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[29] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[30] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[31] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[32] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[33] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[34] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[35] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[36] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[37] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[38] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[39] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[40] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[41] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[42] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[43] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[44] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[45] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[46] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[47] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[48] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[49] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[50] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[51] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[52] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[53] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[54] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[55] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[56] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[57] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[58] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[59] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[60] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[61] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[62] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[63] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[64] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[65] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[66] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[67] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[68] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[69] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[70] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[71] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[72] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[73] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[74] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[75] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[76] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[77] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[78] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[79] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[80] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[81] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[82] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[83] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[84] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[85] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[86] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[87] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[88] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[89] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[90] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[91] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[92] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[93] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[94] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[95] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[96] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[97] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[98] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[99] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[100] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[101] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[102] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[103] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[104] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[105] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[106] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[107] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[108] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[109] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[110] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[111] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[112] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[113] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[114] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[115] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[116] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[117] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[118] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[119] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[120] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[121] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[122] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[123] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[124] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[125] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[126] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[127] set_multicycle_path -hold 1 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.*.u_CoreRxIODBitAlign.cnt[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.*.u_CoreRxIODBitAlign.tap_cnt[*] }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":275:0:275:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.*.u_CoreRxIODBitAlign.cnt[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.cnt[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.cnt[1] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":275:0:275:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.*.u_CoreRxIODBitAlign.tap_cnt[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.tap_cnt[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.tap_cnt[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.tap_cnt[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.tap_cnt[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.tap_cnt[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.tap_cnt[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.tap_cnt[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.tap_cnt[7] set_multicycle_path -hold 1 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.*.u_CoreRxIODBitAlign.early_found_lsb_d }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":237:0:237:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[7] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":237:0:237:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.*.u_CoreRxIODBitAlign.early_found_lsb_d }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_found_lsb_d set_multicycle_path -hold 1 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.*.u_CoreRxIODBitAlign.early_found_msb_d }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":239:0:239:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[7] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":239:0:239:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.*.u_CoreRxIODBitAlign.early_found_msb_d }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_found_msb_d set_multicycle_path -hold 1 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.*.u_CoreRxIODBitAlign.early_not_found_lsb_d }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":241:0:241:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[7] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":241:0:241:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.*.u_CoreRxIODBitAlign.early_not_found_lsb_d }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_not_found_lsb_d set_multicycle_path -hold 1 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.*.u_CoreRxIODBitAlign.early_not_found_msb_d }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":243:0:243:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[7] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":243:0:243:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.*.u_CoreRxIODBitAlign.early_not_found_msb_d }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_not_found_msb_d set_multicycle_path -hold 1 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.*.u_CoreRxIODBitAlign.late_found_lsb_d }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":233:0:233:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[7] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":233:0:233:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.*.u_CoreRxIODBitAlign.late_found_lsb_d }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_found_lsb_d set_multicycle_path -hold 1 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.*.u_CoreRxIODBitAlign.late_found_msb_d }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":235:0:235:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[7] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":235:0:235:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.*.u_CoreRxIODBitAlign.late_found_msb_d }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_found_msb_d set_multicycle_path -hold 1 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.*.u_CoreRxIODBitAlign.late_not_found_lsb_d }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":245:0:245:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[7] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":245:0:245:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.*.u_CoreRxIODBitAlign.late_not_found_lsb_d }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_not_found_lsb_d set_multicycle_path -hold 1 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.*.u_CoreRxIODBitAlign.late_not_found_msb_d }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":247:0:247:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[7] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":247:0:247:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.*.u_CoreRxIODBitAlign.late_not_found_msb_d }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_not_found_msb_d set_multicycle_path -hold 1 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.RX_CLK_ALIGN_CLR_FLGS }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":381:0:381:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[5] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":381:0:381:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.RX_CLK_ALIGN_CLR_FLGS }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.RX_CLK_ALIGN_CLR_FLGS set_multicycle_path -hold 1 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.RX_CLK_ALIGN_LOAD }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":377:0:377:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[5] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":377:0:377:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.RX_CLK_ALIGN_LOAD }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.RX_CLK_ALIGN_LOAD set_multicycle_path -hold 1 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.RX_CLK_ALIGN_MOVE }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":375:0:375:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[5] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":375:0:375:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.RX_CLK_ALIGN_MOVE }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.RX_CLK_ALIGN_MOVE set_multicycle_path -hold 1 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.RX_RESET_LANE }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":379:0:379:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[5] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":379:0:379:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.RX_RESET_LANE }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.RX_RESET_LANE set_multicycle_path -hold 1 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.calc_done }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":385:0:385:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[5] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":385:0:385:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.calc_done }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.calc_done set_multicycle_path -hold 1 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.clk_align_done }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":389:0:389:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[5] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":389:0:389:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.clk_align_done }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clk_align_done set_multicycle_path -hold 1 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.early_flags_lsb[*] }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":325:0:325:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[5] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":325:0:325:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.early_flags_lsb[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[7] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[8] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[9] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[10] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[11] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[12] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[13] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[14] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[15] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[16] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[17] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[18] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[19] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[20] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[21] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[22] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[23] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[24] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[25] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[26] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[27] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[28] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[29] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[30] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[31] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[32] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[33] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[34] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[35] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[36] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[37] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[38] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[39] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[40] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[41] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[42] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[43] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[44] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[45] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[46] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[47] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[48] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[49] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[50] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[51] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[52] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[53] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[54] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[55] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[56] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[57] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[58] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[59] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[60] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[61] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[62] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[63] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[64] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[65] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[66] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[67] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[68] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[69] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[70] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[71] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[72] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[73] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[74] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[75] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[76] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[77] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[78] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[79] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[80] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[81] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[82] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[83] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[84] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[85] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[86] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[87] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[88] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[89] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[90] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[91] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[92] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[93] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[94] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[95] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[96] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[97] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[98] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[99] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[100] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[101] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[102] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[103] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[104] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[105] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[106] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[107] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[108] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[109] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[110] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[111] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[112] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[113] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[114] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[115] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[116] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[117] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[118] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[119] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[120] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[121] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[122] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[123] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[124] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[125] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[126] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[127] set_multicycle_path -hold 1 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.early_flags_msb[*] }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":327:0:327:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[5] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":327:0:327:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.early_flags_msb[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[7] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[8] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[9] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[10] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[11] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[12] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[13] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[14] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[15] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[16] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[17] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[18] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[19] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[20] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[21] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[22] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[23] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[24] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[25] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[26] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[27] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[28] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[29] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[30] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[31] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[32] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[33] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[34] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[35] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[36] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[37] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[38] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[39] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[40] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[41] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[42] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[43] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[44] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[45] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[46] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[47] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[48] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[49] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[50] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[51] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[52] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[53] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[54] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[55] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[56] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[57] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[58] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[59] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[60] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[61] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[62] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[63] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[64] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[65] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[66] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[67] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[68] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[69] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[70] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[71] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[72] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[73] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[74] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[75] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[76] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[77] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[78] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[79] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[80] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[81] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[82] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[83] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[84] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[85] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[86] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[87] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[88] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[89] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[90] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[91] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[92] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[93] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[94] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[95] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[96] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[97] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[98] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[99] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[100] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[101] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[102] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[103] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[104] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[105] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[106] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[107] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[108] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[109] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[110] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[111] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[112] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[113] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[114] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[115] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[116] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[117] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[118] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[119] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[120] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[121] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[122] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[123] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[124] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[125] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[126] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[127] set_multicycle_path -hold 1 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.early_late_end_set }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":355:0:355:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[5] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":355:0:355:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.early_late_end_set }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_late_end_set set_multicycle_path -hold 1 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.early_late_end_val[*] }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":347:0:347:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[5] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":347:0:347:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.early_late_end_val[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_late_end_val[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_late_end_val[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_late_end_val[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_late_end_val[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_late_end_val[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_late_end_val[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_late_end_val[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_late_end_val[7] set_multicycle_path -hold 1 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.early_late_init_set }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":349:0:349:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[5] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":349:0:349:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.early_late_init_set }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_late_init_set set_multicycle_path -hold 1 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.early_late_init_val[*] }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":341:0:341:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[5] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":341:0:341:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.early_late_init_val[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_late_init_val[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_late_init_val[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_late_init_val[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_late_init_val[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_late_init_val[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_late_init_val[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_late_init_val[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_late_init_val[7] set_multicycle_path -hold 1 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.early_late_nxt_set }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":351:0:351:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[5] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":351:0:351:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.early_late_nxt_set }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_late_nxt_set set_multicycle_path -hold 1 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.early_late_nxt_val[*] }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":343:0:343:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[5] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":343:0:343:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.early_late_nxt_val[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_late_nxt_val[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_late_nxt_val[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_late_nxt_val[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_late_nxt_val[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_late_nxt_val[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_late_nxt_val[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_late_nxt_val[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_late_nxt_val[7] set_multicycle_path -hold 1 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.early_late_start_set }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":353:0:353:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[5] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":353:0:353:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.early_late_start_set }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_late_start_set set_multicycle_path -hold 1 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.early_late_start_val[*] }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":345:0:345:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[5] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":345:0:345:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.early_late_start_val[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_late_start_val[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_late_start_val[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_late_start_val[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_late_start_val[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_late_start_val[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_late_start_val[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_late_start_val[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_late_start_val[7] set_multicycle_path -hold 1 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.emflag_cnt[*] }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":371:0:371:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[5] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":371:0:371:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.emflag_cnt[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.emflag_cnt[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.emflag_cnt[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.emflag_cnt[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.emflag_cnt[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.emflag_cnt[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.emflag_cnt[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.emflag_cnt[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.emflag_cnt[7] set_multicycle_path -hold 1 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.late_flags_lsb[*] }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":329:0:329:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[5] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":329:0:329:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.late_flags_lsb[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[7] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[8] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[9] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[10] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[11] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[12] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[13] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[14] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[15] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[16] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[17] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[18] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[19] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[20] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[21] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[22] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[23] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[24] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[25] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[26] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[27] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[28] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[29] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[30] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[31] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[32] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[33] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[34] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[35] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[36] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[37] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[38] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[39] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[40] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[41] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[42] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[43] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[44] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[45] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[46] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[47] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[48] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[49] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[50] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[51] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[52] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[53] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[54] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[55] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[56] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[57] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[58] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[59] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[60] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[61] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[62] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[63] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[64] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[65] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[66] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[67] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[68] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[69] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[70] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[71] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[72] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[73] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[74] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[75] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[76] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[77] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[78] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[79] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[80] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[81] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[82] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[83] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[84] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[85] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[86] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[87] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[88] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[89] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[90] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[91] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[92] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[93] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[94] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[95] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[96] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[97] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[98] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[99] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[100] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[101] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[102] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[103] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[104] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[105] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[106] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[107] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[108] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[109] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[110] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[111] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[112] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[113] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[114] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[115] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[116] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[117] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[118] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[119] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[120] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[121] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[122] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[123] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[124] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[125] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[126] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[127] set_multicycle_path -hold 1 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.late_flags_msb[*] }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":331:0:331:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[5] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":331:0:331:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.late_flags_msb[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[7] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[8] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[9] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[10] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[11] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[12] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[13] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[14] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[15] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[16] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[17] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[18] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[19] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[20] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[21] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[22] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[23] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[24] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[25] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[26] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[27] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[28] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[29] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[30] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[31] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[32] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[33] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[34] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[35] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[36] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[37] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[38] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[39] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[40] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[41] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[42] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[43] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[44] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[45] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[46] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[47] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[48] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[49] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[50] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[51] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[52] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[53] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[54] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[55] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[56] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[57] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[58] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[59] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[60] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[61] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[62] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[63] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[64] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[65] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[66] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[67] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[68] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[69] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[70] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[71] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[72] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[73] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[74] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[75] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[76] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[77] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[78] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[79] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[80] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[81] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[82] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[83] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[84] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[85] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[86] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[87] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[88] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[89] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[90] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[91] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[92] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[93] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[94] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[95] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[96] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[97] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[98] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[99] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[100] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[101] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[102] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[103] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[104] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[105] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[106] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[107] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[108] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[109] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[110] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[111] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[112] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[113] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[114] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[115] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[116] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[117] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[118] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[119] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[120] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[121] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[122] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[123] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[124] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[125] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[126] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[127] set_multicycle_path -hold 1 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.rx_err }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":387:0:387:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[5] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":387:0:387:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.rx_err }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.rx_err set_multicycle_path -hold 1 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.rx_trng_done }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":383:0:383:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[5] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":383:0:383:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.rx_trng_done }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.rx_trng_done set_multicycle_path -hold 1 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.tap_cnt[*] }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":369:0:369:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[5] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":369:0:369:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.tap_cnt[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.tap_cnt[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.tap_cnt[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.tap_cnt[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.tap_cnt[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.tap_cnt[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.tap_cnt[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.tap_cnt[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.tap_cnt[7] set_multicycle_path -hold 1 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.tapcnt_final[*] }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":365:0:365:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[5] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":365:0:365:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.tapcnt_final[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.tapcnt_final[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.tapcnt_final[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.tapcnt_final[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.tapcnt_final[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.tapcnt_final[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.tapcnt_final[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.tapcnt_final[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.tapcnt_final[7] set_multicycle_path -hold 1 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.tapcnt_offset[*] }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":363:0:363:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[5] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":363:0:363:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.tapcnt_offset[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.tapcnt_offset[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.tapcnt_offset[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.tapcnt_offset[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.tapcnt_offset[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.tapcnt_offset[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.tapcnt_offset[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.tapcnt_offset[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.tapcnt_offset[7] set_multicycle_path -hold 1 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.timeout_cnt[*] }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":373:0:373:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[5] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":373:0:373:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.timeout_cnt[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.timeout_cnt[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.timeout_cnt[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.timeout_cnt[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.timeout_cnt[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.timeout_cnt[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.timeout_cnt[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.timeout_cnt[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.timeout_cnt[7] set_multicycle_path -hold 1 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.wait_cnt[*] }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":367:0:367:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[5] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":367:0:367:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.wait_cnt[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.wait_cnt[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.wait_cnt[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.wait_cnt[2] set_multicycle_path -hold 1 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.cnt[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[*] }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":357:0:357:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.cnt[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.cnt[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.cnt[1] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":357:0:357:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[5] set_multicycle_path -hold 1 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.cnt[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.early_flags_lsb[*] }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":333:0:333:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.cnt[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.cnt[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.cnt[1] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":333:0:333:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.early_flags_lsb[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[7] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[8] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[9] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[10] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[11] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[12] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[13] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[14] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[15] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[16] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[17] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[18] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[19] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[20] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[21] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[22] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[23] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[24] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[25] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[26] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[27] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[28] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[29] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[30] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[31] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[32] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[33] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[34] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[35] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[36] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[37] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[38] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[39] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[40] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[41] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[42] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[43] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[44] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[45] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[46] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[47] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[48] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[49] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[50] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[51] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[52] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[53] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[54] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[55] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[56] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[57] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[58] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[59] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[60] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[61] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[62] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[63] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[64] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[65] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[66] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[67] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[68] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[69] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[70] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[71] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[72] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[73] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[74] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[75] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[76] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[77] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[78] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[79] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[80] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[81] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[82] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[83] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[84] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[85] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[86] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[87] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[88] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[89] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[90] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[91] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[92] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[93] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[94] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[95] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[96] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[97] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[98] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[99] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[100] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[101] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[102] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[103] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[104] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[105] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[106] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[107] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[108] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[109] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[110] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[111] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[112] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[113] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[114] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[115] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[116] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[117] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[118] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[119] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[120] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[121] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[122] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[123] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[124] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[125] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[126] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[127] set_multicycle_path -hold 1 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.cnt[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.early_flags_msb[*] }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":335:0:335:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.cnt[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.cnt[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.cnt[1] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":335:0:335:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.early_flags_msb[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[7] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[8] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[9] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[10] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[11] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[12] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[13] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[14] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[15] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[16] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[17] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[18] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[19] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[20] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[21] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[22] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[23] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[24] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[25] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[26] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[27] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[28] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[29] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[30] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[31] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[32] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[33] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[34] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[35] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[36] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[37] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[38] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[39] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[40] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[41] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[42] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[43] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[44] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[45] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[46] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[47] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[48] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[49] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[50] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[51] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[52] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[53] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[54] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[55] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[56] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[57] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[58] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[59] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[60] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[61] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[62] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[63] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[64] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[65] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[66] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[67] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[68] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[69] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[70] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[71] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[72] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[73] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[74] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[75] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[76] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[77] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[78] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[79] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[80] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[81] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[82] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[83] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[84] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[85] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[86] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[87] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[88] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[89] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[90] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[91] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[92] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[93] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[94] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[95] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[96] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[97] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[98] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[99] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[100] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[101] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[102] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[103] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[104] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[105] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[106] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[107] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[108] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[109] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[110] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[111] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[112] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[113] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[114] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[115] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[116] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[117] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[118] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[119] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[120] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[121] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[122] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[123] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[124] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[125] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[126] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[127] set_multicycle_path -hold 1 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.cnt[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.late_flags_lsb[*] }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":337:0:337:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.cnt[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.cnt[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.cnt[1] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":337:0:337:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.late_flags_lsb[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[7] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[8] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[9] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[10] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[11] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[12] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[13] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[14] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[15] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[16] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[17] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[18] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[19] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[20] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[21] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[22] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[23] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[24] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[25] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[26] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[27] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[28] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[29] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[30] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[31] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[32] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[33] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[34] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[35] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[36] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[37] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[38] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[39] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[40] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[41] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[42] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[43] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[44] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[45] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[46] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[47] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[48] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[49] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[50] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[51] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[52] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[53] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[54] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[55] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[56] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[57] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[58] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[59] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[60] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[61] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[62] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[63] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[64] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[65] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[66] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[67] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[68] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[69] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[70] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[71] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[72] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[73] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[74] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[75] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[76] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[77] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[78] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[79] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[80] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[81] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[82] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[83] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[84] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[85] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[86] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[87] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[88] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[89] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[90] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[91] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[92] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[93] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[94] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[95] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[96] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[97] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[98] 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DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[105] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[106] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[107] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[108] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[109] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[110] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[111] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[112] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[113] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[114] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[115] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[116] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[117] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[118] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[119] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[120] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[121] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[122] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[123] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[124] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[125] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[126] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[127] set_multicycle_path -hold 1 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.cnt[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.late_flags_msb[*] }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":339:0:339:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.cnt[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.cnt[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.cnt[1] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":339:0:339:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.late_flags_msb[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[7] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[8] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[9] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[10] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[11] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[12] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[13] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[14] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[15] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[16] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[17] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[18] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[19] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[20] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[21] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[22] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[23] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[24] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[25] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[26] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[27] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[28] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[29] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[30] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[31] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[32] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[33] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[34] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[35] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[36] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[37] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[38] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[39] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[40] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[41] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[42] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[43] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[44] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[45] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[46] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[47] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[48] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[49] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[50] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[51] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[52] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[53] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[54] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[55] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[56] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[57] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[58] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[59] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[60] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[61] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[62] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[63] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[64] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[65] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[66] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[67] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[68] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[69] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[70] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[71] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[72] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[73] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[74] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[75] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[76] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[77] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[78] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[79] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[80] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[81] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[82] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[83] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[84] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[85] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[86] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[87] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[88] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[89] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[90] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[91] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[92] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[93] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[94] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[95] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[96] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[97] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[98] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[99] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[100] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[101] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[102] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[103] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[104] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[105] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[106] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[107] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[108] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[109] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[110] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[111] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[112] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[113] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[114] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[115] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[116] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[117] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[118] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[119] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[120] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[121] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[122] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[123] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[124] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[125] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[126] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[127] set_multicycle_path -hold 1 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.cnt[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.tap_cnt[*] }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":361:0:361:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.cnt[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.cnt[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.cnt[1] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":361:0:361:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.tap_cnt[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.tap_cnt[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.tap_cnt[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.tap_cnt[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.tap_cnt[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.tap_cnt[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.tap_cnt[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.tap_cnt[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.tap_cnt[7] set_multicycle_path -hold 1 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.emflag_cnt[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[*] }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":359:0:359:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.emflag_cnt[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.emflag_cnt[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.emflag_cnt[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.emflag_cnt[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.emflag_cnt[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.emflag_cnt[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.emflag_cnt[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.emflag_cnt[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.emflag_cnt[7] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":359:0:359:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[5] set_multicycle_path -hold 1 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.emflag_cnt[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.early_found_lsb_d }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":297:0:297:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.emflag_cnt[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.emflag_cnt[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.emflag_cnt[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.emflag_cnt[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.emflag_cnt[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.emflag_cnt[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.emflag_cnt[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.emflag_cnt[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.emflag_cnt[7] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":297:0:297:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.early_found_lsb_d }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_found_lsb_d set_multicycle_path -hold 1 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.emflag_cnt[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.early_found_msb_d }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":299:0:299:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.emflag_cnt[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.emflag_cnt[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.emflag_cnt[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.emflag_cnt[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.emflag_cnt[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.emflag_cnt[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.emflag_cnt[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.emflag_cnt[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.emflag_cnt[7] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":299:0:299:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.early_found_msb_d }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_found_msb_d set_multicycle_path -hold 1 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.emflag_cnt[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.early_not_found_lsb_d }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":301:0:301:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.emflag_cnt[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.emflag_cnt[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.emflag_cnt[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.emflag_cnt[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.emflag_cnt[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.emflag_cnt[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.emflag_cnt[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.emflag_cnt[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.emflag_cnt[7] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":301:0:301:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.early_not_found_lsb_d }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_not_found_lsb_d set_multicycle_path -hold 1 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.emflag_cnt[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.early_not_found_msb_d }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":303:0:303:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.emflag_cnt[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.emflag_cnt[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.emflag_cnt[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.emflag_cnt[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.emflag_cnt[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.emflag_cnt[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.emflag_cnt[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.emflag_cnt[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.emflag_cnt[7] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":303:0:303:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.early_not_found_msb_d }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_not_found_msb_d set_multicycle_path -hold 1 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.emflag_cnt[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.late_found_lsb_d }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":293:0:293:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.emflag_cnt[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.emflag_cnt[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.emflag_cnt[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.emflag_cnt[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.emflag_cnt[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.emflag_cnt[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.emflag_cnt[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.emflag_cnt[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.emflag_cnt[7] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":293:0:293:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.late_found_lsb_d }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_found_lsb_d set_multicycle_path -hold 1 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.emflag_cnt[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.late_found_msb_d }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":295:0:295:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.emflag_cnt[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.emflag_cnt[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.emflag_cnt[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.emflag_cnt[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.emflag_cnt[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.emflag_cnt[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.emflag_cnt[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.emflag_cnt[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.emflag_cnt[7] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":295:0:295:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.late_found_msb_d }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_found_msb_d set_multicycle_path -hold 1 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.emflag_cnt[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.late_not_found_lsb_d }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":305:0:305:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.emflag_cnt[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.emflag_cnt[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.emflag_cnt[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.emflag_cnt[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.emflag_cnt[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.emflag_cnt[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.emflag_cnt[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.emflag_cnt[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.emflag_cnt[7] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":305:0:305:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.late_not_found_lsb_d }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_not_found_lsb_d set_multicycle_path -hold 1 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.emflag_cnt[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.late_not_found_msb_d }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":307:0:307:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.emflag_cnt[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.emflag_cnt[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.emflag_cnt[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.emflag_cnt[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.emflag_cnt[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.emflag_cnt[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.emflag_cnt[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.emflag_cnt[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.emflag_cnt[7] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":307:0:307:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.late_not_found_msb_d }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_not_found_msb_d set_multicycle_path -hold 2 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.*.u_CoreRxIODBitAlign.early_cur_set }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":69:0:69:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[7] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":69:0:69:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.*.u_CoreRxIODBitAlign.early_cur_set }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_cur_set set_multicycle_path -hold 2 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.*.u_CoreRxIODBitAlign.early_last_set }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":71:0:71:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[7] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":71:0:71:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.*.u_CoreRxIODBitAlign.early_last_set }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_last_set set_multicycle_path -hold 2 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.*.u_CoreRxIODBitAlign.early_late_diff[*] }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":89:0:89:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[7] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":89:0:89:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.*.u_CoreRxIODBitAlign.early_late_diff[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_late_diff[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_late_diff[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_late_diff[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_late_diff[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_late_diff[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_late_diff[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_late_diff[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_late_diff[7] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_late_diff[8] set_multicycle_path -hold 2 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.*.u_CoreRxIODBitAlign.early_val[*] }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":77:0:77:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[7] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":77:0:77:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.*.u_CoreRxIODBitAlign.early_val[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_val[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_val[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_val[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_val[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_val[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_val[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_val[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_val[7] set_multicycle_path -hold 2 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.*.u_CoreRxIODBitAlign.late_cur_set }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":73:0:73:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[7] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":73:0:73:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.*.u_CoreRxIODBitAlign.late_cur_set }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_cur_set set_multicycle_path -hold 2 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.*.u_CoreRxIODBitAlign.late_last_set }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":75:0:75:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[7] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":75:0:75:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.*.u_CoreRxIODBitAlign.late_last_set }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_last_set set_multicycle_path -hold 2 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.*.u_CoreRxIODBitAlign.late_val[*] }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":79:0:79:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[7] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":79:0:79:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.*.u_CoreRxIODBitAlign.late_val[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_val[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_val[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_val[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_val[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_val[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_val[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_val[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_val[7] set_multicycle_path -hold 2 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.*.u_CoreRxIODBitAlign.no_early_no_late_val_end1[*] }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":83:0:83:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[7] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":83:0:83:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.*.u_CoreRxIODBitAlign.no_early_no_late_val_end1[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.no_early_no_late_val_end1[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.no_early_no_late_val_end1[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.no_early_no_late_val_end1[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.no_early_no_late_val_end1[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.no_early_no_late_val_end1[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.no_early_no_late_val_end1[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.no_early_no_late_val_end1[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.no_early_no_late_val_end1[7] set_multicycle_path -hold 2 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.*.u_CoreRxIODBitAlign.no_early_no_late_val_end2[*] }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":87:0:87:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[7] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":87:0:87:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.*.u_CoreRxIODBitAlign.no_early_no_late_val_end2[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.no_early_no_late_val_end2[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.no_early_no_late_val_end2[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.no_early_no_late_val_end2[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.no_early_no_late_val_end2[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.no_early_no_late_val_end2[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.no_early_no_late_val_end2[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.no_early_no_late_val_end2[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.no_early_no_late_val_end2[7] set_multicycle_path -hold 2 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.*.u_CoreRxIODBitAlign.no_early_no_late_val_st1[*] }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":81:0:81:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[7] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":81:0:81:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.*.u_CoreRxIODBitAlign.no_early_no_late_val_st1[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.no_early_no_late_val_st1[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.no_early_no_late_val_st1[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.no_early_no_late_val_st1[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.no_early_no_late_val_st1[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.no_early_no_late_val_st1[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.no_early_no_late_val_st1[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.no_early_no_late_val_st1[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.no_early_no_late_val_st1[7] set_multicycle_path -hold 2 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.*.u_CoreRxIODBitAlign.no_early_no_late_val_st2[*] }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":85:0:85:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[7] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":85:0:85:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.*.u_CoreRxIODBitAlign.no_early_no_late_val_st2[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.no_early_no_late_val_st2[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.no_early_no_late_val_st2[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.no_early_no_late_val_st2[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.no_early_no_late_val_st2[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.no_early_no_late_val_st2[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.no_early_no_late_val_st2[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.no_early_no_late_val_st2[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.no_early_no_late_val_st2[7] set_multicycle_path -hold 2 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.*.u_CoreRxIODBitAlign.noearly_nolate_diff_nxt[*] }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":93:0:93:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[7] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":93:0:93:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.*.u_CoreRxIODBitAlign.noearly_nolate_diff_nxt[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.noearly_nolate_diff_nxt[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.noearly_nolate_diff_nxt[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.noearly_nolate_diff_nxt[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.noearly_nolate_diff_nxt[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.noearly_nolate_diff_nxt[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.noearly_nolate_diff_nxt[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.noearly_nolate_diff_nxt[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.noearly_nolate_diff_nxt[7] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.noearly_nolate_diff_nxt[8] set_multicycle_path -hold 2 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.*.u_CoreRxIODBitAlign.noearly_nolate_diff_start[*] }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":91:0:91:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[7] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":91:0:91:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.*.u_CoreRxIODBitAlign.noearly_nolate_diff_start[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.noearly_nolate_diff_start[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.noearly_nolate_diff_start[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.noearly_nolate_diff_start[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.noearly_nolate_diff_start[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.noearly_nolate_diff_start[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.noearly_nolate_diff_start[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.noearly_nolate_diff_start[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.noearly_nolate_diff_start[7] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.noearly_nolate_diff_start[8] set_multicycle_path -hold 2 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.*.u_CoreRxIODBitAlign.early_cur_set }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":129:0:129:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[7] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":129:0:129:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.*.u_CoreRxIODBitAlign.early_cur_set }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_cur_set set_multicycle_path -hold 2 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.*.u_CoreRxIODBitAlign.early_last_set }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":131:0:131:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[7] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":131:0:131:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.*.u_CoreRxIODBitAlign.early_last_set }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_last_set set_multicycle_path -hold 2 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.*.u_CoreRxIODBitAlign.early_late_diff[*] }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":149:0:149:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[7] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":149:0:149:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.*.u_CoreRxIODBitAlign.early_late_diff[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_late_diff[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_late_diff[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_late_diff[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_late_diff[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_late_diff[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_late_diff[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_late_diff[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_late_diff[7] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_late_diff[8] set_multicycle_path -hold 2 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.*.u_CoreRxIODBitAlign.early_val[*] }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":137:0:137:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[7] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":137:0:137:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.*.u_CoreRxIODBitAlign.early_val[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_val[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_val[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_val[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_val[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_val[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_val[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_val[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_val[7] set_multicycle_path -hold 2 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.*.u_CoreRxIODBitAlign.late_cur_set }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":133:0:133:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[7] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":133:0:133:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.*.u_CoreRxIODBitAlign.late_cur_set }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_cur_set set_multicycle_path -hold 2 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.*.u_CoreRxIODBitAlign.late_last_set }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":135:0:135:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[7] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":135:0:135:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.*.u_CoreRxIODBitAlign.late_last_set }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_last_set set_multicycle_path -hold 2 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.*.u_CoreRxIODBitAlign.late_val[*] }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":139:0:139:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[7] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":139:0:139:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.*.u_CoreRxIODBitAlign.late_val[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_val[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_val[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_val[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_val[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_val[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_val[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_val[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_val[7] set_multicycle_path -hold 2 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.*.u_CoreRxIODBitAlign.no_early_no_late_val_end1[*] }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":143:0:143:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[7] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":143:0:143:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.*.u_CoreRxIODBitAlign.no_early_no_late_val_end1[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.no_early_no_late_val_end1[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.no_early_no_late_val_end1[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.no_early_no_late_val_end1[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.no_early_no_late_val_end1[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.no_early_no_late_val_end1[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.no_early_no_late_val_end1[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.no_early_no_late_val_end1[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.no_early_no_late_val_end1[7] set_multicycle_path -hold 2 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.*.u_CoreRxIODBitAlign.no_early_no_late_val_end2[*] }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":147:0:147:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[7] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":147:0:147:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.*.u_CoreRxIODBitAlign.no_early_no_late_val_end2[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.no_early_no_late_val_end2[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.no_early_no_late_val_end2[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.no_early_no_late_val_end2[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.no_early_no_late_val_end2[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.no_early_no_late_val_end2[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.no_early_no_late_val_end2[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.no_early_no_late_val_end2[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.no_early_no_late_val_end2[7] set_multicycle_path -hold 2 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.*.u_CoreRxIODBitAlign.no_early_no_late_val_st1[*] }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":141:0:141:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[7] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":141:0:141:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.*.u_CoreRxIODBitAlign.no_early_no_late_val_st1[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.no_early_no_late_val_st1[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.no_early_no_late_val_st1[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.no_early_no_late_val_st1[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.no_early_no_late_val_st1[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.no_early_no_late_val_st1[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.no_early_no_late_val_st1[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.no_early_no_late_val_st1[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.no_early_no_late_val_st1[7] set_multicycle_path -hold 2 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.*.u_CoreRxIODBitAlign.no_early_no_late_val_st2[*] }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":145:0:145:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[7] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":145:0:145:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.*.u_CoreRxIODBitAlign.no_early_no_late_val_st2[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.no_early_no_late_val_st2[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.no_early_no_late_val_st2[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.no_early_no_late_val_st2[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.no_early_no_late_val_st2[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.no_early_no_late_val_st2[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.no_early_no_late_val_st2[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.no_early_no_late_val_st2[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.no_early_no_late_val_st2[7] set_multicycle_path -hold 2 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.*.u_CoreRxIODBitAlign.noearly_nolate_diff_nxt[*] }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":153:0:153:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[7] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":153:0:153:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.*.u_CoreRxIODBitAlign.noearly_nolate_diff_nxt[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.noearly_nolate_diff_nxt[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.noearly_nolate_diff_nxt[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.noearly_nolate_diff_nxt[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.noearly_nolate_diff_nxt[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.noearly_nolate_diff_nxt[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.noearly_nolate_diff_nxt[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.noearly_nolate_diff_nxt[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.noearly_nolate_diff_nxt[7] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.noearly_nolate_diff_nxt[8] set_multicycle_path -hold 2 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.*.u_CoreRxIODBitAlign.noearly_nolate_diff_start[*] }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":151:0:151:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[7] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":151:0:151:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.*.u_CoreRxIODBitAlign.noearly_nolate_diff_start[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.noearly_nolate_diff_start[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.noearly_nolate_diff_start[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.noearly_nolate_diff_start[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.noearly_nolate_diff_start[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.noearly_nolate_diff_start[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.noearly_nolate_diff_start[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.noearly_nolate_diff_start[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.noearly_nolate_diff_start[7] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.noearly_nolate_diff_start[8] set_multicycle_path -hold 2 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.*.u_CoreRxIODBitAlign.early_cur_set }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":189:0:189:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[7] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":189:0:189:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.*.u_CoreRxIODBitAlign.early_cur_set }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_cur_set set_multicycle_path -hold 2 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.*.u_CoreRxIODBitAlign.early_last_set }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":191:0:191:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[7] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":191:0:191:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.*.u_CoreRxIODBitAlign.early_last_set }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_last_set set_multicycle_path -hold 2 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.*.u_CoreRxIODBitAlign.early_late_diff[*] }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":209:0:209:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[7] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":209:0:209:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.*.u_CoreRxIODBitAlign.early_late_diff[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_late_diff[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_late_diff[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_late_diff[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_late_diff[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_late_diff[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_late_diff[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_late_diff[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_late_diff[7] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_late_diff[8] set_multicycle_path -hold 2 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.*.u_CoreRxIODBitAlign.early_val[*] }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":197:0:197:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[7] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":197:0:197:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.*.u_CoreRxIODBitAlign.early_val[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_val[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_val[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_val[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_val[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_val[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_val[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_val[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_val[7] set_multicycle_path -hold 2 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.*.u_CoreRxIODBitAlign.late_cur_set }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":193:0:193:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[7] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":193:0:193:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.*.u_CoreRxIODBitAlign.late_cur_set }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_cur_set set_multicycle_path -hold 2 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.*.u_CoreRxIODBitAlign.late_last_set }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":195:0:195:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[7] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":195:0:195:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.*.u_CoreRxIODBitAlign.late_last_set }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_last_set set_multicycle_path -hold 2 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.*.u_CoreRxIODBitAlign.late_val[*] }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":199:0:199:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[7] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":199:0:199:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.*.u_CoreRxIODBitAlign.late_val[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_val[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_val[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_val[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_val[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_val[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_val[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_val[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_val[7] set_multicycle_path -hold 2 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.*.u_CoreRxIODBitAlign.no_early_no_late_val_end1[*] }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":203:0:203:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[7] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":203:0:203:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.*.u_CoreRxIODBitAlign.no_early_no_late_val_end1[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.no_early_no_late_val_end1[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.no_early_no_late_val_end1[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.no_early_no_late_val_end1[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.no_early_no_late_val_end1[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.no_early_no_late_val_end1[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.no_early_no_late_val_end1[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.no_early_no_late_val_end1[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.no_early_no_late_val_end1[7] set_multicycle_path -hold 2 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.*.u_CoreRxIODBitAlign.no_early_no_late_val_end2[*] }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":207:0:207:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[7] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":207:0:207:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.*.u_CoreRxIODBitAlign.no_early_no_late_val_end2[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.no_early_no_late_val_end2[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.no_early_no_late_val_end2[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.no_early_no_late_val_end2[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.no_early_no_late_val_end2[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.no_early_no_late_val_end2[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.no_early_no_late_val_end2[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.no_early_no_late_val_end2[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.no_early_no_late_val_end2[7] set_multicycle_path -hold 2 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.*.u_CoreRxIODBitAlign.no_early_no_late_val_st1[*] }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":201:0:201:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[7] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":201:0:201:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.*.u_CoreRxIODBitAlign.no_early_no_late_val_st1[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.no_early_no_late_val_st1[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.no_early_no_late_val_st1[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.no_early_no_late_val_st1[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.no_early_no_late_val_st1[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.no_early_no_late_val_st1[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.no_early_no_late_val_st1[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.no_early_no_late_val_st1[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.no_early_no_late_val_st1[7] set_multicycle_path -hold 2 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.*.u_CoreRxIODBitAlign.no_early_no_late_val_st2[*] }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":205:0:205:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[7] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":205:0:205:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.*.u_CoreRxIODBitAlign.no_early_no_late_val_st2[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.no_early_no_late_val_st2[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.no_early_no_late_val_st2[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.no_early_no_late_val_st2[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.no_early_no_late_val_st2[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.no_early_no_late_val_st2[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.no_early_no_late_val_st2[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.no_early_no_late_val_st2[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.no_early_no_late_val_st2[7] set_multicycle_path -hold 2 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.*.u_CoreRxIODBitAlign.noearly_nolate_diff_nxt[*] }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":213:0:213:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[7] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":213:0:213:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.*.u_CoreRxIODBitAlign.noearly_nolate_diff_nxt[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.noearly_nolate_diff_nxt[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.noearly_nolate_diff_nxt[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.noearly_nolate_diff_nxt[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.noearly_nolate_diff_nxt[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.noearly_nolate_diff_nxt[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.noearly_nolate_diff_nxt[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.noearly_nolate_diff_nxt[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.noearly_nolate_diff_nxt[7] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.noearly_nolate_diff_nxt[8] set_multicycle_path -hold 2 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.*.u_CoreRxIODBitAlign.noearly_nolate_diff_start[*] }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":211:0:211:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[7] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":211:0:211:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.*.u_CoreRxIODBitAlign.noearly_nolate_diff_start[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.noearly_nolate_diff_start[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.noearly_nolate_diff_start[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.noearly_nolate_diff_start[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.noearly_nolate_diff_start[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.noearly_nolate_diff_start[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.noearly_nolate_diff_start[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.noearly_nolate_diff_start[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.noearly_nolate_diff_start[7] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.noearly_nolate_diff_start[8] set_multicycle_path -hold 2 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.*.u_CoreRxIODBitAlign.early_cur_set }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":249:0:249:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[7] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":249:0:249:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.*.u_CoreRxIODBitAlign.early_cur_set }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_cur_set set_multicycle_path -hold 2 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.*.u_CoreRxIODBitAlign.early_last_set }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":251:0:251:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[7] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":251:0:251:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.*.u_CoreRxIODBitAlign.early_last_set }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_last_set set_multicycle_path -hold 2 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.*.u_CoreRxIODBitAlign.early_late_diff[*] }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":269:0:269:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[7] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":269:0:269:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.*.u_CoreRxIODBitAlign.early_late_diff[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_late_diff[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_late_diff[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_late_diff[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_late_diff[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_late_diff[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_late_diff[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_late_diff[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_late_diff[7] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_late_diff[8] set_multicycle_path -hold 2 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.*.u_CoreRxIODBitAlign.early_val[*] }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":257:0:257:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[7] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":257:0:257:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.*.u_CoreRxIODBitAlign.early_val[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_val[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_val[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_val[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_val[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_val[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_val[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_val[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_val[7] set_multicycle_path -hold 2 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.*.u_CoreRxIODBitAlign.late_cur_set }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":253:0:253:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[7] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":253:0:253:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.*.u_CoreRxIODBitAlign.late_cur_set }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_cur_set set_multicycle_path -hold 2 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.*.u_CoreRxIODBitAlign.late_last_set }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":255:0:255:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[7] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":255:0:255:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.*.u_CoreRxIODBitAlign.late_last_set }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_last_set set_multicycle_path -hold 2 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.*.u_CoreRxIODBitAlign.late_val[*] }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":259:0:259:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[7] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":259:0:259:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.*.u_CoreRxIODBitAlign.late_val[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_val[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_val[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_val[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_val[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_val[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_val[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_val[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_val[7] set_multicycle_path -hold 2 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.*.u_CoreRxIODBitAlign.no_early_no_late_val_end1[*] }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":263:0:263:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[7] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":263:0:263:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.*.u_CoreRxIODBitAlign.no_early_no_late_val_end1[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.no_early_no_late_val_end1[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.no_early_no_late_val_end1[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.no_early_no_late_val_end1[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.no_early_no_late_val_end1[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.no_early_no_late_val_end1[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.no_early_no_late_val_end1[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.no_early_no_late_val_end1[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.no_early_no_late_val_end1[7] set_multicycle_path -hold 2 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.*.u_CoreRxIODBitAlign.no_early_no_late_val_end2[*] }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":267:0:267:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[7] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":267:0:267:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.*.u_CoreRxIODBitAlign.no_early_no_late_val_end2[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.no_early_no_late_val_end2[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.no_early_no_late_val_end2[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.no_early_no_late_val_end2[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.no_early_no_late_val_end2[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.no_early_no_late_val_end2[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.no_early_no_late_val_end2[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.no_early_no_late_val_end2[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.no_early_no_late_val_end2[7] set_multicycle_path -hold 2 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.*.u_CoreRxIODBitAlign.no_early_no_late_val_st1[*] }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":261:0:261:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[7] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":261:0:261:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.*.u_CoreRxIODBitAlign.no_early_no_late_val_st1[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.no_early_no_late_val_st1[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.no_early_no_late_val_st1[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.no_early_no_late_val_st1[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.no_early_no_late_val_st1[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.no_early_no_late_val_st1[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.no_early_no_late_val_st1[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.no_early_no_late_val_st1[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.no_early_no_late_val_st1[7] set_multicycle_path -hold 2 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.*.u_CoreRxIODBitAlign.no_early_no_late_val_st2[*] }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":265:0:265:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[7] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":265:0:265:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.*.u_CoreRxIODBitAlign.no_early_no_late_val_st2[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.no_early_no_late_val_st2[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.no_early_no_late_val_st2[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.no_early_no_late_val_st2[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.no_early_no_late_val_st2[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.no_early_no_late_val_st2[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.no_early_no_late_val_st2[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.no_early_no_late_val_st2[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.no_early_no_late_val_st2[7] set_multicycle_path -hold 2 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.*.u_CoreRxIODBitAlign.noearly_nolate_diff_nxt[*] }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":273:0:273:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[7] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":273:0:273:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.*.u_CoreRxIODBitAlign.noearly_nolate_diff_nxt[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.noearly_nolate_diff_nxt[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.noearly_nolate_diff_nxt[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.noearly_nolate_diff_nxt[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.noearly_nolate_diff_nxt[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.noearly_nolate_diff_nxt[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.noearly_nolate_diff_nxt[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.noearly_nolate_diff_nxt[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.noearly_nolate_diff_nxt[7] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.noearly_nolate_diff_nxt[8] set_multicycle_path -hold 2 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.*.u_CoreRxIODBitAlign.noearly_nolate_diff_start[*] }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":271:0:271:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[7] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":271:0:271:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.*.u_CoreRxIODBitAlign.noearly_nolate_diff_start[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.noearly_nolate_diff_start[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.noearly_nolate_diff_start[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.noearly_nolate_diff_start[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.noearly_nolate_diff_start[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.noearly_nolate_diff_start[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.noearly_nolate_diff_start[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.noearly_nolate_diff_start[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.noearly_nolate_diff_start[7] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.noearly_nolate_diff_start[8] set_multicycle_path -hold 2 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.emflag_cnt[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.early_late_end_set }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":315:0:315:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.emflag_cnt[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.emflag_cnt[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.emflag_cnt[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.emflag_cnt[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.emflag_cnt[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.emflag_cnt[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.emflag_cnt[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.emflag_cnt[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.emflag_cnt[7] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":315:0:315:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.early_late_end_set }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_late_end_set set_multicycle_path -hold 2 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.emflag_cnt[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.early_late_end_val[*] }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":323:0:323:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.emflag_cnt[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.emflag_cnt[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.emflag_cnt[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.emflag_cnt[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.emflag_cnt[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.emflag_cnt[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.emflag_cnt[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.emflag_cnt[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.emflag_cnt[7] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":323:0:323:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.early_late_end_val[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_late_end_val[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_late_end_val[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_late_end_val[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_late_end_val[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_late_end_val[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_late_end_val[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_late_end_val[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_late_end_val[7] set_multicycle_path -hold 2 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.emflag_cnt[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.early_late_init_set }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":309:0:309:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.emflag_cnt[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.emflag_cnt[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.emflag_cnt[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.emflag_cnt[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.emflag_cnt[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.emflag_cnt[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.emflag_cnt[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.emflag_cnt[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.emflag_cnt[7] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":309:0:309:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.early_late_init_set }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_late_init_set set_multicycle_path -hold 2 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.emflag_cnt[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.early_late_init_val[*] }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":317:0:317:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.emflag_cnt[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.emflag_cnt[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.emflag_cnt[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.emflag_cnt[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.emflag_cnt[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.emflag_cnt[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.emflag_cnt[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.emflag_cnt[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.emflag_cnt[7] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":317:0:317:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.early_late_init_val[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_late_init_val[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_late_init_val[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_late_init_val[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_late_init_val[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_late_init_val[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_late_init_val[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_late_init_val[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_late_init_val[7] set_multicycle_path -hold 2 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.emflag_cnt[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.early_late_nxt_set }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":311:0:311:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.emflag_cnt[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.emflag_cnt[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.emflag_cnt[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.emflag_cnt[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.emflag_cnt[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.emflag_cnt[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.emflag_cnt[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.emflag_cnt[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.emflag_cnt[7] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":311:0:311:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.early_late_nxt_set }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_late_nxt_set set_multicycle_path -hold 2 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.emflag_cnt[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.early_late_nxt_val[*] }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":319:0:319:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.emflag_cnt[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.emflag_cnt[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.emflag_cnt[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.emflag_cnt[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.emflag_cnt[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.emflag_cnt[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.emflag_cnt[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.emflag_cnt[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.emflag_cnt[7] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":319:0:319:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.early_late_nxt_val[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_late_nxt_val[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_late_nxt_val[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_late_nxt_val[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_late_nxt_val[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_late_nxt_val[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_late_nxt_val[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_late_nxt_val[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_late_nxt_val[7] set_multicycle_path -hold 2 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.emflag_cnt[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.early_late_start_set }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":313:0:313:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.emflag_cnt[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.emflag_cnt[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.emflag_cnt[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.emflag_cnt[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.emflag_cnt[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.emflag_cnt[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.emflag_cnt[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.emflag_cnt[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.emflag_cnt[7] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":313:0:313:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.early_late_start_set }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_late_start_set set_multicycle_path -hold 2 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.emflag_cnt[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.early_late_start_val[*] }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":321:0:321:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.emflag_cnt[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.emflag_cnt[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.emflag_cnt[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.emflag_cnt[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.emflag_cnt[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.emflag_cnt[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.emflag_cnt[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.emflag_cnt[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.emflag_cnt[7] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":321:0:321:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.early_late_start_val[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_late_start_val[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_late_start_val[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_late_start_val[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_late_start_val[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_late_start_val[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_late_start_val[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_late_start_val[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_late_start_val[7] set_multicycle_path -setup 2 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.*.u_CoreRxIODBitAlign.bitalign_curr_state[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.*.u_CoreRxIODBitAlign.early_flags_lsb[*] }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":100:0:100:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.*.u_CoreRxIODBitAlign.bitalign_curr_state[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.bitalign_curr_state[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.bitalign_curr_state[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.bitalign_curr_state[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.bitalign_curr_state[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.bitalign_curr_state[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.bitalign_curr_state[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.bitalign_curr_state[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.bitalign_curr_state[7] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.bitalign_curr_state[8] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.bitalign_curr_state[9] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.bitalign_curr_state[10] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.bitalign_curr_state[11] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.bitalign_curr_state[12] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.bitalign_curr_state[13] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.bitalign_curr_state[14] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.bitalign_curr_state[15] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.bitalign_curr_state[16] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.bitalign_curr_state[17] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.bitalign_curr_state[18] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.bitalign_curr_state[19] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.bitalign_curr_state[20] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.bitalign_curr_state[21] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.bitalign_curr_state[22] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.bitalign_curr_state[23] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.bitalign_curr_state[24] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.bitalign_curr_state[25] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.bitalign_curr_state[26] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.bitalign_curr_state[27] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.bitalign_curr_state[28] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.bitalign_curr_state[29] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":100:0:100:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.*.u_CoreRxIODBitAlign.early_flags_lsb[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[7] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[8] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[9] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[10] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[11] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[12] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[13] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[14] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[15] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[16] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[17] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[18] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[19] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[20] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[21] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[22] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[23] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[24] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[25] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[26] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[27] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[28] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[29] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[30] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[31] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[32] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[33] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[34] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[35] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[36] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[37] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[38] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[39] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[40] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[41] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[42] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[43] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[44] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[45] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[46] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[47] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[48] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[49] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[50] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[51] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[52] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[53] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[54] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[55] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[56] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[57] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[58] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[59] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[60] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[61] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[62] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[63] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[64] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[65] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[66] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[67] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[68] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[69] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[70] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[71] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[72] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[73] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[74] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[75] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[76] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[77] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[78] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[79] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[80] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[81] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[82] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[83] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[84] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[85] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[86] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[87] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[88] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[89] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[90] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[91] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[92] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[93] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[94] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[95] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[96] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[97] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[98] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[99] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[100] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[101] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[102] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[103] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[104] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[105] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[106] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[107] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[108] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[109] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[110] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[111] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[112] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[113] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[114] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[115] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[116] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[117] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[118] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[119] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[120] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[121] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[122] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[123] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[124] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[125] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[126] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[127] set_multicycle_path -setup 2 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.*.u_CoreRxIODBitAlign.bitalign_curr_state[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.*.u_CoreRxIODBitAlign.early_flags_msb[*] }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":102:0:102:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.*.u_CoreRxIODBitAlign.bitalign_curr_state[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.bitalign_curr_state[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.bitalign_curr_state[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.bitalign_curr_state[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.bitalign_curr_state[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.bitalign_curr_state[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.bitalign_curr_state[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.bitalign_curr_state[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.bitalign_curr_state[7] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.bitalign_curr_state[8] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.bitalign_curr_state[9] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.bitalign_curr_state[10] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.bitalign_curr_state[11] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.bitalign_curr_state[12] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.bitalign_curr_state[13] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.bitalign_curr_state[14] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.bitalign_curr_state[15] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.bitalign_curr_state[16] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.bitalign_curr_state[17] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.bitalign_curr_state[18] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.bitalign_curr_state[19] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.bitalign_curr_state[20] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.bitalign_curr_state[21] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.bitalign_curr_state[22] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.bitalign_curr_state[23] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.bitalign_curr_state[24] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.bitalign_curr_state[25] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.bitalign_curr_state[26] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.bitalign_curr_state[27] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.bitalign_curr_state[28] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.bitalign_curr_state[29] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":102:0:102:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.*.u_CoreRxIODBitAlign.early_flags_msb[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[7] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[8] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[9] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[10] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[11] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[12] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[13] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[14] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[15] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[16] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[17] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[18] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[19] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[20] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[21] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[22] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[23] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[24] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[25] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[26] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[27] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[28] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[29] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[30] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[31] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[32] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[33] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[34] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[35] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[36] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[37] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[38] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[39] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[40] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[41] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[42] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[43] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[44] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[45] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[46] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[47] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[48] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[49] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[50] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[51] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[52] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[53] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[54] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[55] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[56] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[57] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[58] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[59] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[60] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[61] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[62] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[63] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[64] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[65] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[66] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[67] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[68] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[69] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[70] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[71] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[72] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[73] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[74] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[75] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[76] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[77] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[78] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[79] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[80] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[81] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[82] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[83] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[84] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[85] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[86] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[87] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[88] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[89] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[90] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[91] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[92] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[93] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[94] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[95] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[96] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[97] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[98] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[99] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[100] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[101] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[102] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[103] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[104] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[105] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[106] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[107] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[108] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[109] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[110] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[111] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[112] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[113] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[114] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[115] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[116] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[117] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[118] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[119] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[120] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[121] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[122] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[123] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[124] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[125] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[126] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[127] set_multicycle_path -setup 2 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.*.u_CoreRxIODBitAlign.bitalign_curr_state[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.*.u_CoreRxIODBitAlign.late_flags_lsb[*] }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":96:0:96:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.*.u_CoreRxIODBitAlign.bitalign_curr_state[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.bitalign_curr_state[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.bitalign_curr_state[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.bitalign_curr_state[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.bitalign_curr_state[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.bitalign_curr_state[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.bitalign_curr_state[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.bitalign_curr_state[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.bitalign_curr_state[7] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.bitalign_curr_state[8] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.bitalign_curr_state[9] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.bitalign_curr_state[10] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.bitalign_curr_state[11] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.bitalign_curr_state[12] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.bitalign_curr_state[13] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.bitalign_curr_state[14] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.bitalign_curr_state[15] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.bitalign_curr_state[16] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.bitalign_curr_state[17] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.bitalign_curr_state[18] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.bitalign_curr_state[19] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.bitalign_curr_state[20] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.bitalign_curr_state[21] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.bitalign_curr_state[22] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.bitalign_curr_state[23] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.bitalign_curr_state[24] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.bitalign_curr_state[25] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.bitalign_curr_state[26] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.bitalign_curr_state[27] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.bitalign_curr_state[28] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.bitalign_curr_state[29] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":96:0:96:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.*.u_CoreRxIODBitAlign.late_flags_lsb[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[7] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[8] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[9] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[10] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[11] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[12] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[13] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[14] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[15] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[16] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[17] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[18] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[19] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[20] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[21] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[22] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[23] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[24] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[25] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[26] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[27] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[28] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[29] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[30] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[31] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[32] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[33] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[34] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[35] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[36] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[37] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[38] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[39] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[40] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[41] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[42] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[43] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[44] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[45] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[46] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[47] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[48] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[49] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[50] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[51] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[52] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[53] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[54] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[55] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[56] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[57] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[58] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[59] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[60] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[61] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[62] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[63] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[64] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[65] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[66] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[67] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[68] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[69] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[70] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[71] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[72] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[73] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[74] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[75] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[76] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[77] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[78] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[79] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[80] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[81] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[82] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[83] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[84] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[85] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[86] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[87] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[88] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[89] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[90] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[91] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[92] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[93] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[94] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[95] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[96] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[97] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[98] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[99] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[100] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[101] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[102] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[103] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[104] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[105] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[106] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[107] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[108] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[109] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[110] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[111] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[112] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[113] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[114] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[115] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[116] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[117] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[118] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[119] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[120] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[121] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[122] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[123] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[124] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[125] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[126] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[127] set_multicycle_path -setup 2 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.*.u_CoreRxIODBitAlign.bitalign_curr_state[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.*.u_CoreRxIODBitAlign.late_flags_msb[*] }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":98:0:98:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.*.u_CoreRxIODBitAlign.bitalign_curr_state[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.bitalign_curr_state[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.bitalign_curr_state[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.bitalign_curr_state[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.bitalign_curr_state[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.bitalign_curr_state[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.bitalign_curr_state[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.bitalign_curr_state[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.bitalign_curr_state[7] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.bitalign_curr_state[8] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.bitalign_curr_state[9] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.bitalign_curr_state[10] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.bitalign_curr_state[11] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.bitalign_curr_state[12] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.bitalign_curr_state[13] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.bitalign_curr_state[14] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.bitalign_curr_state[15] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.bitalign_curr_state[16] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.bitalign_curr_state[17] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.bitalign_curr_state[18] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.bitalign_curr_state[19] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.bitalign_curr_state[20] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.bitalign_curr_state[21] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.bitalign_curr_state[22] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.bitalign_curr_state[23] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.bitalign_curr_state[24] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.bitalign_curr_state[25] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.bitalign_curr_state[26] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.bitalign_curr_state[27] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.bitalign_curr_state[28] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.bitalign_curr_state[29] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":98:0:98:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.*.u_CoreRxIODBitAlign.late_flags_msb[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[7] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[8] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[9] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[10] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[11] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[12] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[13] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[14] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[15] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[16] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[17] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[18] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[19] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[20] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[21] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[22] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[23] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[24] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[25] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[26] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[27] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[28] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[29] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[30] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[31] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[32] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[33] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[34] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[35] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[36] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[37] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[38] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[39] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[40] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[41] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[42] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[43] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[44] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[45] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[46] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[47] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[48] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[49] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[50] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[51] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[52] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[53] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[54] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[55] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[56] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[57] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[58] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[59] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[60] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[61] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[62] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[63] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[64] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[65] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[66] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[67] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[68] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[69] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[70] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[71] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[72] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[73] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[74] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[75] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[76] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[77] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[78] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[79] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[80] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[81] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[82] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[83] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[84] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[85] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[86] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[87] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[88] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[89] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[90] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[91] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[92] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[93] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[94] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[95] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[96] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[97] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[98] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[99] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[100] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[101] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[102] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[103] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[104] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[105] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[106] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[107] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[108] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[109] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[110] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[111] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[112] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[113] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[114] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[115] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[116] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[117] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[118] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[119] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[120] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[121] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[122] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[123] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[124] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[125] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[126] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[127] set_multicycle_path -setup 2 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.*.u_CoreRxIODBitAlign.cnt[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.*.u_CoreRxIODBitAlign.early_flags_lsb[*] }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":108:0:108:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.*.u_CoreRxIODBitAlign.cnt[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.cnt[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.cnt[1] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":108:0:108:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.*.u_CoreRxIODBitAlign.early_flags_lsb[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[7] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[8] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[9] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[10] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[11] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[12] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[13] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[14] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[15] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[16] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[17] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[18] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[19] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[20] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[21] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[22] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[23] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[24] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[25] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[26] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[27] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[28] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[29] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[30] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[31] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[32] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[33] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[34] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[35] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[36] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[37] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[38] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[39] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[40] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[41] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[42] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[43] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[44] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[45] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[46] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[47] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[48] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[49] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[50] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[51] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[52] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[53] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[54] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[55] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[56] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[57] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[58] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[59] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[60] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[61] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[62] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[63] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[64] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[65] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[66] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[67] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[68] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[69] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[70] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[71] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[72] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[73] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[74] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[75] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[76] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[77] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[78] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[79] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[80] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[81] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[82] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[83] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[84] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[85] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[86] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[87] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[88] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[89] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[90] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[91] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[92] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[93] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[94] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[95] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[96] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[97] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[98] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[99] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[100] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[101] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[102] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[103] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[104] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[105] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[106] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[107] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[108] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[109] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[110] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[111] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[112] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[113] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[114] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[115] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[116] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[117] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[118] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[119] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[120] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[121] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[122] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[123] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[124] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[125] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[126] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_lsb[127] set_multicycle_path -setup 2 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.*.u_CoreRxIODBitAlign.cnt[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.*.u_CoreRxIODBitAlign.early_flags_msb[*] }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":110:0:110:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.*.u_CoreRxIODBitAlign.cnt[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.cnt[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.cnt[1] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":110:0:110:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.*.u_CoreRxIODBitAlign.early_flags_msb[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[7] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[8] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[9] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[10] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[11] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[12] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[13] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[14] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[15] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[16] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[17] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[18] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[19] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[20] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[21] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[22] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[23] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[24] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[25] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[26] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[27] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[28] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[29] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[30] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[31] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[32] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[33] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[34] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[35] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[36] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[37] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[38] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[39] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[40] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[41] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[42] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[43] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[44] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[45] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[46] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[47] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[48] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[49] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[50] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[51] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[52] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[53] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[54] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[55] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[56] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[57] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[58] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[59] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[60] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[61] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[62] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[63] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[64] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[65] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[66] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[67] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[68] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[69] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[70] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[71] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[72] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[73] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[74] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[75] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[76] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[77] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[78] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[79] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[80] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[81] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[82] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[83] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[84] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[85] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[86] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[87] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[88] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[89] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[90] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[91] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[92] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[93] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[94] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[95] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[96] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[97] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[98] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[99] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[100] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[101] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[102] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[103] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[104] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[105] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[106] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[107] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[108] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[109] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[110] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[111] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[112] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[113] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[114] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[115] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[116] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[117] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[118] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[119] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[120] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[121] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[122] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[123] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[124] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[125] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[126] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_flags_msb[127] set_multicycle_path -setup 2 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.*.u_CoreRxIODBitAlign.cnt[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.*.u_CoreRxIODBitAlign.late_flags_lsb[*] }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":104:0:104:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.*.u_CoreRxIODBitAlign.cnt[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.cnt[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.cnt[1] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":104:0:104:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.*.u_CoreRxIODBitAlign.late_flags_lsb[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[7] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[8] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[9] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[10] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[11] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[12] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[13] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[14] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[15] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[16] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[17] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[18] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[19] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[20] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[21] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[22] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[23] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[24] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[25] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[26] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[27] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[28] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[29] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[30] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[31] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[32] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[33] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[34] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[35] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[36] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[37] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[38] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[39] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[40] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[41] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[42] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[43] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[44] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[45] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[46] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[47] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[48] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[49] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[50] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[51] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[52] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[53] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[54] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[55] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[56] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[57] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[58] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[59] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[60] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[61] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[62] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[63] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[64] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[65] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[66] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[67] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[68] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[69] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[70] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[71] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[72] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[73] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[74] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[75] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[76] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[77] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[78] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[79] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[80] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[81] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[82] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[83] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[84] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[85] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[86] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[87] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[88] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[89] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[90] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[91] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[92] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[93] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[94] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[95] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[96] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[97] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[98] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[99] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[100] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[101] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[102] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[103] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[104] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[105] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[106] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[107] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[108] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[109] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[110] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[111] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[112] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[113] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[114] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[115] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[116] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[117] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[118] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[119] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[120] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[121] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[122] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[123] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[124] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[125] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[126] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_lsb[127] set_multicycle_path -setup 2 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.*.u_CoreRxIODBitAlign.cnt[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.*.u_CoreRxIODBitAlign.late_flags_msb[*] }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":106:0:106:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.*.u_CoreRxIODBitAlign.cnt[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.cnt[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.cnt[1] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":106:0:106:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.*.u_CoreRxIODBitAlign.late_flags_msb[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[7] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[8] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[9] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[10] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[11] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[12] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[13] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[14] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[15] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[16] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[17] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[18] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[19] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[20] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[21] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[22] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[23] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[24] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[25] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[26] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[27] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[28] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[29] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[30] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[31] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[32] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[33] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[34] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[35] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[36] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[37] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[38] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[39] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[40] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[41] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[42] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[43] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[44] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[45] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[46] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[47] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[48] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[49] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[50] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[51] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[52] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[53] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[54] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[55] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[56] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[57] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[58] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[59] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[60] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[61] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[62] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[63] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[64] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[65] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[66] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[67] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[68] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[69] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[70] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[71] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[72] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[73] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[74] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[75] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[76] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[77] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[78] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[79] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[80] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[81] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[82] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[83] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[84] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[85] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[86] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[87] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[88] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[89] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[90] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[91] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[92] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[93] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[94] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[95] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[96] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[97] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[98] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[99] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[100] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[101] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[102] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[103] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[104] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[105] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[106] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[107] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[108] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[109] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[110] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[111] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[112] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[113] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[114] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[115] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[116] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[117] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[118] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[119] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[120] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[121] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[122] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[123] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[124] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[125] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[126] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_flags_msb[127] set_multicycle_path -setup 2 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.*.u_CoreRxIODBitAlign.cnt[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.*.u_CoreRxIODBitAlign.tap_cnt[*] }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":94:0:94:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.*.u_CoreRxIODBitAlign.cnt[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.cnt[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.cnt[1] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":94:0:94:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.*.u_CoreRxIODBitAlign.tap_cnt[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.tap_cnt[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.tap_cnt[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.tap_cnt[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.tap_cnt[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.tap_cnt[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.tap_cnt[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.tap_cnt[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.tap_cnt[7] set_multicycle_path -setup 2 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.*.u_CoreRxIODBitAlign.early_found_lsb_d }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":56:0:56:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[7] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":56:0:56:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.*.u_CoreRxIODBitAlign.early_found_lsb_d }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_found_lsb_d set_multicycle_path -setup 2 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.*.u_CoreRxIODBitAlign.early_found_msb_d }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":58:0:58:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[7] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":58:0:58:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.*.u_CoreRxIODBitAlign.early_found_msb_d }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_found_msb_d set_multicycle_path -setup 2 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.*.u_CoreRxIODBitAlign.early_not_found_lsb_d }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":60:0:60:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[7] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":60:0:60:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.*.u_CoreRxIODBitAlign.early_not_found_lsb_d }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_not_found_lsb_d set_multicycle_path -setup 2 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.*.u_CoreRxIODBitAlign.early_not_found_msb_d }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":62:0:62:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[7] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":62:0:62:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.*.u_CoreRxIODBitAlign.early_not_found_msb_d }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_not_found_msb_d set_multicycle_path -setup 2 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.*.u_CoreRxIODBitAlign.late_found_lsb_d }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":52:0:52:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[7] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":52:0:52:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.*.u_CoreRxIODBitAlign.late_found_lsb_d }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_found_lsb_d set_multicycle_path -setup 2 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.*.u_CoreRxIODBitAlign.late_found_msb_d }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":54:0:54:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[7] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":54:0:54:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.*.u_CoreRxIODBitAlign.late_found_msb_d }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_found_msb_d set_multicycle_path -setup 2 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.*.u_CoreRxIODBitAlign.late_not_found_lsb_d }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":64:0:64:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[7] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":64:0:64:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.*.u_CoreRxIODBitAlign.late_not_found_lsb_d }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_not_found_lsb_d set_multicycle_path -setup 2 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.*.u_CoreRxIODBitAlign.late_not_found_msb_d }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":66:0:66:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[7] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":66:0:66:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.*.u_CoreRxIODBitAlign.late_not_found_msb_d }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_not_found_msb_d set_multicycle_path -setup 2 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.*.u_CoreRxIODBitAlign.bitalign_curr_state[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.*.u_CoreRxIODBitAlign.early_flags_lsb[*] }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":160:0:160:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.*.u_CoreRxIODBitAlign.bitalign_curr_state[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.bitalign_curr_state[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.bitalign_curr_state[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.bitalign_curr_state[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.bitalign_curr_state[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.bitalign_curr_state[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.bitalign_curr_state[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.bitalign_curr_state[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.bitalign_curr_state[7] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.bitalign_curr_state[8] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.bitalign_curr_state[9] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.bitalign_curr_state[10] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.bitalign_curr_state[11] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.bitalign_curr_state[12] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.bitalign_curr_state[13] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.bitalign_curr_state[14] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.bitalign_curr_state[15] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.bitalign_curr_state[16] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.bitalign_curr_state[17] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.bitalign_curr_state[18] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.bitalign_curr_state[19] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.bitalign_curr_state[20] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.bitalign_curr_state[21] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.bitalign_curr_state[22] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.bitalign_curr_state[23] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.bitalign_curr_state[24] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.bitalign_curr_state[25] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.bitalign_curr_state[26] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.bitalign_curr_state[27] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.bitalign_curr_state[28] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.bitalign_curr_state[29] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":160:0:160:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.*.u_CoreRxIODBitAlign.early_flags_lsb[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[7] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[8] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[9] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[10] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[11] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[12] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[13] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[14] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[15] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[16] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[17] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[18] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[19] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[20] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[21] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[22] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[23] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[24] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[25] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[26] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[27] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[28] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[29] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[30] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[31] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[32] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[33] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[34] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[35] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[36] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[37] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[38] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[39] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[40] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[41] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[42] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[43] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[44] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[45] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[46] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[47] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[48] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[49] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[50] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[51] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[52] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[53] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[54] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[55] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[56] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[57] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[58] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[59] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[60] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[61] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[62] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[63] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[64] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[65] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[66] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[67] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[68] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[69] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[70] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[71] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[72] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[73] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[74] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[75] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[76] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[77] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[78] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[79] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[80] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[81] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[82] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[83] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[84] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[85] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[86] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[87] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[88] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[89] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[90] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[91] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[92] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[93] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[94] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[95] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[96] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[97] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[98] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[99] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[100] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[101] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[102] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[103] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[104] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[105] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[106] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[107] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[108] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[109] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[110] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[111] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[112] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[113] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[114] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[115] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[116] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[117] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[118] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[119] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[120] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[121] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[122] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[123] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[124] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[125] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[126] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[127] set_multicycle_path -setup 2 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.*.u_CoreRxIODBitAlign.bitalign_curr_state[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.*.u_CoreRxIODBitAlign.early_flags_msb[*] }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":162:0:162:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.*.u_CoreRxIODBitAlign.bitalign_curr_state[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.bitalign_curr_state[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.bitalign_curr_state[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.bitalign_curr_state[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.bitalign_curr_state[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.bitalign_curr_state[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.bitalign_curr_state[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.bitalign_curr_state[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.bitalign_curr_state[7] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.bitalign_curr_state[8] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.bitalign_curr_state[9] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.bitalign_curr_state[10] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.bitalign_curr_state[11] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.bitalign_curr_state[12] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.bitalign_curr_state[13] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.bitalign_curr_state[14] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.bitalign_curr_state[15] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.bitalign_curr_state[16] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.bitalign_curr_state[17] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.bitalign_curr_state[18] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.bitalign_curr_state[19] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.bitalign_curr_state[20] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.bitalign_curr_state[21] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.bitalign_curr_state[22] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.bitalign_curr_state[23] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.bitalign_curr_state[24] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.bitalign_curr_state[25] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.bitalign_curr_state[26] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.bitalign_curr_state[27] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.bitalign_curr_state[28] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.bitalign_curr_state[29] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":162:0:162:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.*.u_CoreRxIODBitAlign.early_flags_msb[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[7] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[8] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[9] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[10] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[11] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[12] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[13] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[14] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[15] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[16] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[17] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[18] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[19] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[20] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[21] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[22] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[23] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[24] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[25] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[26] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[27] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[28] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[29] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[30] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[31] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[32] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[33] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[34] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[35] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[36] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[37] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[38] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[39] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[40] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[41] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[42] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[43] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[44] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[45] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[46] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[47] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[48] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[49] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[50] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[51] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[52] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[53] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[54] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[55] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[56] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[57] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[58] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[59] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[60] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[61] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[62] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[63] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[64] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[65] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[66] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[67] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[68] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[69] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[70] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[71] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[72] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[73] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[74] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[75] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[76] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[77] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[78] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[79] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[80] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[81] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[82] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[83] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[84] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[85] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[86] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[87] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[88] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[89] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[90] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[91] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[92] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[93] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[94] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[95] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[96] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[97] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[98] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[99] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[100] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[101] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[102] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[103] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[104] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[105] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[106] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[107] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[108] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[109] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[110] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[111] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[112] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[113] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[114] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[115] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[116] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[117] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[118] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[119] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[120] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[121] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[122] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[123] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[124] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[125] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[126] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[127] set_multicycle_path -setup 2 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.*.u_CoreRxIODBitAlign.bitalign_curr_state[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.*.u_CoreRxIODBitAlign.late_flags_lsb[*] }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":156:0:156:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.*.u_CoreRxIODBitAlign.bitalign_curr_state[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.bitalign_curr_state[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.bitalign_curr_state[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.bitalign_curr_state[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.bitalign_curr_state[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.bitalign_curr_state[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.bitalign_curr_state[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.bitalign_curr_state[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.bitalign_curr_state[7] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.bitalign_curr_state[8] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.bitalign_curr_state[9] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.bitalign_curr_state[10] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.bitalign_curr_state[11] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.bitalign_curr_state[12] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.bitalign_curr_state[13] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.bitalign_curr_state[14] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.bitalign_curr_state[15] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.bitalign_curr_state[16] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.bitalign_curr_state[17] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.bitalign_curr_state[18] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.bitalign_curr_state[19] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.bitalign_curr_state[20] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.bitalign_curr_state[21] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.bitalign_curr_state[22] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.bitalign_curr_state[23] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.bitalign_curr_state[24] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.bitalign_curr_state[25] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.bitalign_curr_state[26] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.bitalign_curr_state[27] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.bitalign_curr_state[28] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.bitalign_curr_state[29] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":156:0:156:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.*.u_CoreRxIODBitAlign.late_flags_lsb[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[7] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[8] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[9] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[10] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[11] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[12] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[13] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[14] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[15] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[16] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[17] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[18] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[19] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[20] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[21] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[22] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[23] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[24] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[25] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[26] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[27] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[28] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[29] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[30] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[31] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[32] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[33] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[34] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[35] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[36] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[37] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[38] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[39] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[40] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[41] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[42] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[43] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[44] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[45] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[46] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[47] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[48] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[49] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[50] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[51] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[52] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[53] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[54] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[55] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[56] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[57] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[58] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[59] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[60] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[61] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[62] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[63] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[64] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[65] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[66] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[67] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[68] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[69] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[70] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[71] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[72] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[73] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[74] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[75] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[76] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[77] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[78] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[79] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[80] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[81] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[82] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[83] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[84] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[85] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[86] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[87] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[88] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[89] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[90] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[91] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[92] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[93] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[94] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[95] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[96] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[97] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[98] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[99] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[100] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[101] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[102] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[103] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[104] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[105] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[106] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[107] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[108] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[109] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[110] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[111] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[112] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[113] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[114] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[115] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[116] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[117] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[118] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[119] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[120] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[121] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[122] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[123] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[124] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[125] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[126] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[127] set_multicycle_path -setup 2 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.*.u_CoreRxIODBitAlign.bitalign_curr_state[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.*.u_CoreRxIODBitAlign.late_flags_msb[*] }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":158:0:158:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.*.u_CoreRxIODBitAlign.bitalign_curr_state[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.bitalign_curr_state[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.bitalign_curr_state[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.bitalign_curr_state[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.bitalign_curr_state[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.bitalign_curr_state[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.bitalign_curr_state[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.bitalign_curr_state[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.bitalign_curr_state[7] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.bitalign_curr_state[8] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.bitalign_curr_state[9] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.bitalign_curr_state[10] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.bitalign_curr_state[11] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.bitalign_curr_state[12] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.bitalign_curr_state[13] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.bitalign_curr_state[14] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.bitalign_curr_state[15] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.bitalign_curr_state[16] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.bitalign_curr_state[17] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.bitalign_curr_state[18] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.bitalign_curr_state[19] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.bitalign_curr_state[20] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.bitalign_curr_state[21] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.bitalign_curr_state[22] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.bitalign_curr_state[23] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.bitalign_curr_state[24] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.bitalign_curr_state[25] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.bitalign_curr_state[26] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.bitalign_curr_state[27] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.bitalign_curr_state[28] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.bitalign_curr_state[29] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":158:0:158:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.*.u_CoreRxIODBitAlign.late_flags_msb[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[7] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[8] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[9] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[10] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[11] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[12] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[13] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[14] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[15] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[16] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[17] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[18] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[19] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[20] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[21] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[22] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[23] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[24] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[25] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[26] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[27] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[28] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[29] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[30] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[31] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[32] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[33] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[34] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[35] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[36] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[37] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[38] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[39] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[40] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[41] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[42] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[43] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[44] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[45] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[46] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[47] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[48] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[49] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[50] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[51] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[52] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[53] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[54] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[55] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[56] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[57] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[58] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[59] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[60] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[61] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[62] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[63] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[64] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[65] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[66] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[67] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[68] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[69] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[70] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[71] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[72] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[73] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[74] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[75] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[76] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[77] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[78] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[79] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[80] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[81] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[82] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[83] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[84] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[85] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[86] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[87] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[88] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[89] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[90] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[91] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[92] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[93] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[94] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[95] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[96] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[97] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[98] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[99] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[100] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[101] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[102] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[103] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[104] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[105] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[106] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[107] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[108] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[109] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[110] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[111] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[112] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[113] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[114] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[115] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[116] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[117] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[118] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[119] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[120] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[121] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[122] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[123] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[124] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[125] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[126] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[127] set_multicycle_path -setup 2 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.*.u_CoreRxIODBitAlign.cnt[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.*.u_CoreRxIODBitAlign.early_flags_lsb[*] }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":168:0:168:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.*.u_CoreRxIODBitAlign.cnt[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.cnt[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.cnt[1] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":168:0:168:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.*.u_CoreRxIODBitAlign.early_flags_lsb[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[7] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[8] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[9] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[10] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[11] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[12] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[13] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[14] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[15] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[16] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[17] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[18] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[19] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[20] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[21] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[22] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[23] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[24] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[25] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[26] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[27] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[28] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[29] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[30] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[31] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[32] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[33] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[34] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[35] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[36] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[37] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[38] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[39] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[40] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[41] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[42] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[43] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[44] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[45] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[46] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[47] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[48] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[49] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[50] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[51] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[52] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[53] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[54] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[55] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[56] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[57] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[58] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[59] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[60] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[61] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[62] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[63] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[64] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[65] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[66] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[67] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[68] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[69] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[70] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[71] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[72] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[73] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[74] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[75] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[76] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[77] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[78] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[79] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[80] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[81] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[82] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[83] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[84] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[85] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[86] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[87] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[88] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[89] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[90] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[91] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[92] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[93] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[94] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[95] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[96] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[97] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[98] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[99] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[100] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[101] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[102] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[103] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[104] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[105] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[106] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[107] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[108] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[109] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[110] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[111] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[112] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[113] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[114] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[115] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[116] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[117] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[118] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[119] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[120] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[121] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[122] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[123] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[124] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[125] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[126] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_lsb[127] set_multicycle_path -setup 2 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.*.u_CoreRxIODBitAlign.cnt[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.*.u_CoreRxIODBitAlign.early_flags_msb[*] }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":170:0:170:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.*.u_CoreRxIODBitAlign.cnt[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.cnt[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.cnt[1] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":170:0:170:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.*.u_CoreRxIODBitAlign.early_flags_msb[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[7] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[8] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[9] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[10] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[11] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[12] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[13] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[14] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[15] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[16] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[17] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[18] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[19] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[20] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[21] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[22] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[23] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[24] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[25] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[26] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[27] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[28] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[29] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[30] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[31] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[32] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[33] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[34] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[35] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[36] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[37] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[38] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[39] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[40] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[41] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[42] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[43] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[44] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[45] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[46] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[47] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[48] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[49] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[50] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[51] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[52] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[53] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[54] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[55] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[56] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[57] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[58] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[59] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[60] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[61] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[62] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[63] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[64] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[65] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[66] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[67] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[68] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[69] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[70] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[71] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[72] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[73] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[74] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[75] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[76] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[77] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[78] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[79] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[80] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[81] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[82] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[83] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[84] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[85] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[86] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[87] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[88] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[89] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[90] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[91] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[92] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[93] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[94] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[95] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[96] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[97] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[98] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[99] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[100] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[101] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[102] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[103] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[104] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[105] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[106] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[107] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[108] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[109] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[110] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[111] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[112] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[113] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[114] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[115] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[116] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[117] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[118] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[119] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[120] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[121] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[122] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[123] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[124] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[125] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[126] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_flags_msb[127] set_multicycle_path -setup 2 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.*.u_CoreRxIODBitAlign.cnt[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.*.u_CoreRxIODBitAlign.late_flags_lsb[*] }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":164:0:164:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.*.u_CoreRxIODBitAlign.cnt[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.cnt[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.cnt[1] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":164:0:164:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.*.u_CoreRxIODBitAlign.late_flags_lsb[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[7] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[8] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[9] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[10] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[11] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[12] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[13] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[14] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[15] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[16] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[17] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[18] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[19] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[20] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[21] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[22] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[23] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[24] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[25] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[26] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[27] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[28] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[29] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[30] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[31] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[32] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[33] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[34] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[35] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[36] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[37] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[38] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[39] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[40] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[41] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[42] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[43] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[44] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[45] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[46] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[47] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[48] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[49] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[50] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[51] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[52] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[53] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[54] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[55] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[56] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[57] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[58] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[59] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[60] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[61] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[62] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[63] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[64] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[65] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[66] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[67] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[68] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[69] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[70] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[71] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[72] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[73] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[74] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[75] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[76] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[77] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[78] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[79] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[80] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[81] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[82] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[83] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[84] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[85] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[86] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[87] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[88] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[89] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[90] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[91] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[92] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[93] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[94] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[95] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[96] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[97] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[98] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[99] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[100] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[101] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[102] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[103] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[104] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[105] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[106] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[107] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[108] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[109] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[110] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[111] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[112] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[113] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[114] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[115] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[116] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[117] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[118] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[119] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[120] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[121] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[122] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[123] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[124] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[125] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[126] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_lsb[127] set_multicycle_path -setup 2 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.*.u_CoreRxIODBitAlign.cnt[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.*.u_CoreRxIODBitAlign.late_flags_msb[*] }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":166:0:166:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.*.u_CoreRxIODBitAlign.cnt[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.cnt[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.cnt[1] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":166:0:166:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.*.u_CoreRxIODBitAlign.late_flags_msb[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[7] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[8] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[9] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[10] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[11] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[12] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[13] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[14] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[15] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[16] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[17] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[18] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[19] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[20] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[21] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[22] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[23] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[24] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[25] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[26] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[27] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[28] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[29] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[30] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[31] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[32] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[33] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[34] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[35] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[36] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[37] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[38] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[39] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[40] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[41] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[42] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[43] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[44] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[45] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[46] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[47] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[48] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[49] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[50] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[51] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[52] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[53] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[54] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[55] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[56] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[57] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[58] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[59] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[60] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[61] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[62] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[63] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[64] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[65] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[66] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[67] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[68] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[69] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[70] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[71] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[72] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[73] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[74] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[75] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[76] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[77] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[78] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[79] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[80] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[81] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[82] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[83] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[84] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[85] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[86] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[87] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[88] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[89] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[90] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[91] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[92] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[93] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[94] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[95] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[96] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[97] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[98] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[99] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[100] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[101] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[102] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[103] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[104] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[105] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[106] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[107] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[108] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[109] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[110] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[111] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[112] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[113] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[114] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[115] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[116] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[117] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[118] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[119] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[120] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[121] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[122] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[123] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[124] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[125] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[126] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_flags_msb[127] set_multicycle_path -setup 2 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.*.u_CoreRxIODBitAlign.cnt[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.*.u_CoreRxIODBitAlign.tap_cnt[*] }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":154:0:154:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.*.u_CoreRxIODBitAlign.cnt[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.cnt[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.cnt[1] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":154:0:154:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.*.u_CoreRxIODBitAlign.tap_cnt[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.tap_cnt[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.tap_cnt[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.tap_cnt[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.tap_cnt[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.tap_cnt[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.tap_cnt[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.tap_cnt[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.tap_cnt[7] set_multicycle_path -setup 2 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.*.u_CoreRxIODBitAlign.early_found_lsb_d }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":116:0:116:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[7] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":116:0:116:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.*.u_CoreRxIODBitAlign.early_found_lsb_d }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_found_lsb_d set_multicycle_path -setup 2 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.*.u_CoreRxIODBitAlign.early_found_msb_d }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":118:0:118:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[7] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":118:0:118:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.*.u_CoreRxIODBitAlign.early_found_msb_d }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_found_msb_d set_multicycle_path -setup 2 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.*.u_CoreRxIODBitAlign.early_not_found_lsb_d }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":120:0:120:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[7] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":120:0:120:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.*.u_CoreRxIODBitAlign.early_not_found_lsb_d }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_not_found_lsb_d set_multicycle_path -setup 2 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.*.u_CoreRxIODBitAlign.early_not_found_msb_d }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":122:0:122:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[7] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":122:0:122:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.*.u_CoreRxIODBitAlign.early_not_found_msb_d }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_not_found_msb_d set_multicycle_path -setup 2 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.*.u_CoreRxIODBitAlign.late_found_lsb_d }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":112:0:112:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[7] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":112:0:112:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.*.u_CoreRxIODBitAlign.late_found_lsb_d }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_found_lsb_d set_multicycle_path -setup 2 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.*.u_CoreRxIODBitAlign.late_found_msb_d }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":114:0:114:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[7] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":114:0:114:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.*.u_CoreRxIODBitAlign.late_found_msb_d }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_found_msb_d set_multicycle_path -setup 2 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.*.u_CoreRxIODBitAlign.late_not_found_lsb_d }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":124:0:124:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[7] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":124:0:124:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.*.u_CoreRxIODBitAlign.late_not_found_lsb_d }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_not_found_lsb_d set_multicycle_path -setup 2 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.*.u_CoreRxIODBitAlign.late_not_found_msb_d }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":126:0:126:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[7] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":126:0:126:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.*.u_CoreRxIODBitAlign.late_not_found_msb_d }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_not_found_msb_d set_multicycle_path -setup 2 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.*.u_CoreRxIODBitAlign.bitalign_curr_state[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.*.u_CoreRxIODBitAlign.early_flags_lsb[*] }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":220:0:220:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.*.u_CoreRxIODBitAlign.bitalign_curr_state[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.bitalign_curr_state[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.bitalign_curr_state[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.bitalign_curr_state[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.bitalign_curr_state[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.bitalign_curr_state[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.bitalign_curr_state[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.bitalign_curr_state[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.bitalign_curr_state[7] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.bitalign_curr_state[8] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.bitalign_curr_state[9] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.bitalign_curr_state[10] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.bitalign_curr_state[11] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.bitalign_curr_state[12] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.bitalign_curr_state[13] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.bitalign_curr_state[14] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.bitalign_curr_state[15] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.bitalign_curr_state[16] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.bitalign_curr_state[17] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.bitalign_curr_state[18] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.bitalign_curr_state[19] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.bitalign_curr_state[20] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.bitalign_curr_state[21] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.bitalign_curr_state[22] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.bitalign_curr_state[23] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.bitalign_curr_state[24] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.bitalign_curr_state[25] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.bitalign_curr_state[26] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.bitalign_curr_state[27] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.bitalign_curr_state[28] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.bitalign_curr_state[29] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":220:0:220:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.*.u_CoreRxIODBitAlign.early_flags_lsb[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[7] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[8] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[9] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[10] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[11] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[12] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[13] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[14] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[15] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[16] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[17] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[18] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[19] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[20] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[21] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[22] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[23] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[24] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[25] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[26] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[27] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[28] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[29] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[30] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[31] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[32] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[33] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[34] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[35] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[36] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[37] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[38] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[39] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[40] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[41] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[42] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[43] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[44] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[45] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[46] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[47] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[48] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[49] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[50] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[51] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[52] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[53] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[54] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[55] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[56] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[57] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[58] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[59] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[60] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[61] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[62] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[63] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[64] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[65] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[66] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[67] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[68] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[69] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[70] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[71] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[72] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[73] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[74] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[75] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[76] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[77] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[78] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[79] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[80] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[81] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[82] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[83] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[84] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[85] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[86] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[87] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[88] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[89] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[90] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[91] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[92] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[93] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[94] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[95] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[96] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[97] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[98] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[99] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[100] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[101] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[102] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[103] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[104] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[105] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[106] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[107] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[108] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[109] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[110] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[111] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[112] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[113] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[114] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[115] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[116] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[117] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[118] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[119] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[120] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[121] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[122] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[123] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[124] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[125] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[126] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[127] set_multicycle_path -setup 2 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.*.u_CoreRxIODBitAlign.bitalign_curr_state[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.*.u_CoreRxIODBitAlign.early_flags_msb[*] }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":222:0:222:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.*.u_CoreRxIODBitAlign.bitalign_curr_state[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.bitalign_curr_state[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.bitalign_curr_state[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.bitalign_curr_state[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.bitalign_curr_state[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.bitalign_curr_state[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.bitalign_curr_state[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.bitalign_curr_state[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.bitalign_curr_state[7] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.bitalign_curr_state[8] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.bitalign_curr_state[9] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.bitalign_curr_state[10] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.bitalign_curr_state[11] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.bitalign_curr_state[12] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.bitalign_curr_state[13] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.bitalign_curr_state[14] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.bitalign_curr_state[15] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.bitalign_curr_state[16] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.bitalign_curr_state[17] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.bitalign_curr_state[18] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.bitalign_curr_state[19] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.bitalign_curr_state[20] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.bitalign_curr_state[21] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.bitalign_curr_state[22] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.bitalign_curr_state[23] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.bitalign_curr_state[24] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.bitalign_curr_state[25] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.bitalign_curr_state[26] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.bitalign_curr_state[27] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.bitalign_curr_state[28] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.bitalign_curr_state[29] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":222:0:222:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.*.u_CoreRxIODBitAlign.early_flags_msb[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[7] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[8] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[9] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[10] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[11] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[12] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[13] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[14] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[15] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[16] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[17] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[18] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[19] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[20] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[21] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[22] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[23] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[24] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[25] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[26] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[27] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[28] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[29] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[30] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[31] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[32] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[33] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[34] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[35] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[36] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[37] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[38] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[39] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[40] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[41] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[42] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[43] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[44] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[45] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[46] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[47] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[48] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[49] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[50] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[51] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[52] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[53] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[54] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[55] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[56] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[57] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[58] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[59] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[60] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[61] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[62] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[63] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[64] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[65] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[66] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[67] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[68] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[69] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[70] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[71] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[72] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[73] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[74] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[75] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[76] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[77] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[78] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[79] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[80] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[81] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[82] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[83] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[84] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[85] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[86] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[87] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[88] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[89] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[90] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[91] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[92] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[93] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[94] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[95] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[96] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[97] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[98] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[99] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[100] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[101] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[102] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[103] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[104] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[105] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[106] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[107] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[108] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[109] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[110] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[111] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[112] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[113] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[114] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[115] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[116] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[117] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[118] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[119] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[120] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[121] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[122] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[123] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[124] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[125] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[126] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[127] set_multicycle_path -setup 2 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.*.u_CoreRxIODBitAlign.bitalign_curr_state[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.*.u_CoreRxIODBitAlign.late_flags_lsb[*] }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":216:0:216:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.*.u_CoreRxIODBitAlign.bitalign_curr_state[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.bitalign_curr_state[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.bitalign_curr_state[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.bitalign_curr_state[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.bitalign_curr_state[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.bitalign_curr_state[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.bitalign_curr_state[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.bitalign_curr_state[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.bitalign_curr_state[7] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.bitalign_curr_state[8] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.bitalign_curr_state[9] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.bitalign_curr_state[10] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.bitalign_curr_state[11] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.bitalign_curr_state[12] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.bitalign_curr_state[13] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.bitalign_curr_state[14] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.bitalign_curr_state[15] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.bitalign_curr_state[16] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.bitalign_curr_state[17] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.bitalign_curr_state[18] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.bitalign_curr_state[19] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.bitalign_curr_state[20] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.bitalign_curr_state[21] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.bitalign_curr_state[22] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.bitalign_curr_state[23] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.bitalign_curr_state[24] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.bitalign_curr_state[25] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.bitalign_curr_state[26] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.bitalign_curr_state[27] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.bitalign_curr_state[28] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.bitalign_curr_state[29] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":216:0:216:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.*.u_CoreRxIODBitAlign.late_flags_lsb[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[7] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[8] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[9] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[10] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[11] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[12] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[13] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[14] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[15] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[16] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[17] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[18] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[19] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[20] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[21] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[22] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[23] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[24] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[25] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[26] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[27] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[28] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[29] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[30] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[31] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[32] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[33] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[34] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[35] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[36] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[37] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[38] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[39] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[40] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[41] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[42] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[43] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[44] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[45] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[46] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[47] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[48] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[49] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[50] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[51] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[52] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[53] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[54] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[55] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[56] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[57] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[58] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[59] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[60] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[61] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[62] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[63] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[64] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[65] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[66] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[67] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[68] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[69] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[70] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[71] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[72] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[73] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[74] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[75] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[76] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[77] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[78] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[79] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[80] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[81] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[82] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[83] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[84] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[85] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[86] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[87] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[88] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[89] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[90] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[91] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[92] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[93] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[94] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[95] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[96] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[97] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[98] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[99] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[100] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[101] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[102] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[103] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[104] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[105] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[106] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[107] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[108] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[109] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[110] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[111] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[112] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[113] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[114] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[115] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[116] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[117] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[118] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[119] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[120] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[121] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[122] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[123] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[124] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[125] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[126] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[127] set_multicycle_path -setup 2 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.*.u_CoreRxIODBitAlign.bitalign_curr_state[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.*.u_CoreRxIODBitAlign.late_flags_msb[*] }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":218:0:218:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.*.u_CoreRxIODBitAlign.bitalign_curr_state[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.bitalign_curr_state[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.bitalign_curr_state[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.bitalign_curr_state[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.bitalign_curr_state[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.bitalign_curr_state[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.bitalign_curr_state[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.bitalign_curr_state[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.bitalign_curr_state[7] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.bitalign_curr_state[8] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.bitalign_curr_state[9] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.bitalign_curr_state[10] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.bitalign_curr_state[11] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.bitalign_curr_state[12] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.bitalign_curr_state[13] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.bitalign_curr_state[14] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.bitalign_curr_state[15] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.bitalign_curr_state[16] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.bitalign_curr_state[17] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.bitalign_curr_state[18] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.bitalign_curr_state[19] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.bitalign_curr_state[20] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.bitalign_curr_state[21] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.bitalign_curr_state[22] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.bitalign_curr_state[23] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.bitalign_curr_state[24] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.bitalign_curr_state[25] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.bitalign_curr_state[26] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.bitalign_curr_state[27] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.bitalign_curr_state[28] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.bitalign_curr_state[29] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":218:0:218:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.*.u_CoreRxIODBitAlign.late_flags_msb[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[7] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[8] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[9] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[10] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[11] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[12] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[13] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[14] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[15] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[16] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[17] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[18] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[19] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[20] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[21] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[22] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[23] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[24] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[25] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[26] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[27] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[28] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[29] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[30] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[31] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[32] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[33] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[34] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[35] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[36] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[37] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[38] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[39] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[40] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[41] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[42] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[43] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[44] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[45] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[46] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[47] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[48] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[49] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[50] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[51] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[52] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[53] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[54] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[55] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[56] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[57] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[58] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[59] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[60] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[61] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[62] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[63] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[64] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[65] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[66] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[67] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[68] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[69] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[70] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[71] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[72] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[73] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[74] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[75] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[76] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[77] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[78] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[79] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[80] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[81] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[82] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[83] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[84] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[85] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[86] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[87] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[88] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[89] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[90] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[91] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[92] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[93] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[94] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[95] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[96] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[97] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[98] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[99] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[100] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[101] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[102] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[103] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[104] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[105] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[106] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[107] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[108] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[109] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[110] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[111] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[112] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[113] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[114] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[115] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[116] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[117] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[118] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[119] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[120] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[121] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[122] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[123] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[124] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[125] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[126] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[127] set_multicycle_path -setup 2 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.*.u_CoreRxIODBitAlign.cnt[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.*.u_CoreRxIODBitAlign.early_flags_lsb[*] }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":228:0:228:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.*.u_CoreRxIODBitAlign.cnt[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.cnt[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.cnt[1] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":228:0:228:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.*.u_CoreRxIODBitAlign.early_flags_lsb[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[7] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[8] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[9] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[10] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[11] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[12] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[13] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[14] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[15] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[16] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[17] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[18] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[19] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[20] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[21] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[22] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[23] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[24] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[25] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[26] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[27] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[28] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[29] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[30] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[31] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[32] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[33] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[34] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[35] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[36] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[37] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[38] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[39] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[40] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[41] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[42] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[43] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[44] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[45] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[46] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[47] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[48] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[49] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[50] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[51] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[52] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[53] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[54] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[55] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[56] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[57] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[58] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[59] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[60] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[61] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[62] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[63] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[64] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[65] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[66] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[67] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[68] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[69] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[70] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[71] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[72] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[73] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[74] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[75] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[76] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[77] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[78] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[79] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[80] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[81] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[82] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[83] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[84] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[85] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[86] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[87] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[88] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[89] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[90] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[91] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[92] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[93] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[94] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[95] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[96] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[97] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[98] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[99] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[100] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[101] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[102] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[103] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[104] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[105] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[106] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[107] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[108] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[109] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[110] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[111] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[112] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[113] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[114] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[115] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[116] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[117] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[118] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[119] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[120] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[121] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[122] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[123] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[124] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[125] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[126] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_lsb[127] set_multicycle_path -setup 2 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.*.u_CoreRxIODBitAlign.cnt[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.*.u_CoreRxIODBitAlign.early_flags_msb[*] }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":230:0:230:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.*.u_CoreRxIODBitAlign.cnt[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.cnt[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.cnt[1] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":230:0:230:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.*.u_CoreRxIODBitAlign.early_flags_msb[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[7] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[8] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[9] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[10] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[11] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[12] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[13] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[14] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[15] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[16] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[17] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[18] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[19] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[20] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[21] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[22] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[23] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[24] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[25] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[26] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[27] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[28] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[29] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[30] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[31] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[32] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[33] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[34] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[35] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[36] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[37] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[38] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[39] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[40] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[41] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[42] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[43] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[44] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[45] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[46] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[47] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[48] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[49] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[50] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[51] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[52] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[53] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[54] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[55] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[56] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[57] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[58] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[59] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[60] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[61] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[62] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[63] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[64] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[65] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[66] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[67] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[68] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[69] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[70] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[71] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[72] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[73] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[74] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[75] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[76] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[77] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[78] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[79] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[80] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[81] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[82] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[83] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[84] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[85] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[86] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[87] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[88] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[89] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[90] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[91] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[92] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[93] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[94] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[95] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[96] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[97] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[98] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[99] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[100] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[101] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[102] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[103] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[104] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[105] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[106] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[107] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[108] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[109] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[110] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[111] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[112] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[113] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[114] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[115] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[116] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[117] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[118] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[119] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[120] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[121] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[122] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[123] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[124] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[125] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[126] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_flags_msb[127] set_multicycle_path -setup 2 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.*.u_CoreRxIODBitAlign.cnt[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.*.u_CoreRxIODBitAlign.late_flags_lsb[*] }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":224:0:224:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.*.u_CoreRxIODBitAlign.cnt[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.cnt[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.cnt[1] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":224:0:224:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.*.u_CoreRxIODBitAlign.late_flags_lsb[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[7] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[8] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[9] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[10] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[11] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[12] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[13] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[14] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[15] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[16] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[17] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[18] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[19] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[20] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[21] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[22] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[23] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[24] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[25] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[26] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[27] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[28] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[29] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[30] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[31] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[32] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[33] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[34] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[35] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[36] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[37] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[38] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[39] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[40] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[41] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[42] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[43] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[44] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[45] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[46] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[47] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[48] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[49] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[50] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[51] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[52] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[53] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[54] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[55] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[56] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[57] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[58] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[59] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[60] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[61] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[62] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[63] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[64] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[65] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[66] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[67] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[68] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[69] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[70] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[71] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[72] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[73] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[74] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[75] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[76] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[77] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[78] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[79] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[80] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[81] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[82] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[83] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[84] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[85] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[86] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[87] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[88] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[89] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[90] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[91] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[92] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[93] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[94] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[95] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[96] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[97] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[98] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[99] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[100] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[101] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[102] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[103] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[104] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[105] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[106] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[107] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[108] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[109] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[110] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[111] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[112] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[113] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[114] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[115] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[116] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[117] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[118] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[119] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[120] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[121] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[122] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[123] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[124] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[125] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[126] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_lsb[127] set_multicycle_path -setup 2 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.*.u_CoreRxIODBitAlign.cnt[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.*.u_CoreRxIODBitAlign.late_flags_msb[*] }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":226:0:226:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.*.u_CoreRxIODBitAlign.cnt[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.cnt[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.cnt[1] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":226:0:226:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.*.u_CoreRxIODBitAlign.late_flags_msb[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[7] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[8] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[9] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[10] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[11] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[12] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[13] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[14] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[15] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[16] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[17] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[18] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[19] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[20] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[21] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[22] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[23] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[24] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[25] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[26] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[27] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[28] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[29] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[30] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[31] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[32] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[33] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[34] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[35] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[36] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[37] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[38] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[39] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[40] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[41] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[42] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[43] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[44] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[45] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[46] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[47] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[48] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[49] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[50] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[51] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[52] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[53] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[54] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[55] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[56] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[57] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[58] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[59] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[60] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[61] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[62] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[63] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[64] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[65] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[66] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[67] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[68] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[69] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[70] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[71] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[72] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[73] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[74] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[75] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[76] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[77] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[78] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[79] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[80] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[81] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[82] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[83] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[84] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[85] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[86] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[87] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[88] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[89] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[90] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[91] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[92] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[93] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[94] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[95] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[96] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[97] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[98] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[99] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[100] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[101] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[102] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[103] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[104] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[105] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[106] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[107] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[108] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[109] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[110] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[111] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[112] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[113] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[114] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[115] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[116] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[117] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[118] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[119] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[120] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[121] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[122] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[123] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[124] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[125] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[126] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_flags_msb[127] set_multicycle_path -setup 2 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.*.u_CoreRxIODBitAlign.cnt[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.*.u_CoreRxIODBitAlign.tap_cnt[*] }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":214:0:214:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.*.u_CoreRxIODBitAlign.cnt[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.cnt[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.cnt[1] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":214:0:214:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.*.u_CoreRxIODBitAlign.tap_cnt[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.tap_cnt[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.tap_cnt[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.tap_cnt[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.tap_cnt[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.tap_cnt[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.tap_cnt[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.tap_cnt[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.tap_cnt[7] set_multicycle_path -setup 2 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.*.u_CoreRxIODBitAlign.early_found_lsb_d }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":176:0:176:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[7] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":176:0:176:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.*.u_CoreRxIODBitAlign.early_found_lsb_d }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_found_lsb_d set_multicycle_path -setup 2 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.*.u_CoreRxIODBitAlign.early_found_msb_d }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":178:0:178:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[7] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":178:0:178:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.*.u_CoreRxIODBitAlign.early_found_msb_d }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_found_msb_d set_multicycle_path -setup 2 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.*.u_CoreRxIODBitAlign.early_not_found_lsb_d }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":180:0:180:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[7] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":180:0:180:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.*.u_CoreRxIODBitAlign.early_not_found_lsb_d }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_not_found_lsb_d set_multicycle_path -setup 2 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.*.u_CoreRxIODBitAlign.early_not_found_msb_d }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":182:0:182:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[7] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":182:0:182:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.*.u_CoreRxIODBitAlign.early_not_found_msb_d }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_not_found_msb_d set_multicycle_path -setup 2 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.*.u_CoreRxIODBitAlign.late_found_lsb_d }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":172:0:172:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[7] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":172:0:172:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.*.u_CoreRxIODBitAlign.late_found_lsb_d }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_found_lsb_d set_multicycle_path -setup 2 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.*.u_CoreRxIODBitAlign.late_found_msb_d }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":174:0:174:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[7] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":174:0:174:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.*.u_CoreRxIODBitAlign.late_found_msb_d }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_found_msb_d set_multicycle_path -setup 2 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.*.u_CoreRxIODBitAlign.late_not_found_lsb_d }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":184:0:184:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[7] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":184:0:184:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.*.u_CoreRxIODBitAlign.late_not_found_lsb_d }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_not_found_lsb_d set_multicycle_path -setup 2 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.*.u_CoreRxIODBitAlign.late_not_found_msb_d }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":186:0:186:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[7] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":186:0:186:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.*.u_CoreRxIODBitAlign.late_not_found_msb_d }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_not_found_msb_d set_multicycle_path -setup 2 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.*.u_CoreRxIODBitAlign.bitalign_curr_state[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.*.u_CoreRxIODBitAlign.early_flags_lsb[*] }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":280:0:280:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.*.u_CoreRxIODBitAlign.bitalign_curr_state[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.bitalign_curr_state[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.bitalign_curr_state[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.bitalign_curr_state[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.bitalign_curr_state[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.bitalign_curr_state[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.bitalign_curr_state[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.bitalign_curr_state[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.bitalign_curr_state[7] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.bitalign_curr_state[8] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.bitalign_curr_state[9] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.bitalign_curr_state[10] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.bitalign_curr_state[11] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.bitalign_curr_state[12] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.bitalign_curr_state[13] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.bitalign_curr_state[14] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.bitalign_curr_state[15] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.bitalign_curr_state[16] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.bitalign_curr_state[17] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.bitalign_curr_state[18] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.bitalign_curr_state[19] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.bitalign_curr_state[20] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.bitalign_curr_state[21] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.bitalign_curr_state[22] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.bitalign_curr_state[23] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.bitalign_curr_state[24] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.bitalign_curr_state[25] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.bitalign_curr_state[26] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.bitalign_curr_state[27] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.bitalign_curr_state[28] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.bitalign_curr_state[29] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":280:0:280:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.*.u_CoreRxIODBitAlign.early_flags_lsb[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[7] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[8] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[9] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[10] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[11] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[12] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[13] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[14] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[15] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[16] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[17] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[18] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[19] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[20] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[21] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[22] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[23] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[24] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[25] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[26] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[27] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[28] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[29] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[30] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[31] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[32] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[33] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[34] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[35] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[36] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[37] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[38] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[39] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[40] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[41] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[42] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[43] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[44] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[45] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[46] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[47] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[48] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[49] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[50] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[51] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[52] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[53] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[54] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[55] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[56] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[57] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[58] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[59] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[60] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[61] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[62] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[63] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[64] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[65] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[66] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[67] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[68] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[69] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[70] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[71] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[72] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[73] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[74] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[75] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[76] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[77] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[78] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[79] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[80] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[81] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[82] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[83] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[84] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[85] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[86] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[87] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[88] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[89] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[90] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[91] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[92] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[93] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[94] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[95] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[96] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[97] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[98] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[99] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[100] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[101] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[102] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[103] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[104] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[105] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[106] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[107] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[108] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[109] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[110] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[111] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[112] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[113] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[114] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[115] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[116] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[117] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[118] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[119] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[120] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[121] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[122] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[123] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[124] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[125] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[126] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[127] set_multicycle_path -setup 2 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.*.u_CoreRxIODBitAlign.bitalign_curr_state[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.*.u_CoreRxIODBitAlign.early_flags_msb[*] }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":282:0:282:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.*.u_CoreRxIODBitAlign.bitalign_curr_state[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.bitalign_curr_state[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.bitalign_curr_state[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.bitalign_curr_state[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.bitalign_curr_state[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.bitalign_curr_state[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.bitalign_curr_state[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.bitalign_curr_state[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.bitalign_curr_state[7] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.bitalign_curr_state[8] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.bitalign_curr_state[9] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.bitalign_curr_state[10] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.bitalign_curr_state[11] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.bitalign_curr_state[12] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.bitalign_curr_state[13] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.bitalign_curr_state[14] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.bitalign_curr_state[15] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.bitalign_curr_state[16] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.bitalign_curr_state[17] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.bitalign_curr_state[18] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.bitalign_curr_state[19] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.bitalign_curr_state[20] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.bitalign_curr_state[21] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.bitalign_curr_state[22] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.bitalign_curr_state[23] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.bitalign_curr_state[24] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.bitalign_curr_state[25] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.bitalign_curr_state[26] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.bitalign_curr_state[27] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.bitalign_curr_state[28] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.bitalign_curr_state[29] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":282:0:282:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.*.u_CoreRxIODBitAlign.early_flags_msb[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[7] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[8] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[9] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[10] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[11] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[12] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[13] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[14] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[15] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[16] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[17] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[18] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[19] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[20] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[21] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[22] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[23] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[24] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[25] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[26] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[27] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[28] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[29] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[30] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[31] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[32] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[33] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[34] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[35] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[36] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[37] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[38] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[39] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[40] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[41] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[42] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[43] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[44] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[45] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[46] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[47] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[48] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[49] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[50] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[51] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[52] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[53] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[54] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[55] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[56] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[57] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[58] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[59] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[60] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[61] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[62] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[63] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[64] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[65] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[66] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[67] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[68] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[69] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[70] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[71] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[72] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[73] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[74] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[75] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[76] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[77] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[78] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[79] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[80] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[81] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[82] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[83] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[84] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[85] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[86] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[87] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[88] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[89] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[90] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[91] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[92] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[93] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[94] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[95] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[96] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[97] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[98] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[99] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[100] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[101] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[102] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[103] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[104] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[105] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[106] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[107] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[108] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[109] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[110] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[111] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[112] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[113] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[114] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[115] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[116] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[117] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[118] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[119] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[120] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[121] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[122] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[123] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[124] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[125] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[126] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[127] set_multicycle_path -setup 2 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.*.u_CoreRxIODBitAlign.bitalign_curr_state[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.*.u_CoreRxIODBitAlign.late_flags_lsb[*] }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":276:0:276:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.*.u_CoreRxIODBitAlign.bitalign_curr_state[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.bitalign_curr_state[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.bitalign_curr_state[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.bitalign_curr_state[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.bitalign_curr_state[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.bitalign_curr_state[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.bitalign_curr_state[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.bitalign_curr_state[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.bitalign_curr_state[7] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.bitalign_curr_state[8] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.bitalign_curr_state[9] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.bitalign_curr_state[10] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.bitalign_curr_state[11] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.bitalign_curr_state[12] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.bitalign_curr_state[13] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.bitalign_curr_state[14] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.bitalign_curr_state[15] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.bitalign_curr_state[16] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.bitalign_curr_state[17] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.bitalign_curr_state[18] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.bitalign_curr_state[19] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.bitalign_curr_state[20] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.bitalign_curr_state[21] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.bitalign_curr_state[22] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.bitalign_curr_state[23] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.bitalign_curr_state[24] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.bitalign_curr_state[25] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.bitalign_curr_state[26] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.bitalign_curr_state[27] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.bitalign_curr_state[28] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.bitalign_curr_state[29] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":276:0:276:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.*.u_CoreRxIODBitAlign.late_flags_lsb[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[7] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[8] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[9] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[10] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[11] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[12] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[13] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[14] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[15] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[16] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[17] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[18] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[19] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[20] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[21] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[22] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[23] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[24] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[25] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[26] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[27] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[28] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[29] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[30] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[31] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[32] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[33] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[34] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[35] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[36] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[37] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[38] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[39] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[40] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[41] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[42] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[43] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[44] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[45] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[46] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[47] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[48] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[49] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[50] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[51] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[52] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[53] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[54] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[55] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[56] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[57] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[58] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[59] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[60] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[61] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[62] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[63] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[64] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[65] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[66] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[67] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[68] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[69] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[70] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[71] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[72] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[73] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[74] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[75] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[76] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[77] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[78] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[79] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[80] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[81] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[82] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[83] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[84] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[85] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[86] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[87] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[88] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[89] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[90] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[91] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[92] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[93] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[94] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[95] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[96] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[97] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[98] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[99] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[100] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[101] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[102] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[103] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[104] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[105] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[106] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[107] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[108] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[109] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[110] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[111] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[112] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[113] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[114] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[115] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[116] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[117] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[118] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[119] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[120] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[121] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[122] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[123] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[124] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[125] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[126] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[127] set_multicycle_path -setup 2 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.*.u_CoreRxIODBitAlign.bitalign_curr_state[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.*.u_CoreRxIODBitAlign.late_flags_msb[*] }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":278:0:278:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.*.u_CoreRxIODBitAlign.bitalign_curr_state[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.bitalign_curr_state[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.bitalign_curr_state[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.bitalign_curr_state[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.bitalign_curr_state[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.bitalign_curr_state[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.bitalign_curr_state[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.bitalign_curr_state[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.bitalign_curr_state[7] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.bitalign_curr_state[8] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.bitalign_curr_state[9] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.bitalign_curr_state[10] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.bitalign_curr_state[11] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.bitalign_curr_state[12] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.bitalign_curr_state[13] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.bitalign_curr_state[14] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.bitalign_curr_state[15] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.bitalign_curr_state[16] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.bitalign_curr_state[17] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.bitalign_curr_state[18] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.bitalign_curr_state[19] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.bitalign_curr_state[20] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.bitalign_curr_state[21] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.bitalign_curr_state[22] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.bitalign_curr_state[23] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.bitalign_curr_state[24] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.bitalign_curr_state[25] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.bitalign_curr_state[26] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.bitalign_curr_state[27] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.bitalign_curr_state[28] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.bitalign_curr_state[29] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":278:0:278:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.*.u_CoreRxIODBitAlign.late_flags_msb[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[7] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[8] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[9] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[10] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[11] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[12] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[13] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[14] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[15] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[16] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[17] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[18] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[19] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[20] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[21] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[22] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[23] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[24] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[25] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[26] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[27] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[28] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[29] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[30] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[31] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[32] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[33] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[34] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[35] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[36] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[37] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[38] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[39] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[40] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[41] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[42] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[43] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[44] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[45] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[46] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[47] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[48] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[49] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[50] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[51] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[52] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[53] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[54] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[55] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[56] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[57] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[58] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[59] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[60] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[61] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[62] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[63] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[64] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[65] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[66] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[67] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[68] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[69] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[70] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[71] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[72] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[73] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[74] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[75] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[76] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[77] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[78] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[79] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[80] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[81] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[82] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[83] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[84] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[85] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[86] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[87] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[88] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[89] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[90] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[91] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[92] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[93] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[94] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[95] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[96] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[97] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[98] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[99] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[100] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[101] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[102] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[103] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[104] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[105] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[106] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[107] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[108] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[109] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[110] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[111] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[112] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[113] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[114] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[115] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[116] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[117] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[118] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[119] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[120] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[121] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[122] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[123] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[124] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[125] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[126] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[127] set_multicycle_path -setup 2 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.*.u_CoreRxIODBitAlign.cnt[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.*.u_CoreRxIODBitAlign.early_flags_lsb[*] }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":288:0:288:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.*.u_CoreRxIODBitAlign.cnt[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.cnt[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.cnt[1] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":288:0:288:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.*.u_CoreRxIODBitAlign.early_flags_lsb[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[7] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[8] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[9] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[10] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[11] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[12] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[13] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[14] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[15] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[16] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[17] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[18] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[19] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[20] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[21] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[22] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[23] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[24] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[25] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[26] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[27] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[28] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[29] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[30] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[31] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[32] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[33] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[34] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[35] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[36] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[37] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[38] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[39] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[40] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[41] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[42] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[43] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[44] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[45] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[46] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[47] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[48] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[49] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[50] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[51] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[52] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[53] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[54] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[55] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[56] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[57] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[58] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[59] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[60] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[61] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[62] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[63] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[64] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[65] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[66] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[67] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[68] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[69] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[70] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[71] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[72] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[73] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[74] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[75] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[76] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[77] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[78] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[79] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[80] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[81] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[82] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[83] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[84] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[85] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[86] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[87] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[88] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[89] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[90] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[91] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[92] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[93] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[94] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[95] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[96] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[97] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[98] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[99] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[100] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[101] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[102] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[103] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[104] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[105] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[106] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[107] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[108] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[109] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[110] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[111] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[112] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[113] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[114] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[115] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[116] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[117] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[118] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[119] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[120] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[121] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[122] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[123] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[124] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[125] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[126] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_lsb[127] set_multicycle_path -setup 2 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.*.u_CoreRxIODBitAlign.cnt[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.*.u_CoreRxIODBitAlign.early_flags_msb[*] }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":290:0:290:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.*.u_CoreRxIODBitAlign.cnt[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.cnt[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.cnt[1] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":290:0:290:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.*.u_CoreRxIODBitAlign.early_flags_msb[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[7] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[8] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[9] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[10] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[11] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[12] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[13] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[14] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[15] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[16] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[17] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[18] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[19] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[20] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[21] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[22] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[23] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[24] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[25] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[26] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[27] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[28] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[29] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[30] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[31] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[32] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[33] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[34] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[35] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[36] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[37] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[38] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[39] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[40] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[41] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[42] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[43] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[44] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[45] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[46] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[47] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[48] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[49] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[50] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[51] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[52] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[53] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[54] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[55] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[56] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[57] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[58] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[59] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[60] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[61] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[62] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[63] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[64] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[65] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[66] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[67] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[68] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[69] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[70] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[71] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[72] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[73] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[74] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[75] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[76] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[77] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[78] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[79] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[80] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[81] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[82] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[83] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[84] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[85] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[86] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[87] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[88] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[89] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[90] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[91] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[92] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[93] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[94] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[95] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[96] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[97] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[98] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[99] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[100] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[101] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[102] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[103] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[104] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[105] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[106] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[107] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[108] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[109] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[110] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[111] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[112] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[113] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[114] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[115] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[116] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[117] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[118] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[119] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[120] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[121] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[122] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[123] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[124] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[125] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[126] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_flags_msb[127] set_multicycle_path -setup 2 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.*.u_CoreRxIODBitAlign.cnt[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.*.u_CoreRxIODBitAlign.late_flags_lsb[*] }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":284:0:284:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.*.u_CoreRxIODBitAlign.cnt[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.cnt[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.cnt[1] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":284:0:284:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.*.u_CoreRxIODBitAlign.late_flags_lsb[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[7] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[8] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[9] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[10] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[11] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[12] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[13] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[14] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[15] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[16] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[17] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[18] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[19] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[20] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[21] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[22] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[23] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[24] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[25] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[26] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[27] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[28] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[29] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[30] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[31] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[32] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[33] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[34] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[35] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[36] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[37] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[38] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[39] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[40] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[41] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[42] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[43] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[44] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[45] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[46] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[47] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[48] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[49] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[50] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[51] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[52] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[53] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[54] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[55] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[56] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[57] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[58] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[59] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[60] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[61] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[62] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[63] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[64] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[65] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[66] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[67] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[68] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[69] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[70] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[71] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[72] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[73] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[74] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[75] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[76] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[77] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[78] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[79] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[80] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[81] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[82] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[83] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[84] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[85] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[86] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[87] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[88] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[89] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[90] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[91] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[92] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[93] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[94] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[95] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[96] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[97] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[98] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[99] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[100] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[101] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[102] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[103] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[104] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[105] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[106] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[107] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[108] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[109] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[110] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[111] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[112] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[113] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[114] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[115] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[116] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[117] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[118] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[119] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[120] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[121] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[122] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[123] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[124] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[125] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[126] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_lsb[127] set_multicycle_path -setup 2 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.*.u_CoreRxIODBitAlign.cnt[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.*.u_CoreRxIODBitAlign.late_flags_msb[*] }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":286:0:286:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.*.u_CoreRxIODBitAlign.cnt[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.cnt[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.cnt[1] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":286:0:286:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.*.u_CoreRxIODBitAlign.late_flags_msb[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[7] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[8] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[9] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[10] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[11] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[12] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[13] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[14] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[15] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[16] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[17] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[18] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[19] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[20] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[21] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[22] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[23] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[24] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[25] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[26] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[27] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[28] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[29] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[30] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[31] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[32] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[33] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[34] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[35] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[36] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[37] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[38] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[39] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[40] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[41] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[42] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[43] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[44] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[45] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[46] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[47] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[48] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[49] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[50] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[51] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[52] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[53] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[54] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[55] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[56] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[57] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[58] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[59] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[60] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[61] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[62] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[63] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[64] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[65] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[66] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[67] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[68] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[69] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[70] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[71] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[72] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[73] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[74] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[75] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[76] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[77] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[78] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[79] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[80] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[81] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[82] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[83] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[84] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[85] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[86] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[87] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[88] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[89] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[90] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[91] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[92] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[93] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[94] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[95] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[96] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[97] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[98] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[99] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[100] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[101] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[102] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[103] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[104] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[105] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[106] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[107] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[108] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[109] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[110] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[111] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[112] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[113] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[114] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[115] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[116] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[117] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[118] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[119] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[120] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[121] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[122] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[123] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[124] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[125] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[126] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_flags_msb[127] set_multicycle_path -setup 2 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.*.u_CoreRxIODBitAlign.cnt[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.*.u_CoreRxIODBitAlign.tap_cnt[*] }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":274:0:274:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.*.u_CoreRxIODBitAlign.cnt[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.cnt[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.cnt[1] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":274:0:274:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.*.u_CoreRxIODBitAlign.tap_cnt[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.tap_cnt[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.tap_cnt[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.tap_cnt[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.tap_cnt[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.tap_cnt[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.tap_cnt[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.tap_cnt[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.tap_cnt[7] set_multicycle_path -setup 2 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.*.u_CoreRxIODBitAlign.early_found_lsb_d }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":236:0:236:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[7] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":236:0:236:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.*.u_CoreRxIODBitAlign.early_found_lsb_d }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_found_lsb_d set_multicycle_path -setup 2 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.*.u_CoreRxIODBitAlign.early_found_msb_d }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":238:0:238:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[7] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":238:0:238:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.*.u_CoreRxIODBitAlign.early_found_msb_d }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_found_msb_d set_multicycle_path -setup 2 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.*.u_CoreRxIODBitAlign.early_not_found_lsb_d }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":240:0:240:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[7] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":240:0:240:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.*.u_CoreRxIODBitAlign.early_not_found_lsb_d }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_not_found_lsb_d set_multicycle_path -setup 2 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.*.u_CoreRxIODBitAlign.early_not_found_msb_d }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":242:0:242:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[7] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":242:0:242:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.*.u_CoreRxIODBitAlign.early_not_found_msb_d }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_not_found_msb_d set_multicycle_path -setup 2 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.*.u_CoreRxIODBitAlign.late_found_lsb_d }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":232:0:232:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[7] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":232:0:232:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.*.u_CoreRxIODBitAlign.late_found_lsb_d }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_found_lsb_d set_multicycle_path -setup 2 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.*.u_CoreRxIODBitAlign.late_found_msb_d }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":234:0:234:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[7] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":234:0:234:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.*.u_CoreRxIODBitAlign.late_found_msb_d }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_found_msb_d set_multicycle_path -setup 2 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.*.u_CoreRxIODBitAlign.late_not_found_lsb_d }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":244:0:244:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[7] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":244:0:244:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.*.u_CoreRxIODBitAlign.late_not_found_lsb_d }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_not_found_lsb_d set_multicycle_path -setup 2 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.*.u_CoreRxIODBitAlign.late_not_found_msb_d }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":246:0:246:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[7] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":246:0:246:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.*.u_CoreRxIODBitAlign.late_not_found_msb_d }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_not_found_msb_d set_multicycle_path -setup 2 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.RX_CLK_ALIGN_CLR_FLGS }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":380:0:380:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[5] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":380:0:380:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.RX_CLK_ALIGN_CLR_FLGS }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.RX_CLK_ALIGN_CLR_FLGS set_multicycle_path -setup 2 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.RX_CLK_ALIGN_LOAD }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":376:0:376:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[5] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":376:0:376:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.RX_CLK_ALIGN_LOAD }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.RX_CLK_ALIGN_LOAD set_multicycle_path -setup 2 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.RX_CLK_ALIGN_MOVE }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":374:0:374:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[5] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":374:0:374:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.RX_CLK_ALIGN_MOVE }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.RX_CLK_ALIGN_MOVE set_multicycle_path -setup 2 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.RX_RESET_LANE }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":378:0:378:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[5] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":378:0:378:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.RX_RESET_LANE }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.RX_RESET_LANE set_multicycle_path -setup 2 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.calc_done }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":384:0:384:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[5] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":384:0:384:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.calc_done }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.calc_done set_multicycle_path -setup 2 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.clk_align_done }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":388:0:388:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[5] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":388:0:388:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.clk_align_done }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clk_align_done set_multicycle_path -setup 2 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.early_flags_lsb[*] }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":324:0:324:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[5] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":324:0:324:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.early_flags_lsb[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[7] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[8] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[9] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[10] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[11] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[12] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[13] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[14] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[15] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[16] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[17] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[18] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[19] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[20] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[21] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[22] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[23] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[24] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[25] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[26] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[27] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[28] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[29] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[30] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[31] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[32] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[33] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[34] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[35] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[36] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[37] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[38] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[39] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[40] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[41] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[42] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[43] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[44] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[45] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[46] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[47] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[48] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[49] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[50] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[51] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[52] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[53] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[54] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[55] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[56] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[57] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[58] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[59] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[60] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[61] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[62] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[63] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[64] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[65] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[66] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[67] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[68] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[69] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[70] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[71] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[72] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[73] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[74] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[75] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[76] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[77] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[78] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[79] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[80] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[81] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[82] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[83] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[84] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[85] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[86] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[87] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[88] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[89] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[90] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[91] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[92] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[93] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[94] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[95] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[96] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[97] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[98] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[99] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[100] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[101] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[102] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[103] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[104] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[105] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[106] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[107] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[108] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[109] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[110] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[111] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[112] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[113] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[114] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[115] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[116] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[117] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[118] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[119] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[120] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[121] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[122] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[123] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[124] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[125] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[126] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[127] set_multicycle_path -setup 2 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.early_flags_msb[*] }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":326:0:326:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[5] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":326:0:326:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.early_flags_msb[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[7] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[8] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[9] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[10] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[11] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[12] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[13] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[14] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[15] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[16] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[17] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[18] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[19] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[20] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[21] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[22] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[23] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[24] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[25] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[26] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[27] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[28] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[29] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[30] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[31] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[32] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[33] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[34] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[35] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[36] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[37] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[38] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[39] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[40] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[41] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[42] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[43] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[44] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[45] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[46] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[47] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[48] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[49] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[50] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[51] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[52] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[53] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[54] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[55] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[56] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[57] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[58] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[59] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[60] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[61] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[62] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[63] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[64] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[65] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[66] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[67] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[68] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[69] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[70] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[71] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[72] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[73] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[74] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[75] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[76] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[77] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[78] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[79] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[80] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[81] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[82] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[83] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[84] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[85] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[86] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[87] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[88] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[89] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[90] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[91] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[92] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[93] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[94] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[95] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[96] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[97] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[98] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[99] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[100] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[101] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[102] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[103] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[104] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[105] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[106] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[107] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[108] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[109] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[110] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[111] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[112] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[113] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[114] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[115] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[116] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[117] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[118] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[119] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[120] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[121] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[122] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[123] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[124] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[125] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[126] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[127] set_multicycle_path -setup 2 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.early_late_end_set }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":354:0:354:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[5] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":354:0:354:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.early_late_end_set }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_late_end_set set_multicycle_path -setup 2 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.early_late_end_val[*] }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":346:0:346:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[5] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":346:0:346:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.early_late_end_val[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_late_end_val[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_late_end_val[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_late_end_val[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_late_end_val[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_late_end_val[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_late_end_val[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_late_end_val[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_late_end_val[7] set_multicycle_path -setup 2 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.early_late_init_set }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":348:0:348:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[5] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":348:0:348:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.early_late_init_set }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_late_init_set set_multicycle_path -setup 2 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.early_late_init_val[*] }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":340:0:340:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[5] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":340:0:340:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.early_late_init_val[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_late_init_val[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_late_init_val[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_late_init_val[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_late_init_val[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_late_init_val[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_late_init_val[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_late_init_val[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_late_init_val[7] set_multicycle_path -setup 2 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.early_late_nxt_set }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":350:0:350:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[5] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":350:0:350:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.early_late_nxt_set }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_late_nxt_set set_multicycle_path -setup 2 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.early_late_nxt_val[*] }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":342:0:342:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[5] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":342:0:342:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.early_late_nxt_val[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_late_nxt_val[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_late_nxt_val[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_late_nxt_val[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_late_nxt_val[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_late_nxt_val[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_late_nxt_val[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_late_nxt_val[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_late_nxt_val[7] set_multicycle_path -setup 2 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.early_late_start_set }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":352:0:352:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[5] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":352:0:352:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.early_late_start_set }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_late_start_set set_multicycle_path -setup 2 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.early_late_start_val[*] }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":344:0:344:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[5] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":344:0:344:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.early_late_start_val[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_late_start_val[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_late_start_val[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_late_start_val[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_late_start_val[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_late_start_val[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_late_start_val[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_late_start_val[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_late_start_val[7] set_multicycle_path -setup 2 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.emflag_cnt[*] }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":370:0:370:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[5] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":370:0:370:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.emflag_cnt[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.emflag_cnt[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.emflag_cnt[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.emflag_cnt[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.emflag_cnt[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.emflag_cnt[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.emflag_cnt[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.emflag_cnt[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.emflag_cnt[7] set_multicycle_path -setup 2 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.late_flags_lsb[*] }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":328:0:328:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[5] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":328:0:328:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.late_flags_lsb[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[7] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[8] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[9] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[10] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[11] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[12] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[13] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[14] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[15] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[16] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[17] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[18] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[19] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[20] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[21] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[22] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[23] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[24] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[25] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[26] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[27] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[28] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[29] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[30] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[31] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[32] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[33] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[34] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[35] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[36] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[37] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[38] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[39] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[40] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[41] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[42] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[43] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[44] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[45] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[46] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[47] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[48] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[49] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[50] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[51] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[52] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[53] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[54] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[55] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[56] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[57] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[58] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[59] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[60] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[61] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[62] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[63] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[64] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[65] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[66] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[67] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[68] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[69] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[70] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[71] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[72] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[73] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[74] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[75] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[76] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[77] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[78] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[79] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[80] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[81] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[82] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[83] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[84] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[85] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[86] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[87] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[88] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[89] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[90] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[91] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[92] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[93] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[94] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[95] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[96] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[97] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[98] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[99] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[100] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[101] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[102] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[103] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[104] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[105] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[106] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[107] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[108] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[109] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[110] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[111] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[112] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[113] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[114] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[115] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[116] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[117] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[118] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[119] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[120] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[121] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[122] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[123] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[124] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[125] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[126] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[127] set_multicycle_path -setup 2 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.late_flags_msb[*] }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":330:0:330:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[5] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":330:0:330:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.late_flags_msb[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[7] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[8] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[9] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[10] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[11] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[12] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[13] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[14] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[15] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[16] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[17] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[18] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[19] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[20] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[21] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[22] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[23] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[24] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[25] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[26] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[27] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[28] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[29] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[30] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[31] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[32] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[33] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[34] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[35] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[36] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[37] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[38] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[39] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[40] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[41] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[42] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[43] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[44] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[45] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[46] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[47] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[48] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[49] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[50] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[51] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[52] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[53] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[54] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[55] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[56] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[57] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[58] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[59] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[60] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[61] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[62] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[63] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[64] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[65] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[66] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[67] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[68] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[69] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[70] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[71] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[72] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[73] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[74] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[75] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[76] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[77] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[78] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[79] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[80] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[81] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[82] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[83] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[84] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[85] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[86] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[87] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[88] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[89] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[90] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[91] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[92] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[93] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[94] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[95] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[96] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[97] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[98] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[99] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[100] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[101] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[102] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[103] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[104] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[105] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[106] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[107] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[108] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[109] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[110] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[111] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[112] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[113] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[114] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[115] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[116] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[117] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[118] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[119] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[120] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[121] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[122] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[123] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[124] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[125] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[126] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[127] set_multicycle_path -setup 2 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.rx_err }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":386:0:386:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[5] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":386:0:386:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.rx_err }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.rx_err set_multicycle_path -setup 2 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.rx_trng_done }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":382:0:382:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[5] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":382:0:382:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.rx_trng_done }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.rx_trng_done set_multicycle_path -setup 2 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.tap_cnt[*] }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":368:0:368:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[5] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":368:0:368:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.tap_cnt[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.tap_cnt[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.tap_cnt[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.tap_cnt[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.tap_cnt[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.tap_cnt[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.tap_cnt[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.tap_cnt[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.tap_cnt[7] set_multicycle_path -setup 2 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.tapcnt_final[*] }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":364:0:364:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[5] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":364:0:364:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.tapcnt_final[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.tapcnt_final[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.tapcnt_final[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.tapcnt_final[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.tapcnt_final[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.tapcnt_final[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.tapcnt_final[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.tapcnt_final[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.tapcnt_final[7] set_multicycle_path -setup 2 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.tapcnt_offset[*] }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":362:0:362:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[5] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":362:0:362:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.tapcnt_offset[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.tapcnt_offset[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.tapcnt_offset[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.tapcnt_offset[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.tapcnt_offset[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.tapcnt_offset[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.tapcnt_offset[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.tapcnt_offset[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.tapcnt_offset[7] set_multicycle_path -setup 2 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.timeout_cnt[*] }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":372:0:372:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[5] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":372:0:372:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.timeout_cnt[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.timeout_cnt[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.timeout_cnt[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.timeout_cnt[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.timeout_cnt[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.timeout_cnt[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.timeout_cnt[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.timeout_cnt[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.timeout_cnt[7] set_multicycle_path -setup 2 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.wait_cnt[*] }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":366:0:366:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[5] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":366:0:366:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.wait_cnt[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.wait_cnt[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.wait_cnt[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.wait_cnt[2] set_multicycle_path -setup 2 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.cnt[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[*] }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":356:0:356:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.cnt[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.cnt[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.cnt[1] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":356:0:356:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[5] set_multicycle_path -setup 2 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.cnt[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.early_flags_lsb[*] }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":332:0:332:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.cnt[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.cnt[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.cnt[1] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":332:0:332:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.early_flags_lsb[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[7] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[8] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[9] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[10] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[11] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[12] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[13] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[14] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[15] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[16] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[17] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[18] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[19] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[20] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[21] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[22] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[23] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[24] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[25] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[26] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[27] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[28] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[29] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[30] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[31] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[32] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[33] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[34] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[35] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[36] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[37] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[38] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[39] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[40] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[41] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[42] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[43] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[44] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[45] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[46] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[47] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[48] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[49] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[50] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[51] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[52] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[53] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[54] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[55] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[56] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[57] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[58] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[59] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[60] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[61] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[62] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[63] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[64] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[65] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[66] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[67] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[68] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[69] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[70] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[71] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[72] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[73] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[74] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[75] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[76] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[77] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[78] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[79] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[80] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[81] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[82] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[83] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[84] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[85] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[86] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[87] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[88] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[89] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[90] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[91] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[92] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[93] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[94] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[95] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[96] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[97] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[98] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[99] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[100] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[101] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[102] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[103] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[104] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[105] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[106] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[107] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[108] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[109] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[110] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[111] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[112] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[113] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[114] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[115] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[116] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[117] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[118] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[119] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[120] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[121] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[122] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[123] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[124] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[125] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[126] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_lsb[127] set_multicycle_path -setup 2 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.cnt[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.early_flags_msb[*] }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":334:0:334:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.cnt[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.cnt[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.cnt[1] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":334:0:334:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.early_flags_msb[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[7] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[8] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[9] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[10] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[11] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[12] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[13] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[14] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[15] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[16] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[17] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[18] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[19] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[20] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[21] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[22] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[23] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[24] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[25] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[26] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[27] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[28] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[29] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[30] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[31] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[32] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[33] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[34] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[35] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[36] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[37] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[38] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[39] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[40] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[41] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[42] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[43] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[44] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[45] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[46] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[47] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[48] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[49] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[50] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[51] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[52] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[53] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[54] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[55] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[56] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[57] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[58] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[59] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[60] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[61] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[62] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[63] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[64] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[65] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[66] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[67] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[68] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[69] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[70] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[71] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[72] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[73] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[74] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[75] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[76] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[77] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[78] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[79] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[80] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[81] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[82] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[83] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[84] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[85] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[86] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[87] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[88] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[89] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[90] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[91] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[92] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[93] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[94] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[95] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[96] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[97] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[98] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[99] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[100] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[101] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[102] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[103] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[104] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[105] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[106] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[107] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[108] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[109] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[110] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[111] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[112] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[113] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[114] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[115] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[116] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[117] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[118] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[119] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[120] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[121] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[122] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[123] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[124] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[125] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[126] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_flags_msb[127] set_multicycle_path -setup 2 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.cnt[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.late_flags_lsb[*] }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":336:0:336:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.cnt[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.cnt[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.cnt[1] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":336:0:336:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.late_flags_lsb[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[7] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[8] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[9] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[10] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[11] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[12] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[13] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[14] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[15] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[16] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[17] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[18] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[19] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[20] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[21] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[22] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[23] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[24] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[25] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[26] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[27] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[28] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[29] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[30] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[31] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[32] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[33] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[34] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[35] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[36] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[37] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[38] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[39] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[40] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[41] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[42] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[43] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[44] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[45] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[46] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[47] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[48] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[49] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[50] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[51] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[52] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[53] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[54] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[55] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[56] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[57] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[58] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[59] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[60] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[61] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[62] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[63] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[64] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[65] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[66] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[67] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[68] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[69] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[70] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[71] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[72] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[73] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[74] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[75] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[76] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[77] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[78] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[79] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[80] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[81] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[82] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[83] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[84] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[85] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[86] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[87] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[88] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[89] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[90] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[91] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[92] 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DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[99] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[100] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[101] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[102] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[103] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[104] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[105] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[106] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[107] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[108] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[109] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[110] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[111] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[112] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[113] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[114] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[115] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[116] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[117] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[118] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[119] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[120] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[121] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[122] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[123] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[124] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[125] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[126] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_lsb[127] set_multicycle_path -setup 2 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.cnt[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.late_flags_msb[*] }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":338:0:338:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.cnt[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.cnt[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.cnt[1] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":338:0:338:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.late_flags_msb[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[7] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[8] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[9] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[10] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[11] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[12] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[13] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[14] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[15] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[16] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[17] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[18] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[19] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[20] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[21] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[22] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[23] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[24] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[25] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[26] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[27] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[28] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[29] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[30] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[31] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[32] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[33] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[34] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[35] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[36] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[37] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[38] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[39] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[40] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[41] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[42] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[43] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[44] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[45] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[46] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[47] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[48] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[49] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[50] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[51] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[52] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[53] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[54] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[55] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[56] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[57] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[58] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[59] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[60] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[61] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[62] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[63] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[64] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[65] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[66] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[67] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[68] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[69] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[70] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[71] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[72] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[73] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[74] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[75] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[76] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[77] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[78] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[79] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[80] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[81] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[82] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[83] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[84] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[85] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[86] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[87] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[88] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[89] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[90] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[91] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[92] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[93] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[94] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[95] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[96] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[97] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[98] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[99] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[100] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[101] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[102] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[103] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[104] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[105] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[106] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[107] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[108] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[109] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[110] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[111] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[112] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[113] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[114] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[115] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[116] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[117] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[118] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[119] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[120] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[121] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[122] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[123] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[124] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[125] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[126] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_flags_msb[127] set_multicycle_path -setup 2 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.cnt[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.tap_cnt[*] }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":360:0:360:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.cnt[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.cnt[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.cnt[1] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":360:0:360:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.tap_cnt[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.tap_cnt[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.tap_cnt[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.tap_cnt[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.tap_cnt[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.tap_cnt[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.tap_cnt[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.tap_cnt[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.tap_cnt[7] set_multicycle_path -setup 2 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.emflag_cnt[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[*] }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":358:0:358:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.emflag_cnt[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.emflag_cnt[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.emflag_cnt[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.emflag_cnt[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.emflag_cnt[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.emflag_cnt[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.emflag_cnt[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.emflag_cnt[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.emflag_cnt[7] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":358:0:358:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.clkalign_curr_state[5] set_multicycle_path -setup 2 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.emflag_cnt[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.early_found_lsb_d }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":296:0:296:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.emflag_cnt[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.emflag_cnt[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.emflag_cnt[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.emflag_cnt[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.emflag_cnt[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.emflag_cnt[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.emflag_cnt[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.emflag_cnt[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.emflag_cnt[7] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":296:0:296:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.early_found_lsb_d }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_found_lsb_d set_multicycle_path -setup 2 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.emflag_cnt[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.early_found_msb_d }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":298:0:298:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.emflag_cnt[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.emflag_cnt[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.emflag_cnt[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.emflag_cnt[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.emflag_cnt[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.emflag_cnt[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.emflag_cnt[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.emflag_cnt[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.emflag_cnt[7] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":298:0:298:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.early_found_msb_d }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_found_msb_d set_multicycle_path -setup 2 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.emflag_cnt[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.early_not_found_lsb_d }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":300:0:300:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.emflag_cnt[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.emflag_cnt[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.emflag_cnt[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.emflag_cnt[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.emflag_cnt[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.emflag_cnt[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.emflag_cnt[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.emflag_cnt[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.emflag_cnt[7] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":300:0:300:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.early_not_found_lsb_d }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_not_found_lsb_d set_multicycle_path -setup 2 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.emflag_cnt[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.early_not_found_msb_d }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":302:0:302:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.emflag_cnt[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.emflag_cnt[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.emflag_cnt[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.emflag_cnt[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.emflag_cnt[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.emflag_cnt[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.emflag_cnt[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.emflag_cnt[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.emflag_cnt[7] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":302:0:302:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.early_not_found_msb_d }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_not_found_msb_d set_multicycle_path -setup 2 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.emflag_cnt[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.late_found_lsb_d }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":292:0:292:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.emflag_cnt[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.emflag_cnt[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.emflag_cnt[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.emflag_cnt[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.emflag_cnt[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.emflag_cnt[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.emflag_cnt[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.emflag_cnt[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.emflag_cnt[7] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":292:0:292:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.late_found_lsb_d }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_found_lsb_d set_multicycle_path -setup 2 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.emflag_cnt[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.late_found_msb_d }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":294:0:294:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.emflag_cnt[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.emflag_cnt[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.emflag_cnt[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.emflag_cnt[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.emflag_cnt[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.emflag_cnt[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.emflag_cnt[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.emflag_cnt[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.emflag_cnt[7] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":294:0:294:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.late_found_msb_d }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_found_msb_d set_multicycle_path -setup 2 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.emflag_cnt[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.late_not_found_lsb_d }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":304:0:304:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.emflag_cnt[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.emflag_cnt[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.emflag_cnt[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.emflag_cnt[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.emflag_cnt[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.emflag_cnt[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.emflag_cnt[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.emflag_cnt[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.emflag_cnt[7] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":304:0:304:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.late_not_found_lsb_d }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_not_found_lsb_d set_multicycle_path -setup 2 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.emflag_cnt[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.late_not_found_msb_d }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":306:0:306:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.emflag_cnt[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.emflag_cnt[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.emflag_cnt[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.emflag_cnt[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.emflag_cnt[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.emflag_cnt[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.emflag_cnt[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.emflag_cnt[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.emflag_cnt[7] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":306:0:306:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.late_not_found_msb_d }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.late_not_found_msb_d set_multicycle_path -setup 3 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.*.u_CoreRxIODBitAlign.early_cur_set }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":68:0:68:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[7] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":68:0:68:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.*.u_CoreRxIODBitAlign.early_cur_set }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_cur_set set_multicycle_path -setup 3 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.*.u_CoreRxIODBitAlign.early_last_set }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":70:0:70:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[7] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":70:0:70:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.*.u_CoreRxIODBitAlign.early_last_set }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_last_set set_multicycle_path -setup 3 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.*.u_CoreRxIODBitAlign.early_late_diff[*] }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":88:0:88:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[7] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":88:0:88:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.*.u_CoreRxIODBitAlign.early_late_diff[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_late_diff[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_late_diff[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_late_diff[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_late_diff[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_late_diff[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_late_diff[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_late_diff[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_late_diff[7] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_late_diff[8] set_multicycle_path -setup 3 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.*.u_CoreRxIODBitAlign.early_val[*] }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":76:0:76:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[7] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":76:0:76:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.*.u_CoreRxIODBitAlign.early_val[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_val[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_val[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_val[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_val[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_val[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_val[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_val[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.early_val[7] set_multicycle_path -setup 3 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.*.u_CoreRxIODBitAlign.late_cur_set }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":72:0:72:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[7] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":72:0:72:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.*.u_CoreRxIODBitAlign.late_cur_set }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_cur_set set_multicycle_path -setup 3 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.*.u_CoreRxIODBitAlign.late_last_set }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":74:0:74:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[7] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":74:0:74:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.*.u_CoreRxIODBitAlign.late_last_set }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_last_set set_multicycle_path -setup 3 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.*.u_CoreRxIODBitAlign.late_val[*] }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":78:0:78:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[7] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":78:0:78:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.*.u_CoreRxIODBitAlign.late_val[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_val[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_val[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_val[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_val[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_val[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_val[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_val[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.late_val[7] set_multicycle_path -setup 3 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.*.u_CoreRxIODBitAlign.no_early_no_late_val_end1[*] }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":82:0:82:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[7] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":82:0:82:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.*.u_CoreRxIODBitAlign.no_early_no_late_val_end1[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.no_early_no_late_val_end1[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.no_early_no_late_val_end1[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.no_early_no_late_val_end1[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.no_early_no_late_val_end1[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.no_early_no_late_val_end1[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.no_early_no_late_val_end1[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.no_early_no_late_val_end1[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.no_early_no_late_val_end1[7] set_multicycle_path -setup 3 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.*.u_CoreRxIODBitAlign.no_early_no_late_val_end2[*] }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":86:0:86:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[7] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":86:0:86:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.*.u_CoreRxIODBitAlign.no_early_no_late_val_end2[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.no_early_no_late_val_end2[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.no_early_no_late_val_end2[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.no_early_no_late_val_end2[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.no_early_no_late_val_end2[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.no_early_no_late_val_end2[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.no_early_no_late_val_end2[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.no_early_no_late_val_end2[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.no_early_no_late_val_end2[7] set_multicycle_path -setup 3 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.*.u_CoreRxIODBitAlign.no_early_no_late_val_st1[*] }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":80:0:80:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[7] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":80:0:80:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.*.u_CoreRxIODBitAlign.no_early_no_late_val_st1[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.no_early_no_late_val_st1[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.no_early_no_late_val_st1[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.no_early_no_late_val_st1[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.no_early_no_late_val_st1[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.no_early_no_late_val_st1[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.no_early_no_late_val_st1[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.no_early_no_late_val_st1[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.no_early_no_late_val_st1[7] set_multicycle_path -setup 3 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.*.u_CoreRxIODBitAlign.no_early_no_late_val_st2[*] }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":84:0:84:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[7] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":84:0:84:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.*.u_CoreRxIODBitAlign.no_early_no_late_val_st2[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.no_early_no_late_val_st2[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.no_early_no_late_val_st2[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.no_early_no_late_val_st2[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.no_early_no_late_val_st2[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.no_early_no_late_val_st2[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.no_early_no_late_val_st2[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.no_early_no_late_val_st2[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.no_early_no_late_val_st2[7] set_multicycle_path -setup 3 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.*.u_CoreRxIODBitAlign.noearly_nolate_diff_nxt[*] }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":92:0:92:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[7] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":92:0:92:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.*.u_CoreRxIODBitAlign.noearly_nolate_diff_nxt[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.noearly_nolate_diff_nxt[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.noearly_nolate_diff_nxt[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.noearly_nolate_diff_nxt[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.noearly_nolate_diff_nxt[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.noearly_nolate_diff_nxt[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.noearly_nolate_diff_nxt[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.noearly_nolate_diff_nxt[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.noearly_nolate_diff_nxt[7] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.noearly_nolate_diff_nxt[8] set_multicycle_path -setup 3 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.*.u_CoreRxIODBitAlign.noearly_nolate_diff_start[*] }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":90:0:90:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.emflag_cnt[7] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":90:0:90:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.*.u_CoreRxIODBitAlign.noearly_nolate_diff_start[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.noearly_nolate_diff_start[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.noearly_nolate_diff_start[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.noearly_nolate_diff_start[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.noearly_nolate_diff_start[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.noearly_nolate_diff_start[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.noearly_nolate_diff_start[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.noearly_nolate_diff_start[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.noearly_nolate_diff_start[7] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C0_0.CORERXIODBITALIGN_C0_0.u_CoreRxIODBitAlign.noearly_nolate_diff_start[8] set_multicycle_path -setup 3 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.*.u_CoreRxIODBitAlign.early_cur_set }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":128:0:128:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[7] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":128:0:128:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.*.u_CoreRxIODBitAlign.early_cur_set }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_cur_set set_multicycle_path -setup 3 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.*.u_CoreRxIODBitAlign.early_last_set }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":130:0:130:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[7] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":130:0:130:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.*.u_CoreRxIODBitAlign.early_last_set }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_last_set set_multicycle_path -setup 3 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.*.u_CoreRxIODBitAlign.early_late_diff[*] }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":148:0:148:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[7] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":148:0:148:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.*.u_CoreRxIODBitAlign.early_late_diff[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_late_diff[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_late_diff[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_late_diff[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_late_diff[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_late_diff[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_late_diff[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_late_diff[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_late_diff[7] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_late_diff[8] set_multicycle_path -setup 3 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.*.u_CoreRxIODBitAlign.early_val[*] }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":136:0:136:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[7] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":136:0:136:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.*.u_CoreRxIODBitAlign.early_val[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_val[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_val[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_val[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_val[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_val[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_val[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_val[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.early_val[7] set_multicycle_path -setup 3 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.*.u_CoreRxIODBitAlign.late_cur_set }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":132:0:132:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[7] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":132:0:132:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.*.u_CoreRxIODBitAlign.late_cur_set }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_cur_set set_multicycle_path -setup 3 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.*.u_CoreRxIODBitAlign.late_last_set }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":134:0:134:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[7] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":134:0:134:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.*.u_CoreRxIODBitAlign.late_last_set }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_last_set set_multicycle_path -setup 3 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.*.u_CoreRxIODBitAlign.late_val[*] }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":138:0:138:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[7] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":138:0:138:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.*.u_CoreRxIODBitAlign.late_val[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_val[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_val[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_val[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_val[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_val[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_val[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_val[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.late_val[7] set_multicycle_path -setup 3 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.*.u_CoreRxIODBitAlign.no_early_no_late_val_end1[*] }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":142:0:142:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[7] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":142:0:142:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.*.u_CoreRxIODBitAlign.no_early_no_late_val_end1[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.no_early_no_late_val_end1[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.no_early_no_late_val_end1[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.no_early_no_late_val_end1[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.no_early_no_late_val_end1[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.no_early_no_late_val_end1[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.no_early_no_late_val_end1[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.no_early_no_late_val_end1[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.no_early_no_late_val_end1[7] set_multicycle_path -setup 3 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.*.u_CoreRxIODBitAlign.no_early_no_late_val_end2[*] }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":146:0:146:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[7] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":146:0:146:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.*.u_CoreRxIODBitAlign.no_early_no_late_val_end2[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.no_early_no_late_val_end2[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.no_early_no_late_val_end2[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.no_early_no_late_val_end2[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.no_early_no_late_val_end2[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.no_early_no_late_val_end2[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.no_early_no_late_val_end2[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.no_early_no_late_val_end2[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.no_early_no_late_val_end2[7] set_multicycle_path -setup 3 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.*.u_CoreRxIODBitAlign.no_early_no_late_val_st1[*] }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":140:0:140:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[7] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":140:0:140:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.*.u_CoreRxIODBitAlign.no_early_no_late_val_st1[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.no_early_no_late_val_st1[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.no_early_no_late_val_st1[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.no_early_no_late_val_st1[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.no_early_no_late_val_st1[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.no_early_no_late_val_st1[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.no_early_no_late_val_st1[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.no_early_no_late_val_st1[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.no_early_no_late_val_st1[7] set_multicycle_path -setup 3 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.*.u_CoreRxIODBitAlign.no_early_no_late_val_st2[*] }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":144:0:144:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[7] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":144:0:144:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.*.u_CoreRxIODBitAlign.no_early_no_late_val_st2[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.no_early_no_late_val_st2[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.no_early_no_late_val_st2[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.no_early_no_late_val_st2[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.no_early_no_late_val_st2[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.no_early_no_late_val_st2[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.no_early_no_late_val_st2[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.no_early_no_late_val_st2[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.no_early_no_late_val_st2[7] set_multicycle_path -setup 3 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.*.u_CoreRxIODBitAlign.noearly_nolate_diff_nxt[*] }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":152:0:152:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[7] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":152:0:152:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.*.u_CoreRxIODBitAlign.noearly_nolate_diff_nxt[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.noearly_nolate_diff_nxt[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.noearly_nolate_diff_nxt[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.noearly_nolate_diff_nxt[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.noearly_nolate_diff_nxt[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.noearly_nolate_diff_nxt[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.noearly_nolate_diff_nxt[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.noearly_nolate_diff_nxt[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.noearly_nolate_diff_nxt[7] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.noearly_nolate_diff_nxt[8] set_multicycle_path -setup 3 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.*.u_CoreRxIODBitAlign.noearly_nolate_diff_start[*] }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":150:0:150:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.emflag_cnt[7] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":150:0:150:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.*.u_CoreRxIODBitAlign.noearly_nolate_diff_start[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.noearly_nolate_diff_start[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.noearly_nolate_diff_start[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.noearly_nolate_diff_start[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.noearly_nolate_diff_start[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.noearly_nolate_diff_start[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.noearly_nolate_diff_start[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.noearly_nolate_diff_start[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.noearly_nolate_diff_start[7] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C1_0.CORERXIODBITALIGN_C1_0.u_CoreRxIODBitAlign.noearly_nolate_diff_start[8] set_multicycle_path -setup 3 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.*.u_CoreRxIODBitAlign.early_cur_set }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":188:0:188:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[7] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":188:0:188:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.*.u_CoreRxIODBitAlign.early_cur_set }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_cur_set set_multicycle_path -setup 3 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.*.u_CoreRxIODBitAlign.early_last_set }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":190:0:190:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[7] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":190:0:190:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.*.u_CoreRxIODBitAlign.early_last_set }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_last_set set_multicycle_path -setup 3 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.*.u_CoreRxIODBitAlign.early_late_diff[*] }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":208:0:208:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[7] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":208:0:208:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.*.u_CoreRxIODBitAlign.early_late_diff[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_late_diff[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_late_diff[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_late_diff[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_late_diff[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_late_diff[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_late_diff[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_late_diff[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_late_diff[7] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_late_diff[8] set_multicycle_path -setup 3 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.*.u_CoreRxIODBitAlign.early_val[*] }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":196:0:196:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[7] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":196:0:196:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.*.u_CoreRxIODBitAlign.early_val[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_val[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_val[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_val[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_val[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_val[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_val[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_val[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.early_val[7] set_multicycle_path -setup 3 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.*.u_CoreRxIODBitAlign.late_cur_set }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":192:0:192:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[7] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":192:0:192:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.*.u_CoreRxIODBitAlign.late_cur_set }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_cur_set set_multicycle_path -setup 3 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.*.u_CoreRxIODBitAlign.late_last_set }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":194:0:194:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[7] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":194:0:194:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.*.u_CoreRxIODBitAlign.late_last_set }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_last_set set_multicycle_path -setup 3 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.*.u_CoreRxIODBitAlign.late_val[*] }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":198:0:198:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[7] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":198:0:198:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.*.u_CoreRxIODBitAlign.late_val[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_val[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_val[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_val[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_val[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_val[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_val[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_val[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.late_val[7] set_multicycle_path -setup 3 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.*.u_CoreRxIODBitAlign.no_early_no_late_val_end1[*] }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":202:0:202:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[7] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":202:0:202:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.*.u_CoreRxIODBitAlign.no_early_no_late_val_end1[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.no_early_no_late_val_end1[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.no_early_no_late_val_end1[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.no_early_no_late_val_end1[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.no_early_no_late_val_end1[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.no_early_no_late_val_end1[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.no_early_no_late_val_end1[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.no_early_no_late_val_end1[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.no_early_no_late_val_end1[7] set_multicycle_path -setup 3 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.*.u_CoreRxIODBitAlign.no_early_no_late_val_end2[*] }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":206:0:206:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[7] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":206:0:206:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.*.u_CoreRxIODBitAlign.no_early_no_late_val_end2[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.no_early_no_late_val_end2[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.no_early_no_late_val_end2[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.no_early_no_late_val_end2[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.no_early_no_late_val_end2[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.no_early_no_late_val_end2[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.no_early_no_late_val_end2[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.no_early_no_late_val_end2[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.no_early_no_late_val_end2[7] set_multicycle_path -setup 3 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.*.u_CoreRxIODBitAlign.no_early_no_late_val_st1[*] }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":200:0:200:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[7] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":200:0:200:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.*.u_CoreRxIODBitAlign.no_early_no_late_val_st1[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.no_early_no_late_val_st1[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.no_early_no_late_val_st1[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.no_early_no_late_val_st1[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.no_early_no_late_val_st1[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.no_early_no_late_val_st1[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.no_early_no_late_val_st1[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.no_early_no_late_val_st1[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.no_early_no_late_val_st1[7] set_multicycle_path -setup 3 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.*.u_CoreRxIODBitAlign.no_early_no_late_val_st2[*] }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":204:0:204:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[7] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":204:0:204:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.*.u_CoreRxIODBitAlign.no_early_no_late_val_st2[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.no_early_no_late_val_st2[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.no_early_no_late_val_st2[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.no_early_no_late_val_st2[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.no_early_no_late_val_st2[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.no_early_no_late_val_st2[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.no_early_no_late_val_st2[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.no_early_no_late_val_st2[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.no_early_no_late_val_st2[7] set_multicycle_path -setup 3 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.*.u_CoreRxIODBitAlign.noearly_nolate_diff_nxt[*] }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":212:0:212:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[7] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":212:0:212:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.*.u_CoreRxIODBitAlign.noearly_nolate_diff_nxt[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.noearly_nolate_diff_nxt[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.noearly_nolate_diff_nxt[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.noearly_nolate_diff_nxt[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.noearly_nolate_diff_nxt[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.noearly_nolate_diff_nxt[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.noearly_nolate_diff_nxt[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.noearly_nolate_diff_nxt[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.noearly_nolate_diff_nxt[7] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.noearly_nolate_diff_nxt[8] set_multicycle_path -setup 3 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.*.u_CoreRxIODBitAlign.noearly_nolate_diff_start[*] }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":210:0:210:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.emflag_cnt[7] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":210:0:210:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.*.u_CoreRxIODBitAlign.noearly_nolate_diff_start[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.noearly_nolate_diff_start[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.noearly_nolate_diff_start[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.noearly_nolate_diff_start[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.noearly_nolate_diff_start[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.noearly_nolate_diff_start[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.noearly_nolate_diff_start[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.noearly_nolate_diff_start[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.noearly_nolate_diff_start[7] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C2_0.CORERXIODBITALIGN_C2_0.u_CoreRxIODBitAlign.noearly_nolate_diff_start[8] set_multicycle_path -setup 3 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.*.u_CoreRxIODBitAlign.early_cur_set }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":248:0:248:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[7] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":248:0:248:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.*.u_CoreRxIODBitAlign.early_cur_set }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_cur_set set_multicycle_path -setup 3 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.*.u_CoreRxIODBitAlign.early_last_set }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":250:0:250:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[7] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":250:0:250:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.*.u_CoreRxIODBitAlign.early_last_set }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_last_set set_multicycle_path -setup 3 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.*.u_CoreRxIODBitAlign.early_late_diff[*] }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":268:0:268:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[7] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":268:0:268:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.*.u_CoreRxIODBitAlign.early_late_diff[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_late_diff[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_late_diff[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_late_diff[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_late_diff[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_late_diff[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_late_diff[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_late_diff[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_late_diff[7] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_late_diff[8] set_multicycle_path -setup 3 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.*.u_CoreRxIODBitAlign.early_val[*] }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":256:0:256:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[7] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":256:0:256:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.*.u_CoreRxIODBitAlign.early_val[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_val[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_val[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_val[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_val[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_val[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_val[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_val[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.early_val[7] set_multicycle_path -setup 3 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.*.u_CoreRxIODBitAlign.late_cur_set }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":252:0:252:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[7] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":252:0:252:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.*.u_CoreRxIODBitAlign.late_cur_set }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_cur_set set_multicycle_path -setup 3 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.*.u_CoreRxIODBitAlign.late_last_set }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":254:0:254:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[7] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":254:0:254:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.*.u_CoreRxIODBitAlign.late_last_set }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_last_set set_multicycle_path -setup 3 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.*.u_CoreRxIODBitAlign.late_val[*] }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":258:0:258:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[7] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":258:0:258:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.*.u_CoreRxIODBitAlign.late_val[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_val[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_val[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_val[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_val[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_val[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_val[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_val[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.late_val[7] set_multicycle_path -setup 3 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.*.u_CoreRxIODBitAlign.no_early_no_late_val_end1[*] }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":262:0:262:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[7] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":262:0:262:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.*.u_CoreRxIODBitAlign.no_early_no_late_val_end1[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.no_early_no_late_val_end1[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.no_early_no_late_val_end1[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.no_early_no_late_val_end1[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.no_early_no_late_val_end1[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.no_early_no_late_val_end1[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.no_early_no_late_val_end1[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.no_early_no_late_val_end1[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.no_early_no_late_val_end1[7] set_multicycle_path -setup 3 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.*.u_CoreRxIODBitAlign.no_early_no_late_val_end2[*] }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":266:0:266:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[7] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":266:0:266:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.*.u_CoreRxIODBitAlign.no_early_no_late_val_end2[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.no_early_no_late_val_end2[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.no_early_no_late_val_end2[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.no_early_no_late_val_end2[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.no_early_no_late_val_end2[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.no_early_no_late_val_end2[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.no_early_no_late_val_end2[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.no_early_no_late_val_end2[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.no_early_no_late_val_end2[7] set_multicycle_path -setup 3 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.*.u_CoreRxIODBitAlign.no_early_no_late_val_st1[*] }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":260:0:260:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[7] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":260:0:260:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.*.u_CoreRxIODBitAlign.no_early_no_late_val_st1[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.no_early_no_late_val_st1[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.no_early_no_late_val_st1[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.no_early_no_late_val_st1[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.no_early_no_late_val_st1[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.no_early_no_late_val_st1[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.no_early_no_late_val_st1[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.no_early_no_late_val_st1[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.no_early_no_late_val_st1[7] set_multicycle_path -setup 3 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.*.u_CoreRxIODBitAlign.no_early_no_late_val_st2[*] }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":264:0:264:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[7] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":264:0:264:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.*.u_CoreRxIODBitAlign.no_early_no_late_val_st2[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.no_early_no_late_val_st2[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.no_early_no_late_val_st2[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.no_early_no_late_val_st2[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.no_early_no_late_val_st2[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.no_early_no_late_val_st2[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.no_early_no_late_val_st2[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.no_early_no_late_val_st2[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.no_early_no_late_val_st2[7] set_multicycle_path -setup 3 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.*.u_CoreRxIODBitAlign.noearly_nolate_diff_nxt[*] }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":272:0:272:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[7] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":272:0:272:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.*.u_CoreRxIODBitAlign.noearly_nolate_diff_nxt[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.noearly_nolate_diff_nxt[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.noearly_nolate_diff_nxt[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.noearly_nolate_diff_nxt[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.noearly_nolate_diff_nxt[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.noearly_nolate_diff_nxt[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.noearly_nolate_diff_nxt[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.noearly_nolate_diff_nxt[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.noearly_nolate_diff_nxt[7] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.noearly_nolate_diff_nxt[8] set_multicycle_path -setup 3 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.*.u_CoreRxIODBitAlign.noearly_nolate_diff_start[*] }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":270:0:270:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.*.u_CoreRxIODBitAlign.emflag_cnt[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.emflag_cnt[7] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":270:0:270:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.*.u_CoreRxIODBitAlign.noearly_nolate_diff_start[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.noearly_nolate_diff_start[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.noearly_nolate_diff_start[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.noearly_nolate_diff_start[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.noearly_nolate_diff_start[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.noearly_nolate_diff_start[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.noearly_nolate_diff_start[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.noearly_nolate_diff_start[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.noearly_nolate_diff_start[7] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.CORERXIODBITALIGN_C3_0.CORERXIODBITALIGN_C3_0.u_CoreRxIODBitAlign.noearly_nolate_diff_start[8] set_multicycle_path -setup 3 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.emflag_cnt[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.early_late_end_set }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":314:0:314:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.emflag_cnt[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.emflag_cnt[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.emflag_cnt[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.emflag_cnt[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.emflag_cnt[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.emflag_cnt[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.emflag_cnt[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.emflag_cnt[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.emflag_cnt[7] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":314:0:314:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.early_late_end_set }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_late_end_set set_multicycle_path -setup 3 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.emflag_cnt[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.early_late_end_val[*] }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":322:0:322:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.emflag_cnt[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.emflag_cnt[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.emflag_cnt[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.emflag_cnt[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.emflag_cnt[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.emflag_cnt[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.emflag_cnt[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.emflag_cnt[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.emflag_cnt[7] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":322:0:322:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.early_late_end_val[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_late_end_val[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_late_end_val[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_late_end_val[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_late_end_val[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_late_end_val[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_late_end_val[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_late_end_val[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_late_end_val[7] set_multicycle_path -setup 3 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.emflag_cnt[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.early_late_init_set }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":308:0:308:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.emflag_cnt[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.emflag_cnt[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.emflag_cnt[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.emflag_cnt[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.emflag_cnt[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.emflag_cnt[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.emflag_cnt[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.emflag_cnt[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.emflag_cnt[7] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":308:0:308:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.early_late_init_set }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_late_init_set set_multicycle_path -setup 3 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.emflag_cnt[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.early_late_init_val[*] }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":316:0:316:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.emflag_cnt[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.emflag_cnt[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.emflag_cnt[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.emflag_cnt[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.emflag_cnt[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.emflag_cnt[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.emflag_cnt[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.emflag_cnt[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.emflag_cnt[7] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":316:0:316:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.early_late_init_val[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_late_init_val[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_late_init_val[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_late_init_val[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_late_init_val[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_late_init_val[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_late_init_val[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_late_init_val[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_late_init_val[7] set_multicycle_path -setup 3 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.emflag_cnt[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.early_late_nxt_set }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":310:0:310:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.emflag_cnt[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.emflag_cnt[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.emflag_cnt[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.emflag_cnt[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.emflag_cnt[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.emflag_cnt[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.emflag_cnt[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.emflag_cnt[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.emflag_cnt[7] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":310:0:310:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.early_late_nxt_set }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_late_nxt_set set_multicycle_path -setup 3 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.emflag_cnt[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.early_late_nxt_val[*] }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":318:0:318:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.emflag_cnt[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.emflag_cnt[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.emflag_cnt[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.emflag_cnt[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.emflag_cnt[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.emflag_cnt[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.emflag_cnt[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.emflag_cnt[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.emflag_cnt[7] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":318:0:318:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.early_late_nxt_val[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_late_nxt_val[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_late_nxt_val[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_late_nxt_val[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_late_nxt_val[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_late_nxt_val[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_late_nxt_val[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_late_nxt_val[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_late_nxt_val[7] set_multicycle_path -setup 3 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.emflag_cnt[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.early_late_start_set }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":312:0:312:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.emflag_cnt[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.emflag_cnt[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.emflag_cnt[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.emflag_cnt[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.emflag_cnt[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.emflag_cnt[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.emflag_cnt[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.emflag_cnt[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.emflag_cnt[7] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":312:0:312:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.early_late_start_set }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_late_start_set set_multicycle_path -setup 3 -from [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.emflag_cnt[*] }] -to [get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.early_late_start_val[*] }] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":320:0:320:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.emflag_cnt[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.emflag_cnt[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.emflag_cnt[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.emflag_cnt[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.emflag_cnt[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.emflag_cnt[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.emflag_cnt[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.emflag_cnt[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.emflag_cnt[7] @N:MF891:"d:/delme/sev_pfsoc_openvx/designer/sev_pfsoc_openvx/synthesis.fdc":320:0:320:0|expression "[get_cells { DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.*.genblk1.U_ICB_BCLKSCLKALIGN.early_late_start_val[*] }]" applies to objects: DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_late_start_val[0] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_late_start_val[1] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_late_start_val[2] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_late_start_val[3] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_late_start_val[4] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_late_start_val[5] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_late_start_val[6] DDR4_RD_WR_inst_0.IMX334_IF_TOP_0.PF_IOD_GENERIC_RX_C0_0.PF_IOD_0.COREBCLKSCLKALIGN_0.PF_IOD_GENERIC_RX_C0_TR_0.genblk1\.U_ICB_BCLKSCLKALIGN.early_late_start_val[7] Library Report ************** # End of Constraint Checker Report