
#####  START OF RAM REPORT FOR COMPILE POINT: DDR4_RD_WR  #####

#####  LSRAM REPORT  #####

INSTANTIATED     RTL_INSTANCE                                                                                                                                                                                                   PRIMITIVE_TYPE     USER_ATTRIBUTE         MAPPED_INSTANCE                                                                                                                                                                                                   DEPTH_X_WIDTH(A/B)     LOW-POWER_MODE     ECC     A_DOUT_PIPE_REG(EN/ARST/SRST)     B_DOUT_PIPE_REG(EN/ARST/SRST)     WRITE_MODE(A/B)               COMMENTS                                                            
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NO               DDR4_RD_WR_inst_0.DDR_Read_LPDDR4_0.video_fifo_0.ram2port_inst.io1l[511:0]                                                                                                                                     RAM                syn_ramstyle=lsram     DDR4_RD_WR_inst_0.DDR_Read_LPDDR4_0.video_fifo_0.ram2port_inst.io1l_io1l_0_0                                                                                                                                      4KX5_4KX5              0                  0       0(0/0/0)                          0(0/0/0)                          (WRITE_FIRST/WRITE_FIRST)     Found property syn_ramstyle="lsram". Inferring instance using LSRAM.
                                                                                                                                                                                                                                                                          DDR4_RD_WR_inst_0.DDR_Read_LPDDR4_0.video_fifo_0.ram2port_inst.io1l_io1l_0_1                                                                                                                                      4KX5_4KX5              0                  0       0(0/0/0)                          0(0/0/0)                          (WRITE_FIRST/WRITE_FIRST)                                                                         
                                                                                                                                                                                                                                                                          DDR4_RD_WR_inst_0.DDR_Read_LPDDR4_0.video_fifo_0.ram2port_inst.io1l_io1l_0_2                                                                                                                                      4KX5_4KX5              0                  0       0(0/0/0)                          0(0/0/0)                          (WRITE_FIRST/WRITE_FIRST)                                                                         
                                                                                                                                                                                                                                                                          DDR4_RD_WR_inst_0.DDR_Read_LPDDR4_0.video_fifo_0.ram2port_inst.io1l_io1l_0_3                                                                                                                                      4KX5_4KX5              0                  0       0(0/0/0)                          0(0/0/0)                          (WRITE_FIRST/WRITE_FIRST)                                                                         
                                                                                                                                                                                                                                                                          DDR4_RD_WR_inst_0.DDR_Read_LPDDR4_0.video_fifo_0.ram2port_inst.io1l_io1l_0_4                                                                                                                                      4KX5_4KX5              0                  0       0(0/0/0)                          0(0/0/0)                          (WRITE_FIRST/WRITE_FIRST)                                                                         
                                                                                                                                                                                                                                                                          DDR4_RD_WR_inst_0.DDR_Read_LPDDR4_0.video_fifo_0.ram2port_inst.io1l_io1l_0_5                                                                                                                                      4KX5_4KX5              0                  0       0(0/0/0)                          0(0/0/0)                          (WRITE_FIRST/WRITE_FIRST)                                                                         
                                                                                                                                                                                                                                                                          DDR4_RD_WR_inst_0.DDR_Read_LPDDR4_0.video_fifo_0.ram2port_inst.io1l_io1l_0_6                                                                                                                                      4KX5_4KX5              0                  0       0(0/0/0)                          0(0/0/0)                          (WRITE_FIRST/WRITE_FIRST)                                                                         
                                                                                                                                                                                                                                                                          DDR4_RD_WR_inst_0.DDR_Read_LPDDR4_0.video_fifo_0.ram2port_inst.io1l_io1l_0_7                                                                                                                                      4KX5_4KX5              0                  0       0(0/0/0)                          0(0/0/0)                          (WRITE_FIRST/WRITE_FIRST)                                                                         
                                                                                                                                                                                                                                                                          DDR4_RD_WR_inst_0.DDR_Read_LPDDR4_0.video_fifo_0.ram2port_inst.io1l_io1l_0_8                                                                                                                                      4KX5_4KX5              0                  0       0(0/0/0)                          0(0/0/0)                          (WRITE_FIRST/WRITE_FIRST)                                                                         
                                                                                                                                                                                                                                                                          DDR4_RD_WR_inst_0.DDR_Read_LPDDR4_0.video_fifo_0.ram2port_inst.io1l_io1l_0_9                                                                                                                                      4KX5_4KX5              0                  0       0(0/0/0)                          0(0/0/0)                          (WRITE_FIRST/WRITE_FIRST)                                                                         
                                                                                                                                                                                                                                                                          DDR4_RD_WR_inst_0.DDR_Read_LPDDR4_0.video_fifo_0.ram2port_inst.io1l_io1l_0_10                                                                                                                                     4KX5_4KX5              0                  0       0(0/0/0)                          0(0/0/0)                          (WRITE_FIRST/WRITE_FIRST)                                                                         
                                                                                                                                                                                                                                                                          DDR4_RD_WR_inst_0.DDR_Read_LPDDR4_0.video_fifo_0.ram2port_inst.io1l_io1l_0_11                                                                                                                                     4KX5_4KX5              0                  0       0(0/0/0)                          0(0/0/0)                          (WRITE_FIRST/WRITE_FIRST)                                                                         
                                                                                                                                                                                                                                                                          DDR4_RD_WR_inst_0.DDR_Read_LPDDR4_0.video_fifo_0.ram2port_inst.io1l_io1l_0_12                                                                                                                                     4KX5_4KX5              0                  0       0(0/0/0)                          0(0/0/0)                          (WRITE_FIRST/WRITE_FIRST)                                                                         
                                                                                                                                                                                                                                                                          DDR4_RD_WR_inst_0.DDR_Read_LPDDR4_0.video_fifo_0.ram2port_inst.io1l_io1l_0_13                                                                                                                                     4KX5_4KX5              0                  0       0(0/0/0)                          0(0/0/0)                          (WRITE_FIRST/WRITE_FIRST)                                                                         
                                                                                                                                                                                                                                                                          DDR4_RD_WR_inst_0.DDR_Read_LPDDR4_0.video_fifo_0.ram2port_inst.io1l_io1l_0_14                                                                                                                                     4KX5_4KX5              0                  0       0(0/0/0)                          0(0/0/0)                          (WRITE_FIRST/WRITE_FIRST)                                                                         
                                                                                                                                                                                                                                                                          DDR4_RD_WR_inst_0.DDR_Read_LPDDR4_0.video_fifo_0.ram2port_inst.io1l_io1l_0_15                                                                                                                                     4KX5_4KX5              0                  0       0(0/0/0)                          0(0/0/0)                          (WRITE_FIRST/WRITE_FIRST)                                                                         
                                                                                                                                                                                                                                                                          DDR4_RD_WR_inst_0.DDR_Read_LPDDR4_0.video_fifo_0.ram2port_inst.io1l_io1l_0_16                                                                                                                                     4KX5_4KX5              0                  0       0(0/0/0)                          0(0/0/0)                          (WRITE_FIRST/WRITE_FIRST)                                                                         
                                                                                                                                                                                                                                                                          DDR4_RD_WR_inst_0.DDR_Read_LPDDR4_0.video_fifo_0.ram2port_inst.io1l_io1l_0_17                                                                                                                                     4KX5_4KX5              0                  0       0(0/0/0)                          0(0/0/0)                          (WRITE_FIRST/WRITE_FIRST)                                                                         
                                                                                                                                                                                                                                                                          DDR4_RD_WR_inst_0.DDR_Read_LPDDR4_0.video_fifo_0.ram2port_inst.io1l_io1l_0_18                                                                                                                                     4KX5_4KX5              0                  0       0(0/0/0)                          0(0/0/0)                          (WRITE_FIRST/WRITE_FIRST)                                                                         
                                                                                                                                                                                                                                                                          DDR4_RD_WR_inst_0.DDR_Read_LPDDR4_0.video_fifo_0.ram2port_inst.io1l_io1l_0_19                                                                                                                                     4KX5_4KX5              0                  0       0(0/0/0)                          0(0/0/0)                          (WRITE_FIRST/WRITE_FIRST)                                                                         
                                                                                                                                                                                                                                                                          DDR4_RD_WR_inst_0.DDR_Read_LPDDR4_0.video_fifo_0.ram2port_inst.io1l_io1l_0_20                                                                                                                                     4KX5_4KX5              0                  0       0(0/0/0)                          0(0/0/0)                          (WRITE_FIRST/WRITE_FIRST)                                                                         
                                                                                                                                                                                                                                                                          DDR4_RD_WR_inst_0.DDR_Read_LPDDR4_0.video_fifo_0.ram2port_inst.io1l_io1l_0_21                                                                                                                                     4KX5_4KX5              0                  0       0(0/0/0)                          0(0/0/0)                          (WRITE_FIRST/WRITE_FIRST)                                                                         
                                                                                                                                                                                                                                                                          DDR4_RD_WR_inst_0.DDR_Read_LPDDR4_0.video_fifo_0.ram2port_inst.io1l_io1l_0_22                                                                                                                                     4KX5_4KX5              0                  0       0(0/0/0)                          0(0/0/0)                          (WRITE_FIRST/WRITE_FIRST)                                                                         
                                                                                                                                                                                                                                                                          DDR4_RD_WR_inst_0.DDR_Read_LPDDR4_0.video_fifo_0.ram2port_inst.io1l_io1l_0_23                                                                                                                                     4KX5_4KX5              0                  0       0(0/0/0)                          0(0/0/0)                          (WRITE_FIRST/WRITE_FIRST)                                                                         
                                                                                                                                                                                                                                                                          DDR4_RD_WR_inst_0.DDR_Read_LPDDR4_0.video_fifo_0.ram2port_inst.io1l_io1l_0_24                                                                                                                                     4KX5_4KX5              0                  0       0(0/0/0)                          0(0/0/0)                          (WRITE_FIRST/WRITE_FIRST)                                                                         
                                                                                                                                                                                                                                                                          DDR4_RD_WR_inst_0.DDR_Read_LPDDR4_0.video_fifo_0.ram2port_inst.io1l_io1l_0_25                                                                                                                                     4KX5_4KX5              0                  0       0(0/0/0)                          0(0/0/0)                          (WRITE_FIRST/WRITE_FIRST)                                                                         
                                                                                                                                                                                                                                                                          DDR4_RD_WR_inst_0.DDR_Read_LPDDR4_0.video_fifo_0.ram2port_inst.io1l_io1l_0_26                                                                                                                                     4KX5_4KX5              0                  0       0(0/0/0)                          0(0/0/0)                          (WRITE_FIRST/WRITE_FIRST)                                                                         
                                                                                                                                                                                                                                                                          DDR4_RD_WR_inst_0.DDR_Read_LPDDR4_0.video_fifo_0.ram2port_inst.io1l_io1l_0_27                                                                                                                                     4KX5_4KX5              0                  0       0(0/0/0)                          0(0/0/0)                          (WRITE_FIRST/WRITE_FIRST)                                                                         
                                                                                                                                                                                                                                                                          DDR4_RD_WR_inst_0.DDR_Read_LPDDR4_0.video_fifo_0.ram2port_inst.io1l_io1l_0_28                                                                                                                                     4KX5_4KX5              0                  0       0(0/0/0)                          0(0/0/0)                          (WRITE_FIRST/WRITE_FIRST)                                                                         
                                                                                                                                                                                                                                                                          DDR4_RD_WR_inst_0.DDR_Read_LPDDR4_0.video_fifo_0.ram2port_inst.io1l_io1l_0_29                                                                                                                                     4KX5_4KX5              0                  0       0(0/0/0)                          0(0/0/0)                          (WRITE_FIRST/WRITE_FIRST)                                                                         
                                                                                                                                                                                                                                                                          DDR4_RD_WR_inst_0.DDR_Read_LPDDR4_0.video_fifo_0.ram2port_inst.io1l_io1l_0_30                                                                                                                                     4KX5_4KX5              0                  0       0(0/0/0)                          0(0/0/0)                          (WRITE_FIRST/WRITE_FIRST)                                                                         
                                                                                                                                                                                                                                                                          DDR4_RD_WR_inst_0.DDR_Read_LPDDR4_0.video_fifo_0.ram2port_inst.io1l_io1l_0_31                                                                                                                                     4KX5_4KX5              0                  0       0(0/0/0)                          0(0/0/0)                          (WRITE_FIRST/WRITE_FIRST)                                                                         
                                                                                                                                                                                                                                                                          DDR4_RD_WR_inst_0.DDR_Read_LPDDR4_0.video_fifo_0.ram2port_inst.io1l_io1l_0_32                                                                                                                                     4KX5_4KX5              0                  0       0(0/0/0)                          0(0/0/0)                          (WRITE_FIRST/WRITE_FIRST)                                                                         
                                                                                                                                                                                                                                                                          DDR4_RD_WR_inst_0.DDR_Read_LPDDR4_0.video_fifo_0.ram2port_inst.io1l_io1l_0_33                                                                                                                                     4KX5_4KX5              0                  0       0(0/0/0)                          0(0/0/0)                          (WRITE_FIRST/WRITE_FIRST)                                                                         
                                                                                                                                                                                                                                                                          DDR4_RD_WR_inst_0.DDR_Read_LPDDR4_0.video_fifo_0.ram2port_inst.io1l_io1l_0_34                                                                                                                                     4KX5_4KX5              0                  0       0(0/0/0)                          0(0/0/0)                          (WRITE_FIRST/WRITE_FIRST)                                                                         
                                                                                                                                                                                                                                                                          DDR4_RD_WR_inst_0.DDR_Read_LPDDR4_0.video_fifo_0.ram2port_inst.io1l_io1l_0_35                                                                                                                                     4KX5_4KX5              0                  0       0(0/0/0)                          0(0/0/0)                          (WRITE_FIRST/WRITE_FIRST)                                                                         
                                                                                                                                                                                                                                                                          DDR4_RD_WR_inst_0.DDR_Read_LPDDR4_0.video_fifo_0.ram2port_inst.io1l_io1l_0_36                                                                                                                                     4KX5_4KX5              0                  0       0(0/0/0)                          0(0/0/0)                          (WRITE_FIRST/WRITE_FIRST)                                                                         
                                                                                                                                                                                                                                                                          DDR4_RD_WR_inst_0.DDR_Read_LPDDR4_0.video_fifo_0.ram2port_inst.io1l_io1l_0_37                                                                                                                                     4KX5_4KX5              0                  0       0(0/0/0)                          0(0/0/0)                          (WRITE_FIRST/WRITE_FIRST)                                                                         
                                                                                                                                                                                                                                                                          DDR4_RD_WR_inst_0.DDR_Read_LPDDR4_0.video_fifo_0.ram2port_inst.io1l_io1l_0_38                                                                                                                                     4KX5_4KX5              0                  0       0(0/0/0)                          0(0/0/0)                          (WRITE_FIRST/WRITE_FIRST)                                                                         
                                                                                                                                                                                                                                                                          DDR4_RD_WR_inst_0.DDR_Read_LPDDR4_0.video_fifo_0.ram2port_inst.io1l_io1l_0_39                                                                                                                                     4KX5_4KX5              0                  0       0(0/0/0)                          0(0/0/0)                          (WRITE_FIRST/WRITE_FIRST)                                                                         
                                                                                                                                                                                                                                                                          DDR4_RD_WR_inst_0.DDR_Read_LPDDR4_0.video_fifo_0.ram2port_inst.io1l_io1l_0_40                                                                                                                                     4KX5_4KX5              0                  0       0(0/0/0)                          0(0/0/0)                          (WRITE_FIRST/WRITE_FIRST)                                                                         
                                                                                                                                                                                                                                                                          DDR4_RD_WR_inst_0.DDR_Read_LPDDR4_0.video_fifo_0.ram2port_inst.io1l_io1l_0_41                                                                                                                                     4KX5_4KX5              0                  0       0(0/0/0)                          0(0/0/0)                          (WRITE_FIRST/WRITE_FIRST)                                                                         
                                                                                                                                                                                                                                                                          DDR4_RD_WR_inst_0.DDR_Read_LPDDR4_0.video_fifo_0.ram2port_inst.io1l_io1l_0_42                                                                                                                                     4KX5_4KX5              0                  0       0(0/0/0)                          0(0/0/0)                          (WRITE_FIRST/WRITE_FIRST)                                                                         
                                                                                                                                                                                                                                                                          DDR4_RD_WR_inst_0.DDR_Read_LPDDR4_0.video_fifo_0.ram2port_inst.io1l_io1l_0_43                                                                                                                                     4KX5_4KX5              0                  0       0(0/0/0)                          0(0/0/0)                          (WRITE_FIRST/WRITE_FIRST)                                                                         
                                                                                                                                                                                                                                                                          DDR4_RD_WR_inst_0.DDR_Read_LPDDR4_0.video_fifo_0.ram2port_inst.io1l_io1l_0_44                                                                                                                                     4KX5_4KX5              0                  0       0(0/0/0)                          0(0/0/0)                          (WRITE_FIRST/WRITE_FIRST)                                                                         
                                                                                                                                                                                                                                                                          DDR4_RD_WR_inst_0.DDR_Read_LPDDR4_0.video_fifo_0.ram2port_inst.io1l_io1l_0_45                                                                                                                                     4KX5_4KX5              0                  0       0(0/0/0)                          0(0/0/0)                          (WRITE_FIRST/WRITE_FIRST)                                                                         
                                                                                                                                                                                                                                                                          DDR4_RD_WR_inst_0.DDR_Read_LPDDR4_0.video_fifo_0.ram2port_inst.io1l_io1l_0_46                                                                                                                                     4KX5_4KX5              0                  0       0(0/0/0)                          0(0/0/0)                          (WRITE_FIRST/WRITE_FIRST)                                                                         
                                                                                                                                                                                                                                                                          DDR4_RD_WR_inst_0.DDR_Read_LPDDR4_0.video_fifo_0.ram2port_inst.io1l_io1l_0_47                                                                                                                                     4KX5_4KX5              0                  0       0(0/0/0)                          0(0/0/0)                          (WRITE_FIRST/WRITE_FIRST)                                                                         
                                                                                                                                                                                                                                                                          DDR4_RD_WR_inst_0.DDR_Read_LPDDR4_0.video_fifo_0.ram2port_inst.io1l_io1l_0_48                                                                                                                                     4KX5_4KX5              0                  0       0(0/0/0)                          0(0/0/0)                          (WRITE_FIRST/WRITE_FIRST)                                                                         
                                                                                                                                                                                                                                                                          DDR4_RD_WR_inst_0.DDR_Read_LPDDR4_0.video_fifo_0.ram2port_inst.io1l_io1l_0_49                                                                                                                                     4KX5_4KX5              0                  0       0(0/0/0)                          0(0/0/0)                          (WRITE_FIRST/WRITE_FIRST)                                                                         
                                                                                                                                                                                                                                                                          DDR4_RD_WR_inst_0.DDR_Read_LPDDR4_0.video_fifo_0.ram2port_inst.io1l_io1l_0_50                                                                                                                                     4KX5_4KX5              0                  0       0(0/0/0)                          0(0/0/0)                          (WRITE_FIRST/WRITE_FIRST)                                                                         
                                                                                                                                                                                                                                                                          DDR4_RD_WR_inst_0.DDR_Read_LPDDR4_0.video_fifo_0.ram2port_inst.io1l_io1l_0_51                                                                                                                                     4KX5_4KX5              0                  0       0(0/0/0)                          0(0/0/0)                          (WRITE_FIRST/WRITE_FIRST)                                                                         
                                                                                                                                                                                                                                                                          DDR4_RD_WR_inst_0.DDR_Read_LPDDR4_0.video_fifo_0.ram2port_inst.io1l_io1l_0_52                                                                                                                                     4KX5_4KX5              0                  0       0(0/0/0)                          0(0/0/0)                          (WRITE_FIRST/WRITE_FIRST)                                                                         
                                                                                                                                                                                                                                                                          DDR4_RD_WR_inst_0.DDR_Read_LPDDR4_0.video_fifo_0.ram2port_inst.io1l_io1l_0_53                                                                                                                                     4KX5_4KX5              0                  0       0(0/0/0)                          0(0/0/0)                          (WRITE_FIRST/WRITE_FIRST)                                                                         
                                                                                                                                                                                                                                                                          DDR4_RD_WR_inst_0.DDR_Read_LPDDR4_0.video_fifo_0.ram2port_inst.io1l_io1l_0_54                                                                                                                                     4KX5_4KX5              0                  0       0(0/0/0)                          0(0/0/0)                          (WRITE_FIRST/WRITE_FIRST)                                                                         
                                                                                                                                                                                                                                                                          DDR4_RD_WR_inst_0.DDR_Read_LPDDR4_0.video_fifo_0.ram2port_inst.io1l_io1l_0_55                                                                                                                                     4KX5_4KX5              0                  0       0(0/0/0)                          0(0/0/0)                          (WRITE_FIRST/WRITE_FIRST)                                                                         
                                                                                                                                                                                                                                                                          DDR4_RD_WR_inst_0.DDR_Read_LPDDR4_0.video_fifo_0.ram2port_inst.io1l_io1l_0_56                                                                                                                                     4KX5_4KX5              0                  0       0(0/0/0)                          0(0/0/0)                          (WRITE_FIRST/WRITE_FIRST)                                                                         
                                                                                                                                                                                                                                                                          DDR4_RD_WR_inst_0.DDR_Read_LPDDR4_0.video_fifo_0.ram2port_inst.io1l_io1l_0_57                                                                                                                                     4KX5_4KX5              0                  0       0(0/0/0)                          0(0/0/0)                          (WRITE_FIRST/WRITE_FIRST)                                                                         
                                                                                                                                                                                                                                                                          DDR4_RD_WR_inst_0.DDR_Read_LPDDR4_0.video_fifo_0.ram2port_inst.io1l_io1l_0_58                                                                                                                                     4KX5_4KX5              0                  0       0(0/0/0)                          0(0/0/0)                          (WRITE_FIRST/WRITE_FIRST)                                                                         
                                                                                                                                                                                                                                                                          DDR4_RD_WR_inst_0.DDR_Read_LPDDR4_0.video_fifo_0.ram2port_inst.io1l_io1l_0_59                                                                                                                                     4KX5_4KX5              0                  0       0(0/0/0)                          0(0/0/0)                          (WRITE_FIRST/WRITE_FIRST)                                                                         
                                                                                                                                                                                                                                                                          DDR4_RD_WR_inst_0.DDR_Read_LPDDR4_0.video_fifo_0.ram2port_inst.io1l_io1l_0_60                                                                                                                                     4KX5_4KX5              0                  0       0(0/0/0)                          0(0/0/0)                          (WRITE_FIRST/WRITE_FIRST)                                                                         
                                                                                                                                                                                                                                                                          DDR4_RD_WR_inst_0.DDR_Read_LPDDR4_0.video_fifo_0.ram2port_inst.io1l_io1l_0_61                                                                                                                                     4KX5_4KX5              0                  0       0(0/0/0)                          0(0/0/0)                          (WRITE_FIRST/WRITE_FIRST)                                                                         
                                                                                                                                                                                                                                                                          DDR4_RD_WR_inst_0.DDR_Read_LPDDR4_0.video_fifo_0.ram2port_inst.io1l_io1l_0_62                                                                                                                                     4KX5_4KX5              0                  0       0(0/0/0)                          0(0/0/0)                          (WRITE_FIRST/WRITE_FIRST)                                                                         
                                                                                                                                                                                                                                                                          DDR4_RD_WR_inst_0.DDR_Read_LPDDR4_0.video_fifo_0.ram2port_inst.io1l_io1l_0_63                                                                                                                                     4KX5_4KX5              0                  0       0(0/0/0)                          0(0/0/0)                          (WRITE_FIRST/WRITE_FIRST)                                                                         
                                                                                                                                                                                                                                                                          DDR4_RD_WR_inst_0.DDR_Read_LPDDR4_0.video_fifo_0.ram2port_inst.io1l_io1l_0_64                                                                                                                                     4KX5_4KX5              0                  0       0(0/0/0)                          0(0/0/0)                          (WRITE_FIRST/WRITE_FIRST)                                                                         
                                                                                                                                                                                                                                                                          DDR4_RD_WR_inst_0.DDR_Read_LPDDR4_0.video_fifo_0.ram2port_inst.io1l_io1l_0_65                                                                                                                                     4KX5_4KX5              0                  0       0(0/0/0)                          0(0/0/0)                          (WRITE_FIRST/WRITE_FIRST)                                                                         
                                                                                                                                                                                                                                                                          DDR4_RD_WR_inst_0.DDR_Read_LPDDR4_0.video_fifo_0.ram2port_inst.io1l_io1l_0_66                                                                                                                                     4KX5_4KX5              0                  0       0(0/0/0)                          0(0/0/0)                          (WRITE_FIRST/WRITE_FIRST)                                                                         
                                                                                                                                                                                                                                                                          DDR4_RD_WR_inst_0.DDR_Read_LPDDR4_0.video_fifo_0.ram2port_inst.io1l_io1l_0_67                                                                                                                                     4KX5_4KX5              0                  0       0(0/0/0)                          0(0/0/0)                          (WRITE_FIRST/WRITE_FIRST)                                                                         
                                                                                                                                                                                                                                                                          DDR4_RD_WR_inst_0.DDR_Read_LPDDR4_0.video_fifo_0.ram2port_inst.io1l_io1l_0_68                                                                                                                                     4KX5_4KX5              0                  0       0(0/0/0)                          0(0/0/0)                          (WRITE_FIRST/WRITE_FIRST)                                                                         
                                                                                                                                                                                                                                                                          DDR4_RD_WR_inst_0.DDR_Read_LPDDR4_0.video_fifo_0.ram2port_inst.io1l_io1l_0_69                                                                                                                                     4KX5_4KX5              0                  0       0(0/0/0)                          0(0/0/0)                          (WRITE_FIRST/WRITE_FIRST)                                                                         
                                                                                                                                                                                                                                                                          DDR4_RD_WR_inst_0.DDR_Read_LPDDR4_0.video_fifo_0.ram2port_inst.io1l_io1l_0_70                                                                                                                                     4KX5_4KX5              0                  0       0(0/0/0)                          0(0/0/0)                          (WRITE_FIRST/WRITE_FIRST)                                                                         
                                                                                                                                                                                                                                                                          DDR4_RD_WR_inst_0.DDR_Read_LPDDR4_0.video_fifo_0.ram2port_inst.io1l_io1l_0_71                                                                                                                                     4KX5_4KX5              0                  0       0(0/0/0)                          0(0/0/0)                          (WRITE_FIRST/WRITE_FIRST)                                                                         
                                                                                                                                                                                                                                                                          DDR4_RD_WR_inst_0.DDR_Read_LPDDR4_0.video_fifo_0.ram2port_inst.io1l_io1l_0_72                                                                                                                                     4KX5_4KX5              0                  0       0(0/0/0)                          0(0/0/0)                          (WRITE_FIRST/WRITE_FIRST)                                                                         
                                                                                                                                                                                                                                                                          DDR4_RD_WR_inst_0.DDR_Read_LPDDR4_0.video_fifo_0.ram2port_inst.io1l_io1l_0_73                                                                                                                                     4KX5_4KX5              0                  0       0(0/0/0)                          0(0/0/0)                          (WRITE_FIRST/WRITE_FIRST)                                                                         
                                                                                                                                                                                                                                                                          DDR4_RD_WR_inst_0.DDR_Read_LPDDR4_0.video_fifo_0.ram2port_inst.io1l_io1l_0_74                                                                                                                                     4KX5_4KX5              0                  0       0(0/0/0)                          0(0/0/0)                          (WRITE_FIRST/WRITE_FIRST)                                                                         
                                                                                                                                                                                                                                                                          DDR4_RD_WR_inst_0.DDR_Read_LPDDR4_0.video_fifo_0.ram2port_inst.io1l_io1l_0_75                                                                                                                                     4KX5_4KX5              0                  0       0(0/0/0)                          0(0/0/0)                          (WRITE_FIRST/WRITE_FIRST)                                                                         
                                                                                                                                                                                                                                                                          DDR4_RD_WR_inst_0.DDR_Read_LPDDR4_0.video_fifo_0.ram2port_inst.io1l_io1l_0_76                                                                                                                                     4KX5_4KX5              0                  0       0(0/0/0)                          0(0/0/0)                          (WRITE_FIRST/WRITE_FIRST)                                                                         
                                                                                                                                                                                                                                                                          DDR4_RD_WR_inst_0.DDR_Read_LPDDR4_0.video_fifo_0.ram2port_inst.io1l_io1l_0_77                                                                                                                                     4KX5_4KX5              0                  0       0(0/0/0)                          0(0/0/0)                          (WRITE_FIRST/WRITE_FIRST)                                                                         
                                                                                                                                                                                                                                                                          DDR4_RD_WR_inst_0.DDR_Read_LPDDR4_0.video_fifo_0.ram2port_inst.io1l_io1l_0_78                                                                                                                                     4KX5_4KX5              0                  0       0(0/0/0)                          0(0/0/0)                          (WRITE_FIRST/WRITE_FIRST)                                                                         
                                                                                                                                                                                                                                                                          DDR4_RD_WR_inst_0.DDR_Read_LPDDR4_0.video_fifo_0.ram2port_inst.io1l_io1l_0_79                                                                                                                                     4KX5_4KX5              0                  0       0(0/0/0)                          0(0/0/0)                          (WRITE_FIRST/WRITE_FIRST)                                                                         
                                                                                                                                                                                                                                                                          DDR4_RD_WR_inst_0.DDR_Read_LPDDR4_0.video_fifo_0.ram2port_inst.io1l_io1l_0_80                                                                                                                                     4KX5_4KX5              0                  0       0(0/0/0)                          0(0/0/0)                          (WRITE_FIRST/WRITE_FIRST)                                                                         
                                                                                                                                                                                                                                                                          DDR4_RD_WR_inst_0.DDR_Read_LPDDR4_0.video_fifo_0.ram2port_inst.io1l_io1l_0_81                                                                                                                                     4KX5_4KX5              0                  0       0(0/0/0)                          0(0/0/0)                          (WRITE_FIRST/WRITE_FIRST)                                                                         
                                                                                                                                                                                                                                                                          DDR4_RD_WR_inst_0.DDR_Read_LPDDR4_0.video_fifo_0.ram2port_inst.io1l_io1l_0_82                                                                                                                                     4KX5_4KX5              0                  0       0(0/0/0)                          0(0/0/0)                          (WRITE_FIRST/WRITE_FIRST)                                                                         
                                                                                                                                                                                                                                                                          DDR4_RD_WR_inst_0.DDR_Read_LPDDR4_0.video_fifo_0.ram2port_inst.io1l_io1l_0_83                                                                                                                                     4KX5_4KX5              0                  0       0(0/0/0)                          0(0/0/0)                          (WRITE_FIRST/WRITE_FIRST)                                                                         
                                                                                                                                                                                                                                                                          DDR4_RD_WR_inst_0.DDR_Read_LPDDR4_0.video_fifo_0.ram2port_inst.io1l_io1l_0_84                                                                                                                                     4KX5_4KX5              0                  0       0(0/0/0)                          0(0/0/0)                          (WRITE_FIRST/WRITE_FIRST)                                                                         
                                                                                                                                                                                                                                                                          DDR4_RD_WR_inst_0.DDR_Read_LPDDR4_0.video_fifo_0.ram2port_inst.io1l_io1l_0_85                                                                                                                                     4KX5_4KX5              0                  0       0(0/0/0)                          0(0/0/0)                          (WRITE_FIRST/WRITE_FIRST)                                                                         
                                                                                                                                                                                                                                                                          DDR4_RD_WR_inst_0.DDR_Read_LPDDR4_0.video_fifo_0.ram2port_inst.io1l_io1l_0_86                                                                                                                                     4KX5_4KX5              0                  0       0(0/0/0)                          0(0/0/0)                          (WRITE_FIRST/WRITE_FIRST)                                                                         
                                                                                                                                                                                                                                                                          DDR4_RD_WR_inst_0.DDR_Read_LPDDR4_0.video_fifo_0.ram2port_inst.io1l_io1l_0_87                                                                                                                                     4KX5_4KX5              0                  0       0(0/0/0)                          0(0/0/0)                          (WRITE_FIRST/WRITE_FIRST)                                                                         
                                                                                                                                                                                                                                                                          DDR4_RD_WR_inst_0.DDR_Read_LPDDR4_0.video_fifo_0.ram2port_inst.io1l_io1l_0_88                                                                                                                                     4KX5_4KX5              0                  0       0(0/0/0)                          0(0/0/0)                          (WRITE_FIRST/WRITE_FIRST)                                                                         
                                                                                                                                                                                                                                                                          DDR4_RD_WR_inst_0.DDR_Read_LPDDR4_0.video_fifo_0.ram2port_inst.io1l_io1l_0_89                                                                                                                                     4KX5_4KX5              0                  0       0(0/0/0)                          0(0/0/0)                          (WRITE_FIRST/WRITE_FIRST)                                                                         
                                                                                                                                                                                                                                                                          DDR4_RD_WR_inst_0.DDR_Read_LPDDR4_0.video_fifo_0.ram2port_inst.io1l_io1l_0_90                                                                                                                                     4KX5_4KX5              0                  0       0(0/0/0)                          0(0/0/0)                          (WRITE_FIRST/WRITE_FIRST)                                                                         
                                                                                                                                                                                                                                                                          DDR4_RD_WR_inst_0.DDR_Read_LPDDR4_0.video_fifo_0.ram2port_inst.io1l_io1l_0_91                                                                                                                                     4KX5_4KX5              0                  0       0(0/0/0)                          0(0/0/0)                          (WRITE_FIRST/WRITE_FIRST)                                                                         
                                                                                                                                                                                                                                                                          DDR4_RD_WR_inst_0.DDR_Read_LPDDR4_0.video_fifo_0.ram2port_inst.io1l_io1l_0_92                                                                                                                                     4KX5_4KX5              0                  0       0(0/0/0)                          0(0/0/0)                          (WRITE_FIRST/WRITE_FIRST)                                                                         
                                                                                                                                                                                                                                                                          DDR4_RD_WR_inst_0.DDR_Read_LPDDR4_0.video_fifo_0.ram2port_inst.io1l_io1l_0_93                                                                                                                                     4KX5_4KX5              0                  0       0(0/0/0)                          0(0/0/0)                          (WRITE_FIRST/WRITE_FIRST)                                                                         
                                                                                                                                                                                                                                                                          DDR4_RD_WR_inst_0.DDR_Read_LPDDR4_0.video_fifo_0.ram2port_inst.io1l_io1l_0_94                                                                                                                                     4KX5_4KX5              0                  0       0(0/0/0)                          0(0/0/0)                          (WRITE_FIRST/WRITE_FIRST)                                                                         
                                                                                                                                                                                                                                                                          DDR4_RD_WR_inst_0.DDR_Read_LPDDR4_0.video_fifo_0.ram2port_inst.io1l_io1l_0_95                                                                                                                                     4KX5_4KX5              0                  0       0(0/0/0)                          0(0/0/0)                          (WRITE_FIRST/WRITE_FIRST)                                                                         
                                                                                                                                                                                                                                                                          DDR4_RD_WR_inst_0.DDR_Read_LPDDR4_0.video_fifo_0.ram2port_inst.io1l_io1l_0_96                                                                                                                                     4KX5_4KX5              0                  0       0(0/0/0)                          0(0/0/0)                          (WRITE_FIRST/WRITE_FIRST)                                                                         
                                                                                                                                                                                                                                                                          DDR4_RD_WR_inst_0.DDR_Read_LPDDR4_0.video_fifo_0.ram2port_inst.io1l_io1l_0_97                                                                                                                                     4KX5_4KX5              0                  0       0(0/0/0)                          0(0/0/0)                          (WRITE_FIRST/WRITE_FIRST)                                                                         
                                                                                                                                                                                                                                                                          DDR4_RD_WR_inst_0.DDR_Read_LPDDR4_0.video_fifo_0.ram2port_inst.io1l_io1l_0_98                                                                                                                                     4KX5_4KX5              0                  0       0(0/0/0)                          0(0/0/0)                          (WRITE_FIRST/WRITE_FIRST)                                                                         
                                                                                                                                                                                                                                                                          DDR4_RD_WR_inst_0.DDR_Read_LPDDR4_0.video_fifo_0.ram2port_inst.io1l_io1l_0_99                                                                                                                                     4KX5_4KX5              0                  0       0(0/0/0)                          0(0/0/0)                          (WRITE_FIRST/WRITE_FIRST)                                                                         
                                                                                                                                                                                                                                                                          DDR4_RD_WR_inst_0.DDR_Read_LPDDR4_0.video_fifo_0.ram2port_inst.io1l_io1l_0_100                                                                                                                                    4KX5_4KX5              0                  0       1(0/1/1)                          0(0/0/0)                          (WRITE_FIRST/WRITE_FIRST)                                                                         
                                                                                                                                                                                                                                                                          DDR4_RD_WR_inst_0.DDR_Read_LPDDR4_0.video_fifo_0.ram2port_inst.io1l_io1l_0_101                                                                                                                                    4KX5_4KX5              0                  0       1(0/1/1)                          0(0/0/0)                          (WRITE_FIRST/WRITE_FIRST)                                                                         
                                                                                                                                                                                                                                                                          DDR4_RD_WR_inst_0.DDR_Read_LPDDR4_0.video_fifo_0.ram2port_inst.io1l_io1l_0_102                                                                                                                                    4KX4_4KX4              0                  0       1(0/1/1)                          0(0/0/0)                          (WRITE_FIRST/WRITE_FIRST)                                                                         
                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                    
NO               DDR4_RD_WR_inst_0.DDR_Write_LPDDR4_0.video_fifo_0.ram2port_inst.io1l[511:0]                                                                                                                                    RAM                syn_ramstyle=lsram     DDR4_RD_WR_inst_0.DDR_Write_LPDDR4_0.video_fifo_0.ram2port_inst.io1l_io1l_0_0                                                                                                                                     512X40_512X40          0                  0       1(0/1/0)                          1(0/1/0)                          (NO_CHANGE/NO_CHANGE)         Found property syn_ramstyle="lsram". Inferring instance using LSRAM.
                                                                                                                                                                                                                                                                          DDR4_RD_WR_inst_0.DDR_Write_LPDDR4_0.video_fifo_0.ram2port_inst.io1l_io1l_0_1                                                                                                                                     512X40_512X40          0                  0       1(0/1/0)                          1(0/1/0)                          (NO_CHANGE/NO_CHANGE)                                                                             
                                                                                                                                                                                                                                                                          DDR4_RD_WR_inst_0.DDR_Write_LPDDR4_0.video_fifo_0.ram2port_inst.io1l_io1l_0_2                                                                                                                                     512X40_512X40          0                  0       1(0/1/0)                          1(0/1/0)                          (NO_CHANGE/NO_CHANGE)                                                                             
                                                                                                                                                                                                                                                                          DDR4_RD_WR_inst_0.DDR_Write_LPDDR4_0.video_fifo_0.ram2port_inst.io1l_io1l_0_3                                                                                                                                     512X40_512X40          0                  0       1(0/1/0)                          1(0/1/0)                          (NO_CHANGE/NO_CHANGE)                                                                             
                                                                                                                                                                                                                                                                          DDR4_RD_WR_inst_0.DDR_Write_LPDDR4_0.video_fifo_0.ram2port_inst.io1l_io1l_0_4                                                                                                                                     512X40_512X40          0                  0       1(0/1/0)                          1(0/1/0)                          (NO_CHANGE/NO_CHANGE)                                                                             
                                                                                                                                                                                                                                                                          DDR4_RD_WR_inst_0.DDR_Write_LPDDR4_0.video_fifo_0.ram2port_inst.io1l_io1l_0_5                                                                                                                                     512X40_512X40          0                  0       1(0/1/0)                          1(0/1/0)                          (NO_CHANGE/NO_CHANGE)                                                                             
                                                                                                                                                                                                                                                                          DDR4_RD_WR_inst_0.DDR_Write_LPDDR4_0.video_fifo_0.ram2port_inst.io1l_io1l_0_6                                                                                                                                     512X40_512X40          0                  0       1(0/1/0)                          1(0/1/0)                          (NO_CHANGE/NO_CHANGE)                                                                             
                                                                                                                                                                                                                                                                          DDR4_RD_WR_inst_0.DDR_Write_LPDDR4_0.video_fifo_0.ram2port_inst.io1l_io1l_0_7                                                                                                                                     512X40_512X40          0                  0       1(0/1/0)                          1(0/1/0)                          (NO_CHANGE/NO_CHANGE)                                                                             
                                                                                                                                                                                                                                                                          DDR4_RD_WR_inst_0.DDR_Write_LPDDR4_0.video_fifo_0.ram2port_inst.io1l_io1l_0_8                                                                                                                                     512X40_512X40          0                  0       1(0/1/0)                          1(0/1/0)                          (NO_CHANGE/NO_CHANGE)                                                                             
                                                                                                                                                                                                                                                                          DDR4_RD_WR_inst_0.DDR_Write_LPDDR4_0.video_fifo_0.ram2port_inst.io1l_io1l_0_9                                                                                                                                     512X40_512X40          0                  0       1(0/1/0)                          1(0/1/0)                          (NO_CHANGE/NO_CHANGE)                                                                             
                                                                                                                                                                                                                                                                          DDR4_RD_WR_inst_0.DDR_Write_LPDDR4_0.video_fifo_0.ram2port_inst.io1l_io1l_0_10                                                                                                                                    512X40_512X40          0                  0       1(0/1/0)                          1(0/1/0)                          (NO_CHANGE/NO_CHANGE)                                                                             
                                                                                                                                                                                                                                                                          DDR4_RD_WR_inst_0.DDR_Write_LPDDR4_0.video_fifo_0.ram2port_inst.io1l_io1l_0_11                                                                                                                                    512X40_512X40          0                  0       1(0/1/0)                          1(0/1/0)                          (NO_CHANGE/NO_CHANGE)                                                                             
                                                                                                                                                                                                                                                                          DDR4_RD_WR_inst_0.DDR_Write_LPDDR4_0.video_fifo_0.ram2port_inst.io1l_io1l_0_12                                                                                                                                    512X40_512X40          0                  0       1(0/1/0)                          1(0/1/0)                          (NO_CHANGE/NO_CHANGE)                                                                             
                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                    
NO               DDR4_RD_WR_inst_0.video_processing_0.Bayer_Interpolation_C0_0.Bayer_Interpolation_C0_0.Bayer_Native_FORMAT\.Bayer_Native_INST_0.bayer_interpolation_1pix\.Bayer_Interpolation_1pix_inst.RAM1_INST.ram[7:0]     RAM                syn_ramstyle=lsram     DDR4_RD_WR_inst_0.video_processing_0.Bayer_Interpolation_C0_0.Bayer_Interpolation_C0_0.Bayer_Native_FORMAT\.Bayer_Native_INST_0.bayer_interpolation_1pix\.Bayer_Interpolation_1pix_inst.RAM1_INST.ram_ram_0_0     2KX10_2KX10            0                  0       1(0/1/1)                          0(0/0/0)                          (NO_CHANGE/NO_CHANGE)         Found property syn_ramstyle="lsram". Inferring instance using LSRAM.
                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                    
NO               DDR4_RD_WR_inst_0.video_processing_0.Bayer_Interpolation_C0_0.Bayer_Interpolation_C0_0.Bayer_Native_FORMAT\.Bayer_Native_INST_0.bayer_interpolation_1pix\.Bayer_Interpolation_1pix_inst.RAM2_INST.ram[7:0]     RAM                syn_ramstyle=lsram     DDR4_RD_WR_inst_0.video_processing_0.Bayer_Interpolation_C0_0.Bayer_Interpolation_C0_0.Bayer_Native_FORMAT\.Bayer_Native_INST_0.bayer_interpolation_1pix\.Bayer_Interpolation_1pix_inst.RAM2_INST.ram_ram_0_0     2KX10_2KX10            0                  0       1(0/1/1)                          0(0/0/0)                          (NO_CHANGE/NO_CHANGE)         Found property syn_ramstyle="lsram". Inferring instance using LSRAM.
                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                    
NO               DDR4_RD_WR_inst_0.video_processing_0.Bayer_Interpolation_C0_0.Bayer_Interpolation_C0_0.Bayer_Native_FORMAT\.Bayer_Native_INST_0.bayer_interpolation_1pix\.Bayer_Interpolation_1pix_inst.RAM3_INST.ram[7:0]     RAM                syn_ramstyle=lsram     DDR4_RD_WR_inst_0.video_processing_0.Bayer_Interpolation_C0_0.Bayer_Interpolation_C0_0.Bayer_Native_FORMAT\.Bayer_Native_INST_0.bayer_interpolation_1pix\.Bayer_Interpolation_1pix_inst.RAM3_INST.ram_ram_0_0     2KX10_2KX10            0                  0       1(0/1/1)                          0(0/0/0)                          (NO_CHANGE/NO_CHANGE)         Found property syn_ramstyle="lsram". Inferring instance using LSRAM.
                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                    
NO               DDR4_RD_WR_inst_0.HDMI_TX_C0_0.HDMI_TX_C0_0.HDMI_TX_Native_FORMAT\.HDMI_TX_Native_INST.tx_fifo_top_inst.video_fifo_b.ram2port_hdmi_tx_inst.ram[9:0]                                                            RAM                syn_ramstyle=lsram     DDR4_RD_WR_inst_0.HDMI_TX_C0_0.HDMI_TX_C0_0.HDMI_TX_Native_FORMAT\.HDMI_TX_Native_INST.tx_fifo_top_inst.video_fifo_b.ram2port_hdmi_tx_inst.ram_ram_0_0                                                            1KX20_1KX20            0                  0       0(0/0/0)                          0(0/0/0)                          (WRITE_FIRST/WRITE_FIRST)     Found property syn_ramstyle="lsram". Inferring instance using LSRAM.
                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                    
NO               DDR4_RD_WR_inst_0.HDMI_TX_C0_0.HDMI_TX_C0_0.HDMI_TX_Native_FORMAT\.HDMI_TX_Native_INST.tx_fifo_top_inst.video_fifo_g.ram2port_hdmi_tx_inst.ram[9:0]                                                            RAM                syn_ramstyle=lsram     DDR4_RD_WR_inst_0.HDMI_TX_C0_0.HDMI_TX_C0_0.HDMI_TX_Native_FORMAT\.HDMI_TX_Native_INST.tx_fifo_top_inst.video_fifo_g.ram2port_hdmi_tx_inst.ram_ram_0_0                                                            1KX20_1KX20            0                  0       0(0/0/0)                          0(0/0/0)                          (WRITE_FIRST/WRITE_FIRST)     Found property syn_ramstyle="lsram". Inferring instance using LSRAM.
                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                    
NO               DDR4_RD_WR_inst_0.HDMI_TX_C0_0.HDMI_TX_C0_0.HDMI_TX_Native_FORMAT\.HDMI_TX_Native_INST.tx_fifo_top_inst.video_fifo_r.ram2port_hdmi_tx_inst.ram[9:0]                                                            RAM                syn_ramstyle=lsram     DDR4_RD_WR_inst_0.HDMI_TX_C0_0.HDMI_TX_C0_0.HDMI_TX_Native_FORMAT\.HDMI_TX_Native_INST.tx_fifo_top_inst.video_fifo_r.ram2port_hdmi_tx_inst.ram_ram_0_0                                                            1KX20_1KX20            0                  0       0(0/0/0)                          0(0/0/0)                          (WRITE_FIRST/WRITE_FIRST)     Found property syn_ramstyle="lsram". Inferring instance using LSRAM.
                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                    
YES              DDR4_RD_WR_inst_0.Video_arbiter_top_LPDDR4_0.ddr_rw_arbiter_0.v_wr_data_fifo.genblk24\.UI_ram_wrapper_1.L3_syncnonpipe.genblk1\.fi_te_fi_te_0_LSRAM_top_R0C0                                                   NA                 NA                     DDR4_RD_WR_inst_0.Video_arbiter_top_LPDDR4_0.ddr_rw_arbiter_0.v_wr_data_fifo.genblk24\.UI_ram_wrapper_1.L3_syncnonpipe.genblk1\.fi_te_fi_te_0_LSRAM_top_R0C0                                                      512X40_512X40          NA                 0       0(0/0/0)                          0(0/0/0)                          (NO_CHANGE/NO_CHANGE)                                                                             
                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                    
YES              DDR4_RD_WR_inst_0.Video_arbiter_top_LPDDR4_0.ddr_rw_arbiter_0.v_wr_data_fifo.genblk24\.UI_ram_wrapper_1.L3_syncnonpipe.genblk1\.fi_te_fi_te_0_LSRAM_top_R0C1                                                   NA                 NA                     DDR4_RD_WR_inst_0.Video_arbiter_top_LPDDR4_0.ddr_rw_arbiter_0.v_wr_data_fifo.genblk24\.UI_ram_wrapper_1.L3_syncnonpipe.genblk1\.fi_te_fi_te_0_LSRAM_top_R0C1                                                      512X40_512X40          NA                 0       0(0/0/0)                          0(0/0/0)                          (NO_CHANGE/NO_CHANGE)                                                                             
                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                    
YES              DDR4_RD_WR_inst_0.Video_arbiter_top_LPDDR4_0.ddr_rw_arbiter_0.v_wr_data_fifo.genblk24\.UI_ram_wrapper_1.L3_syncnonpipe.genblk1\.fi_te_fi_te_0_LSRAM_top_R0C10                                                  NA                 NA                     DDR4_RD_WR_inst_0.Video_arbiter_top_LPDDR4_0.ddr_rw_arbiter_0.v_wr_data_fifo.genblk24\.UI_ram_wrapper_1.L3_syncnonpipe.genblk1\.fi_te_fi_te_0_LSRAM_top_R0C10                                                     512X40_512X40          NA                 0       0(0/0/0)                          0(0/0/0)                          (NO_CHANGE/NO_CHANGE)                                                                             
                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                    
YES              DDR4_RD_WR_inst_0.Video_arbiter_top_LPDDR4_0.ddr_rw_arbiter_0.v_wr_data_fifo.genblk24\.UI_ram_wrapper_1.L3_syncnonpipe.genblk1\.fi_te_fi_te_0_LSRAM_top_R0C11                                                  NA                 NA                     DDR4_RD_WR_inst_0.Video_arbiter_top_LPDDR4_0.ddr_rw_arbiter_0.v_wr_data_fifo.genblk24\.UI_ram_wrapper_1.L3_syncnonpipe.genblk1\.fi_te_fi_te_0_LSRAM_top_R0C11                                                     512X40_512X40          NA                 0       0(0/0/0)                          0(0/0/0)                          (NO_CHANGE/NO_CHANGE)                                                                             
                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                    
YES              DDR4_RD_WR_inst_0.Video_arbiter_top_LPDDR4_0.ddr_rw_arbiter_0.v_wr_data_fifo.genblk24\.UI_ram_wrapper_1.L3_syncnonpipe.genblk1\.fi_te_fi_te_0_LSRAM_top_R0C12                                                  NA                 NA                     DDR4_RD_WR_inst_0.Video_arbiter_top_LPDDR4_0.ddr_rw_arbiter_0.v_wr_data_fifo.genblk24\.UI_ram_wrapper_1.L3_syncnonpipe.genblk1\.fi_te_fi_te_0_LSRAM_top_R0C12                                                     512X40_512X40          NA                 0       0(0/0/0)                          0(0/0/0)                          (NO_CHANGE/NO_CHANGE)                                                                             
                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                    
YES              DDR4_RD_WR_inst_0.Video_arbiter_top_LPDDR4_0.ddr_rw_arbiter_0.v_wr_data_fifo.genblk24\.UI_ram_wrapper_1.L3_syncnonpipe.genblk1\.fi_te_fi_te_0_LSRAM_top_R0C2                                                   NA                 NA                     DDR4_RD_WR_inst_0.Video_arbiter_top_LPDDR4_0.ddr_rw_arbiter_0.v_wr_data_fifo.genblk24\.UI_ram_wrapper_1.L3_syncnonpipe.genblk1\.fi_te_fi_te_0_LSRAM_top_R0C2                                                      512X40_512X40          NA                 0       0(0/0/0)                          0(0/0/0)                          (NO_CHANGE/NO_CHANGE)                                                                             
                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                    
YES              DDR4_RD_WR_inst_0.Video_arbiter_top_LPDDR4_0.ddr_rw_arbiter_0.v_wr_data_fifo.genblk24\.UI_ram_wrapper_1.L3_syncnonpipe.genblk1\.fi_te_fi_te_0_LSRAM_top_R0C3                                                   NA                 NA                     DDR4_RD_WR_inst_0.Video_arbiter_top_LPDDR4_0.ddr_rw_arbiter_0.v_wr_data_fifo.genblk24\.UI_ram_wrapper_1.L3_syncnonpipe.genblk1\.fi_te_fi_te_0_LSRAM_top_R0C3                                                      512X40_512X40          NA                 0       0(0/0/0)                          0(0/0/0)                          (NO_CHANGE/NO_CHANGE)                                                                             
                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                    
YES              DDR4_RD_WR_inst_0.Video_arbiter_top_LPDDR4_0.ddr_rw_arbiter_0.v_wr_data_fifo.genblk24\.UI_ram_wrapper_1.L3_syncnonpipe.genblk1\.fi_te_fi_te_0_LSRAM_top_R0C4                                                   NA                 NA                     DDR4_RD_WR_inst_0.Video_arbiter_top_LPDDR4_0.ddr_rw_arbiter_0.v_wr_data_fifo.genblk24\.UI_ram_wrapper_1.L3_syncnonpipe.genblk1\.fi_te_fi_te_0_LSRAM_top_R0C4                                                      512X40_512X40          NA                 0       0(0/0/0)                          0(0/0/0)                          (NO_CHANGE/NO_CHANGE)                                                                             
                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                    
YES              DDR4_RD_WR_inst_0.Video_arbiter_top_LPDDR4_0.ddr_rw_arbiter_0.v_wr_data_fifo.genblk24\.UI_ram_wrapper_1.L3_syncnonpipe.genblk1\.fi_te_fi_te_0_LSRAM_top_R0C5                                                   NA                 NA                     DDR4_RD_WR_inst_0.Video_arbiter_top_LPDDR4_0.ddr_rw_arbiter_0.v_wr_data_fifo.genblk24\.UI_ram_wrapper_1.L3_syncnonpipe.genblk1\.fi_te_fi_te_0_LSRAM_top_R0C5                                                      512X40_512X40          NA                 0       0(0/0/0)                          0(0/0/0)                          (NO_CHANGE/NO_CHANGE)                                                                             
                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                    
YES              DDR4_RD_WR_inst_0.Video_arbiter_top_LPDDR4_0.ddr_rw_arbiter_0.v_wr_data_fifo.genblk24\.UI_ram_wrapper_1.L3_syncnonpipe.genblk1\.fi_te_fi_te_0_LSRAM_top_R0C6                                                   NA                 NA                     DDR4_RD_WR_inst_0.Video_arbiter_top_LPDDR4_0.ddr_rw_arbiter_0.v_wr_data_fifo.genblk24\.UI_ram_wrapper_1.L3_syncnonpipe.genblk1\.fi_te_fi_te_0_LSRAM_top_R0C6                                                      512X40_512X40          NA                 0       0(0/0/0)                          0(0/0/0)                          (NO_CHANGE/NO_CHANGE)                                                                             
                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                    
YES              DDR4_RD_WR_inst_0.Video_arbiter_top_LPDDR4_0.ddr_rw_arbiter_0.v_wr_data_fifo.genblk24\.UI_ram_wrapper_1.L3_syncnonpipe.genblk1\.fi_te_fi_te_0_LSRAM_top_R0C7                                                   NA                 NA                     DDR4_RD_WR_inst_0.Video_arbiter_top_LPDDR4_0.ddr_rw_arbiter_0.v_wr_data_fifo.genblk24\.UI_ram_wrapper_1.L3_syncnonpipe.genblk1\.fi_te_fi_te_0_LSRAM_top_R0C7                                                      512X40_512X40          NA                 0       0(0/0/0)                          0(0/0/0)                          (NO_CHANGE/NO_CHANGE)                                                                             
                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                    
YES              DDR4_RD_WR_inst_0.Video_arbiter_top_LPDDR4_0.ddr_rw_arbiter_0.v_wr_data_fifo.genblk24\.UI_ram_wrapper_1.L3_syncnonpipe.genblk1\.fi_te_fi_te_0_LSRAM_top_R0C8                                                   NA                 NA                     DDR4_RD_WR_inst_0.Video_arbiter_top_LPDDR4_0.ddr_rw_arbiter_0.v_wr_data_fifo.genblk24\.UI_ram_wrapper_1.L3_syncnonpipe.genblk1\.fi_te_fi_te_0_LSRAM_top_R0C8                                                      512X40_512X40          NA                 0       0(0/0/0)                          0(0/0/0)                          (NO_CHANGE/NO_CHANGE)                                                                             
                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                    
YES              DDR4_RD_WR_inst_0.Video_arbiter_top_LPDDR4_0.ddr_rw_arbiter_0.v_wr_data_fifo.genblk24\.UI_ram_wrapper_1.L3_syncnonpipe.genblk1\.fi_te_fi_te_0_LSRAM_top_R0C9                                                   NA                 NA                     DDR4_RD_WR_inst_0.Video_arbiter_top_LPDDR4_0.ddr_rw_arbiter_0.v_wr_data_fifo.genblk24\.UI_ram_wrapper_1.L3_syncnonpipe.genblk1\.fi_te_fi_te_0_LSRAM_top_R0C9                                                      512X40_512X40          NA                 0       0(0/0/0)                          0(0/0/0)                          (NO_CHANGE/NO_CHANGE)                                                                             
                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                    
YES              DDR4_RD_WR_inst_0.Video_arbiter_top_LPDDR4_0.ddr_rw_arbiter_0.v_wr_len_fifo.genblk24\.UI_ram_wrapper_1.L3_syncnonpipe.genblk1\.fifo_test_fifo_test_0_LSRAM_top_R0C0                                            NA                 NA                     DDR4_RD_WR_inst_0.Video_arbiter_top_LPDDR4_0.ddr_rw_arbiter_0.v_wr_len_fifo.genblk24\.UI_ram_wrapper_1.L3_syncnonpipe.genblk1\.fifo_test_fifo_test_0_LSRAM_top_R0C0                                               1KX20_1KX20            NA                 0       0(0/0/0)                          0(0/0/0)                          (NO_CHANGE/NO_CHANGE)                                                                             
====================================================================================================================================================================================================================================================================================================================================================================================================================================================================================================================================================================================================================================================================================================================

#####  URAM REPORT  #####

INSTANTIATED     RTL_INSTANCE     PRIMITIVE_TYPE     USER_ATTRIBUTE     MAPPED_INSTANCE     DEPTH_X_WIDTH     LOW-POWER_MODE     ECC     R_ADDR_REG(EN/ARST/SRST)     R_DATA_PIPE_REG(EN/ARST/SRST)     COMMENTS
----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
================================================================================================================================================================================================================

#####  REG/LOGIC REPORT  #####

RTL_INSTANCE                                                                                                                                                      PRIMITIVE_TYPE     USER_ATTRIBUTE     COMMENTS                                                                            
--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
DDR4_RD_WR_inst_0.video_processing_0.Gamma_Correction_C0_0.Gamma_Correction_C0_0.GC_1p_Native_FORMAT\.Gamma_Correction_1p_Native_INST.PROC_8bit\.s_b_o_1[7:0]     ROM                NA                 Mapping ROM instance using logic since value for switch "rom_map_logic" is set to 1.
                                                                                                                                                                                                                                                                                            
DDR4_RD_WR_inst_0.video_processing_0.Gamma_Correction_C0_0.Gamma_Correction_C0_0.GC_1p_Native_FORMAT\.Gamma_Correction_1p_Native_INST.PROC_8bit\.s_g_o_1[7:0]     ROM                NA                 Mapping ROM instance using logic since value for switch "rom_map_logic" is set to 1.
                                                                                                                                                                                                                                                                                            
DDR4_RD_WR_inst_0.video_processing_0.Gamma_Correction_C0_0.Gamma_Correction_C0_0.GC_1p_Native_FORMAT\.Gamma_Correction_1p_Native_INST.PROC_8bit\.s_r_o_2[7:0]     ROM                NA                 Mapping ROM instance using logic since value for switch "rom_map_logic" is set to 1.
============================================================================================================================================================================================================================================================================================

#####  END OF RAM REPORT FOR COMPILE POINT: DDR4_RD_WR  #####

