/*******************************************************************************
 * (c) Copyright 2016 Microsemi Corporation.  All rights reserved.
 *
 */

#include "hw_platform.h"
#include "drivers/CoreGPIO/core_gpio.h"
#include "drivers/CoreUARTapb/core_uart_apb.h"

#include "./CMSIS/cortexm1_cfg.h"
#include "./CMSIS/system_cortexm1_cfg.h"
#define DIVISOR 16
/*
 * CoreGPIO instance data.
 */
gpio_instance_t g_gpio;

static void delay(void)
{
    volatile uint32_t delay_count = SystemCoreClock/DIVISOR ;

    while(delay_count > 0u)
    {
        --delay_count;
    }
}

/******************************************************************************
 * GPIO instance data. UART instance data. Base addresses
 *****************************************************************************/
gpio_instance_t g_gpio;
UART_instance_t g_uart;
#define COREGPIO_BASE_ADDR          0x00040000UL
#define UART_BASE_ADDRESS 			0x00041000UL
#define BAUD_VALUE                  115200
/*-------------------------------------------------------------------------*//**
 * main() function.
 */
int main()
{
    /*
	* CMSIS function- sets firmware system clock to Libero definition
	*/
	uint8_t temp =1;

   SystemCoreClockUpdate();
   UART_init( &g_uart, UART_BASE_ADDRESS, SYS_M1_CLK_FREQ/((16 * BAUD_VALUE)-1), (DATA_8_BITS | NO_PARITY));

    /**************************************************************************
     * Initialize the CoreGPIO driver with the base address of the CoreGPIO
     * instance to use and the initial state of the outputs.
     *************************************************************************/
     GPIO_init( &g_gpio, COREGPIO_BASE_ADDR, GPIO_APB_32_BITS_BUS );
     while(1)
     {
    	  UART_polled_tx_string(&g_uart,(const uint8_t*)"Hello World!\r\n");
    	  temp = temp^1;
    	 GPIO_set_output(&g_gpio, GPIO_0 ,temp);
    	 GPIO_set_output(&g_gpio, GPIO_1 ,temp);
    	 GPIO_set_output(&g_gpio, GPIO_2 ,temp);
    	 GPIO_set_output(&g_gpio, GPIO_3 ,temp);
    	 delay();

     }


     return 0;
}

