# Creating SmartDesign top
set sd_name {top}
create_smartdesign -sd_name ${sd_name}

# Disable auto promotion of pins of type 'pad'
auto_promote_pad_pins -promote_all 0

# Create top level Ports
sd_create_scalar_port -sd_name ${sd_name} -port_name {TDO} -port_direction {OUT}
sd_create_scalar_port -sd_name ${sd_name} -port_name {RESETN} -port_direction {IN}
sd_create_scalar_port -sd_name ${sd_name} -port_name {NTRST} -port_direction {IN}
sd_create_scalar_port -sd_name ${sd_name} -port_name {TDI} -port_direction {IN}
sd_create_scalar_port -sd_name ${sd_name} -port_name {SWDITMS} -port_direction {IN}
sd_create_scalar_port -sd_name ${sd_name} -port_name {SWCLKTCK} -port_direction {IN}
sd_create_scalar_port -sd_name ${sd_name} -port_name {TX} -port_direction {OUT}
sd_create_scalar_port -sd_name ${sd_name} -port_name {RX} -port_direction {IN}
sd_create_scalar_port -sd_name ${sd_name} -port_name {REF_CLK_0} -port_direction {IN}

sd_create_bus_port -sd_name ${sd_name} -port_name {GPIO_OUT} -port_direction {OUT} -port_range {[3:0]}

# Add core_ahb_to_apb3_0 instance
sd_instantiate_component -sd_name ${sd_name} -component_name {core_ahb_to_apb3} -instance_name {core_ahb_to_apb3_0}



# Add coreahblite_0_0 instance
sd_instantiate_component -sd_name ${sd_name} -component_name {coreahblite_0} -instance_name {coreahblite_0_0}
sd_connect_pins_to_constant -sd_name ${sd_name} -pin_names {coreahblite_0_0:REMAP_M0} -value {GND}



# Add CoreAPB3_0_0 instance
sd_instantiate_component -sd_name ${sd_name} -component_name {CoreAPB3_0} -instance_name {CoreAPB3_0_0}



# Add CoreGPIO_0_0 instance
sd_instantiate_component -sd_name ${sd_name} -component_name {CoreGPIO_0} -instance_name {CoreGPIO_0_0}
sd_mark_pins_unused -sd_name ${sd_name} -pin_names {CoreGPIO_0_0:INT}
sd_connect_pins_to_constant -sd_name ${sd_name} -pin_names {CoreGPIO_0_0:GPIO_IN} -value {GND}



# Add CoretxM1_0_0 instance
sd_instantiate_component -sd_name ${sd_name} -component_name {CoretxM1_0} -instance_name {CoretxM1_0_0}
sd_connect_pins_to_constant -sd_name ${sd_name} -pin_names {CoretxM1_0_0:WDOGRES} -value {GND}
sd_mark_pins_unused -sd_name ${sd_name} -pin_names {CoretxM1_0_0:WDOGRESN}
sd_mark_pins_unused -sd_name ${sd_name} -pin_names {CoretxM1_0_0:LOCKUP}
sd_mark_pins_unused -sd_name ${sd_name} -pin_names {CoretxM1_0_0:HALTED}
sd_mark_pins_unused -sd_name ${sd_name} -pin_names {CoretxM1_0_0:SYSRESETREQ}
sd_connect_pins_to_constant -sd_name ${sd_name} -pin_names {CoretxM1_0_0:NMI} -value {GND}
sd_connect_pins_to_constant -sd_name ${sd_name} -pin_names {CoretxM1_0_0:IRQ31} -value {GND}
sd_connect_pins_to_constant -sd_name ${sd_name} -pin_names {CoretxM1_0_0:IRQ30} -value {GND}
sd_connect_pins_to_constant -sd_name ${sd_name} -pin_names {CoretxM1_0_0:IRQ29} -value {GND}
sd_connect_pins_to_constant -sd_name ${sd_name} -pin_names {CoretxM1_0_0:IRQ28} -value {GND}
sd_connect_pins_to_constant -sd_name ${sd_name} -pin_names {CoretxM1_0_0:IRQ27} -value {GND}
sd_connect_pins_to_constant -sd_name ${sd_name} -pin_names {CoretxM1_0_0:IRQ26} -value {GND}
sd_connect_pins_to_constant -sd_name ${sd_name} -pin_names {CoretxM1_0_0:IRQ25} -value {GND}
sd_connect_pins_to_constant -sd_name ${sd_name} -pin_names {CoretxM1_0_0:IRQ24} -value {GND}
sd_connect_pins_to_constant -sd_name ${sd_name} -pin_names {CoretxM1_0_0:IRQ23} -value {GND}
sd_connect_pins_to_constant -sd_name ${sd_name} -pin_names {CoretxM1_0_0:IRQ22} -value {GND}
sd_connect_pins_to_constant -sd_name ${sd_name} -pin_names {CoretxM1_0_0:IRQ21} -value {GND}
sd_connect_pins_to_constant -sd_name ${sd_name} -pin_names {CoretxM1_0_0:IRQ20} -value {GND}
sd_connect_pins_to_constant -sd_name ${sd_name} -pin_names {CoretxM1_0_0:IRQ19} -value {GND}
sd_connect_pins_to_constant -sd_name ${sd_name} -pin_names {CoretxM1_0_0:IRQ18} -value {GND}
sd_connect_pins_to_constant -sd_name ${sd_name} -pin_names {CoretxM1_0_0:IRQ17} -value {GND}
sd_connect_pins_to_constant -sd_name ${sd_name} -pin_names {CoretxM1_0_0:IRQ16} -value {GND}
sd_connect_pins_to_constant -sd_name ${sd_name} -pin_names {CoretxM1_0_0:IRQ15} -value {GND}
sd_connect_pins_to_constant -sd_name ${sd_name} -pin_names {CoretxM1_0_0:IRQ14} -value {GND}
sd_connect_pins_to_constant -sd_name ${sd_name} -pin_names {CoretxM1_0_0:IRQ13} -value {GND}
sd_connect_pins_to_constant -sd_name ${sd_name} -pin_names {CoretxM1_0_0:IRQ12} -value {GND}
sd_connect_pins_to_constant -sd_name ${sd_name} -pin_names {CoretxM1_0_0:IRQ11} -value {GND}
sd_connect_pins_to_constant -sd_name ${sd_name} -pin_names {CoretxM1_0_0:IRQ10} -value {GND}
sd_connect_pins_to_constant -sd_name ${sd_name} -pin_names {CoretxM1_0_0:IRQ9} -value {GND}
sd_connect_pins_to_constant -sd_name ${sd_name} -pin_names {CoretxM1_0_0:IRQ8} -value {GND}
sd_connect_pins_to_constant -sd_name ${sd_name} -pin_names {CoretxM1_0_0:IRQ7} -value {GND}
sd_connect_pins_to_constant -sd_name ${sd_name} -pin_names {CoretxM1_0_0:IRQ6} -value {GND}
sd_connect_pins_to_constant -sd_name ${sd_name} -pin_names {CoretxM1_0_0:IRQ5} -value {GND}
sd_connect_pins_to_constant -sd_name ${sd_name} -pin_names {CoretxM1_0_0:IRQ4} -value {GND}
sd_connect_pins_to_constant -sd_name ${sd_name} -pin_names {CoretxM1_0_0:IRQ3} -value {GND}
sd_connect_pins_to_constant -sd_name ${sd_name} -pin_names {CoretxM1_0_0:IRQ2} -value {GND}
sd_connect_pins_to_constant -sd_name ${sd_name} -pin_names {CoretxM1_0_0:IRQ1} -value {GND}
sd_connect_pins_to_constant -sd_name ${sd_name} -pin_names {CoretxM1_0_0:IRQ0} -value {GND}
sd_connect_pins_to_constant -sd_name ${sd_name} -pin_names {CoretxM1_0_0:EDBGRQ} -value {GND}
sd_mark_pins_unused -sd_name ${sd_name} -pin_names {CoretxM1_0_0:JTAGTOP}
sd_connect_pins_to_constant -sd_name ${sd_name} -pin_names {CoretxM1_0_0:DBGRESTART} -value {GND}
sd_mark_pins_unused -sd_name ${sd_name} -pin_names {CoretxM1_0_0:DBGRESTARTED}



# Add CoreUARTapb_0_0 instance
sd_instantiate_component -sd_name ${sd_name} -component_name {CoreUARTapb_0} -instance_name {CoreUARTapb_0_0}
sd_mark_pins_unused -sd_name ${sd_name} -pin_names {CoreUARTapb_0_0:TXRDY}
sd_mark_pins_unused -sd_name ${sd_name} -pin_names {CoreUARTapb_0_0:RXRDY}
sd_mark_pins_unused -sd_name ${sd_name} -pin_names {CoreUARTapb_0_0:PARITY_ERR}
sd_mark_pins_unused -sd_name ${sd_name} -pin_names {CoreUARTapb_0_0:OVERFLOW}
sd_mark_pins_unused -sd_name ${sd_name} -pin_names {CoreUARTapb_0_0:FRAMING_ERR}



# Add PF_CCC_0_0 instance
sd_instantiate_component -sd_name ${sd_name} -component_name {PF_CCC_0} -instance_name {PF_CCC_0_0}



# Add PF_INIT_MONITOR_0_0 instance
sd_instantiate_component -sd_name ${sd_name} -component_name {PF_INIT_MONITOR_0} -instance_name {PF_INIT_MONITOR_0_0}
sd_mark_pins_unused -sd_name ${sd_name} -pin_names {PF_INIT_MONITOR_0_0:PCIE_INIT_DONE}
sd_mark_pins_unused -sd_name ${sd_name} -pin_names {PF_INIT_MONITOR_0_0:USRAM_INIT_DONE}
sd_mark_pins_unused -sd_name ${sd_name} -pin_names {PF_INIT_MONITOR_0_0:SRAM_INIT_DONE}
sd_mark_pins_unused -sd_name ${sd_name} -pin_names {PF_INIT_MONITOR_0_0:XCVR_INIT_DONE}
sd_mark_pins_unused -sd_name ${sd_name} -pin_names {PF_INIT_MONITOR_0_0:USRAM_INIT_FROM_SNVM_DONE}
sd_mark_pins_unused -sd_name ${sd_name} -pin_names {PF_INIT_MONITOR_0_0:USRAM_INIT_FROM_UPROM_DONE}
sd_mark_pins_unused -sd_name ${sd_name} -pin_names {PF_INIT_MONITOR_0_0:USRAM_INIT_FROM_SPI_DONE}
sd_mark_pins_unused -sd_name ${sd_name} -pin_names {PF_INIT_MONITOR_0_0:SRAM_INIT_FROM_SNVM_DONE}
sd_mark_pins_unused -sd_name ${sd_name} -pin_names {PF_INIT_MONITOR_0_0:SRAM_INIT_FROM_UPROM_DONE}
sd_mark_pins_unused -sd_name ${sd_name} -pin_names {PF_INIT_MONITOR_0_0:SRAM_INIT_FROM_SPI_DONE}
sd_mark_pins_unused -sd_name ${sd_name} -pin_names {PF_INIT_MONITOR_0_0:AUTOCALIB_DONE}



# Add pf_reset_0 instance
sd_instantiate_component -sd_name ${sd_name} -component_name {pf_reset} -instance_name {pf_reset_0}
sd_connect_pins_to_constant -sd_name ${sd_name} -pin_names {pf_reset_0:SS_BUSY} -value {GND}
sd_connect_pins_to_constant -sd_name ${sd_name} -pin_names {pf_reset_0:FF_US_RESTORE} -value {GND}



# Add PF_SRAM_0 instance
sd_instantiate_component -sd_name ${sd_name} -component_name {PF_SRAM} -instance_name {PF_SRAM_0}



# Add scalar net connections
sd_connect_pins -sd_name ${sd_name} -pin_names {"core_ahb_to_apb3_0:HRESETN" "coreahblite_0_0:HRESETN" "CoretxM1_0_0:HRESETN" "CoreUARTapb_0_0:PRESETN" "PF_SRAM_0:HRESETN" "CoreGPIO_0_0:PRESETN" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"CoretxM1_0_0:NTRST" "NTRST" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"pf_reset_0:CLK" "core_ahb_to_apb3_0:HCLK" "coreahblite_0_0:HCLK" "PF_CCC_0_0:OUT0_FABCLK_0" "CoretxM1_0_0:HCLK" "CoreUARTapb_0_0:PCLK" "PF_SRAM_0:HCLK" "CoreGPIO_0_0:PCLK" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"pf_reset_0:PLL_LOCK" "PF_CCC_0_0:PLL_LOCK_0" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"pf_reset_0:BANK_y_VDDI_STATUS" "pf_reset_0:BANK_x_VDDI_STATUS" "PF_INIT_MONITOR_0_0:BANK_6_VDDI_STATUS" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"pf_reset_0:INIT_DONE" "PF_INIT_MONITOR_0_0:DEVICE_INIT_DONE" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"pf_reset_0:FPGA_POR_N" "PF_INIT_MONITOR_0_0:FABRIC_POR_N" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"pf_reset_0:FABRIC_RESET_N" "CoretxM1_0_0:SYSRESETN" "CoretxM1_0_0:NRESET" "CoretxM1_0_0:DBGRESETN" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"pf_reset_0:PLL_POWERDOWN_B" "PF_CCC_0_0:PLL_POWERDOWN_N_0" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"PF_CCC_0_0:REF_CLK_0" "REF_CLK_0" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"pf_reset_0:EXT_RST_N" "RESETN" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"CoreUARTapb_0_0:RX" "RX" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"CoretxM1_0_0:SWCLKTCK" "SWCLKTCK" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"CoretxM1_0_0:SWDITMS" "SWDITMS" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"CoretxM1_0_0:TDI" "TDI" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"CoretxM1_0_0:TDO" "TDO" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"CoreUARTapb_0_0:TX" "TX" }

# Add bus net connections
sd_connect_pins -sd_name ${sd_name} -pin_names {"CoreGPIO_0_0:GPIO_OUT" "GPIO_OUT" }

# Add bus interface net connections
sd_connect_pins -sd_name ${sd_name} -pin_names {"core_ahb_to_apb3_0:APBmaster" "CoreAPB3_0_0:APB3mmaster" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"PF_SRAM_0:AHBSlaveInterface" "coreahblite_0_0:AHBmslave0" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"core_ahb_to_apb3_0:AHBslave" "coreahblite_0_0:AHBmslave4" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"CoreGPIO_0_0:APB_bif" "CoreAPB3_0_0:APBmslave0" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"CoreUARTapb_0_0:APB_bif" "CoreAPB3_0_0:APBmslave1" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"CoretxM1_0_0:AHB_MASTER" "coreahblite_0_0:AHBmmaster0" }

# Re-enable auto promotion of pins of type 'pad'
auto_promote_pad_pins -promote_all 1
# Save the smartDesign
save_smartdesign -sd_name ${sd_name}
# Generate SmartDesign top
generate_component -component_name ${sd_name}
