# Exporting core PF_SRAM to TCL
# Create design TCL command for core PF_SRAM
create_and_configure_core -core_vlnv Actel:SystemBuilder:PF_SRAM_AHBL_AXI:$PF_SRAM_AHBL_AXIVer -component_name {PF_SRAM} -params {\
"AXI4_AWIDTH:32" \
"AXI4_DWIDTH:32" \
"AXI4_IDWIDTH:8" \
"AXI4_IFTYPE_RD:T" \
"AXI4_IFTYPE_WR:T" \
"AXI4_WRAP_SUPPORT:F" \
"BYTEENABLES:1" \
"BYTE_ENABLE_WIDTH:4" \
"B_REN_POLARITY:2" \
"CASCADE:1" \
"FABRIC_INTERFACE_TYPE:0" \
"IMPORT_FILE:m1fpga-cortex-m1-blinky.hex" \
"INIT_RAM:T" \
"LPM_HINT:0" \
"RDEPTH:16384" \
"RWIDTH:40" \
"USE_NATIVE_INTERFACE:F" \
"WDEPTH:16384" \
"WWIDTH:40" }
# Exporting core PF_SRAM to TCL done
