# Import source files

file copy -force "./src/src_softconsole/m1fpga-cortex-m1-blinky.hex" "./$Prjname/m1fpga-cortex-m1-blinky.hex"

#build_design_hierarchy 

# Create, configure and generate core components
source ./src/src_components/coreahblite_0.tcl
source ./src/src_components/core_ahb_to_apb3.tcl
source ./src/src_components/CoreAPB3_0.tcl
source ./src/src_components/CoreGPIO_0.tcl
source ./src/src_components/CoretxM1_0.tcl
source ./src/src_components/CoreUARTapb_0.tcl
source ./src/src_components/PF_CCC_0.tcl
source ./src/src_components/PF_INIT_MONITOR_0.tcl
source ./src/src_components/pf_reset.tcl
source ./src/src_components/PF_SRAM.tcl





# Generate SmartDesign Components

build_design_hierarchy 
source ./src/src_components/top.tcl

# Set top level module
build_design_hierarchy 
set_root -module {top::work} 

save_project
puts "Design generated successfully\n"
