#====================================================================================================================================================================
#This Tcl file sources other Tcl files to build the design(on which recursive export is run) in a bottom-up fashion
#====================================================================================================================================================================
#Importing and Linking all the HDL source files used in the design
#====================================================================================================================================================================
#Importing and Linking all the HDL source files used in the design
import_files -library work -hdl_source ./script_support/hdl/DDR_read_controller_HDMI_RX.vhd
import_files -library work -hdl_source ./script_support/hdl/register_config.vhd
import_files -library work -hdl_source ./script_support/hdl/data_unpacker_FHD_RX_0.vhd
import_files -library work -hdl_source ./script_support/hdl/ram2port.vhd
import_files -library work -hdl_source ./script_support/hdl/dc_fifo.vhd
import_files -library work -hdl_source ./script_support/hdl/data_unpacker_HDMI_RX.vhd
import_files -library work -hdl_source ./script_support/hdl/DDR_read_controller.vhd
import_files -library work -hdl_source ./script_support/hdl/data_unpacker.vhd
import_files -library work -hdl_source ./script_support/hdl/DDR_write_controller_HDMI_RX.vhd
import_files -library work -hdl_source ./script_support/hdl/data_packer_HDMI_RX.vhd
import_files -library work -hdl_source ./script_support/hdl/DDR_write_controller.vhd
import_files -library work -hdl_source ./script_support/hdl/data_packer.vhd
import_files -library work -hdl_source ./script_support/hdl/data_packer_SDI_TX.vhd
import_files -library work -hdl_source ./script_support/hdl/SDI_interface_12G422.vhd
import_files -library work -hdl_source ./script_support/hdl/addr_decoder.vhd
import_files -library work -hdl_source ./script_support/hdl/plot_mux.vhd
import_files -library work -hdl_source ./script_support/hdl/receive_data.vhd
import_files -library work -hdl_source ./script_support/hdl/send_data.vhd
import_files -library work -hdl_source ./script_support/hdl/timer.vhd
import_files -library work -hdl_source ./script_support/hdl/YCbCr_422toYCbCr_444.vhd
import_files -library work -hdl_source ./script_support/hdl/apb_wrapper.vhd
build_design_hierarchy

#====================================================================================================================================================================
#Sourcing the Tcl files in which HDL+ core definitions are created for HDL modules
#====================================================================================================================================================================
source ./script_support/components/Register_Config.tcl 
source ./script_support/components/video_fifo.tcl 
source ./script_support/components/YCbCr_422two444.tcl 
source ./script_support/components/apb3_if.tcl 
build_design_hierarchy

#====================================================================================================================================================================
#Sourcing the Tcl files for creating individual components under the top level
#====================================================================================================================================================================
source ./script_support/components/COREDDR_LITEAXI_C0.tcl 
source ./script_support/components/CORERESET_PF_C0.tcl 
source ./script_support/components/CORERESET_PF_C1.tcl 
source ./script_support/components/COREUHD_SDIRX_C0.tcl 
source ./script_support/components/COREUHD_SDITX_C0.tcl 
source ./script_support/components/DDR_AXI4_ARBITER_PF_C0.tcl 
source ./script_support/components/DDR_Read_FHD_RX_0.tcl 
source ./script_support/components/DDR_Read_HDMI_RX.tcl 
source ./script_support/components/DDR_Read.tcl 
source ./script_support/components/DDR_Write_HDMI_RX.tcl 
source ./script_support/components/Bayer_Interpolation_C2.tcl 
source ./script_support/components/RGBtoYCbCr_C0.tcl 
source ./script_support/components/DDR_Write.tcl 
source ./script_support/components/Display_Controller_C2.tcl 
source ./script_support/components/Display_Controller_C3.tcl 
source ./script_support/components/Gamma_Correction_C0.tcl 
source ./script_support/components/Gamma_Correction_C1.tcl 
source ./script_support/components/Gamma_Correction_C2.tcl 
source ./script_support/components/Gamma_Correction_C3.tcl 
source ./script_support/components/Gamma_Correction_C4.tcl 
source ./script_support/components/HDMI_TX_C1.tcl 
source ./script_support/components/CORERESET_PF_C2.tcl 
source ./script_support/components/MIPI_TRAINING_LITE_C0.tcl 
source ./script_support/components/MIPI_TRAINING_LITE_C1.tcl 
source ./script_support/components/MIPI_TRAINING_LITE_C2.tcl 
source ./script_support/components/MIPI_TRAINING_LITE_C3.tcl 
source ./script_support/components/PF_IOD_GENERIC_RX_C0.tcl 
source ./script_support/components/CAM_IOD_TIP_TOP.tcl 
source ./script_support/components/CORERESET_PF_C3.tcl 
source ./script_support/components/PF_CCC_C2.tcl 
source ./script_support/components/mipicsi2rxdecoderPF_C1.tcl 
source ./script_support/components/IMX334_IF_TOP.tcl 
source ./script_support/components/Image_Enhancement_C0.tcl 
source ./script_support/components/PF_CCC_C0.tcl 
source ./script_support/components/PF_CCC_C1.tcl 
source ./script_support/components/PF_DDR4_C0.tcl 
source ./script_support/components/PF_INIT_MONITOR_C0.tcl 
source ./script_support/components/PF_TX_PLL_C0.tcl 
source ./script_support/components/PF_TX_PLL_C1.tcl 
source ./script_support/components/PF_XCVR_ERM_C0.tcl 
source ./script_support/components/PF_XCVR_ERM_C1.tcl 
source ./script_support/components/PF_XCVR_REF_CLK_C0.tcl 
source ./script_support/components/COREAHBTOAPB3_C0.tcl 
source ./script_support/components/COREI2C_C0.tcl 
source ./script_support/components/COREI2C_C1.tcl 
source ./script_support/components/COREI2C_C2.tcl 
source ./script_support/components/COREJTAGDEBUG_C0.tcl 
source ./script_support/components/CoreAHBLite_C0.tcl 
source ./script_support/components/CoreAHBLite_C1.tcl 
source ./script_support/components/CoreAPB3_C0.tcl 
source ./script_support/components/CoreGPIO_C0.tcl 
source ./script_support/components/MIV_RV32IMA_L1_AHB_C0.tcl 
source ./script_support/components/PF_SRAM_AHBL_AXI_C0.tcl 
source ./script_support/components/PROC_SUBSYSTEM.tcl 
source ./script_support/components/COREUART_C0.tcl 
source ./script_support/components/UART_interface.tcl 
source ./script_support/components/YCbCrtoRGB_C0.tcl 
source ./script_support/components/VIDEO_KIT_TOP.tcl 
build_design_hierarchy
