@W: BN544 :"f:/dg0799_final/libero_project/libero_project/designer/top/synthesis.fdc":12:0:12:0|create_generated_clock with both -multiply_by and -divide_by not supported for this target technology
@W: FX1183 :"f:\dg0799_final\libero_project\libero_project\component\work\core_reset_pf\core_reset_pf_0\core\corereset_pf.v":58:0:58:5|User-specified initial value set for instance Core_reset_pf_0.Core_reset_pf_0.dff cannot be supported due to limitations in architecture. Please remove the initial value set on the instance to avoid the warning. 
@W: BN132 :"f:\dg0799_final\libero_project\libero_project\component\work\coretse_0\coretse_0_0\rtl\vlog\obfuscated\petmc_top.v":2099:0:2099:5|Removing sequential instance CORETSE_0_inst_0.CORETSE_0_0.CORETSEooIlI.CORETSEIillI.CORETSEioolI.CORETSEiOI1.CORETSEIoI1.CORETSEoO1I because it is equivalent to instance CORETSE_0_inst_0.CORETSE_0_0.CORETSEooIlI.CORETSEIillI.CORETSEioolI.CORETSEiOI1.CORETSEIoI1.CORETSEiO1I. To keep the instance, apply constraint syn_preserve=1 on the instance.
@W: BN132 :"f:\dg0799_final\libero_project\libero_project\component\work\coretse_0\coretse_0_0\rtl\vlog\obfuscated\petfn_top.v":6558:0:6558:5|Removing sequential instance CORETSE_0_inst_0.CORETSE_0_0.CORETSEooIlI.CORETSEIillI.CORETSEioolI.CORETSEiOI1.CORETSEloI1.CORETSEi1II because it is equivalent to instance CORETSE_0_inst_0.CORETSE_0_0.CORETSEooIlI.CORETSEIillI.CORETSEioolI.CORETSEiOI1.CORETSEloI1.CORETSEoI. To keep the instance, apply constraint syn_preserve=1 on the instance.
@W: BN132 :"f:\dg0799_final\libero_project\libero_project\component\work\coretse_0\coretse_0_0\rtl\vlog\obfuscated\petfn_top.v":6509:0:6509:5|Removing sequential instance CORETSE_0_inst_0.CORETSE_0_0.CORETSEooIlI.CORETSEIillI.CORETSEioolI.CORETSEiOI1.CORETSEloI1.CORETSEli1I because it is equivalent to instance CORETSE_0_inst_0.CORETSE_0_0.CORETSEooIlI.CORETSEIillI.CORETSEioolI.CORETSEiOI1.CORETSEloI1.CORETSEOlIl. To keep the instance, apply constraint syn_preserve=1 on the instance.
@W: BN132 :"f:\dg0799_final\libero_project\libero_project\component\work\coretse_0\coretse_0_0\rtl\vlog\obfuscated\perfn_top.v":4317:0:4317:5|Removing sequential instance CORETSE_0_inst_0.CORETSE_0_0.CORETSEooIlI.CORETSEIillI.CORETSEioolI.CORETSEiOI1.CORETSEioI1.CORETSEiO1 because it is equivalent to instance CORETSE_0_inst_0.CORETSE_0_0.CORETSEooIlI.CORETSEIillI.CORETSEioolI.CORETSEiOI1.CORETSEioI1.CORETSEIo. To keep the instance, apply constraint syn_preserve=1 on the instance.
@W: BN132 :"f:\dg0799_final\libero_project\libero_project\component\work\coretse_0\coretse_0_0\rtl\vlog\obfuscated\permc_top.v":1915:0:1915:5|Removing sequential instance CORETSE_0_inst_0.CORETSE_0_0.CORETSEooIlI.CORETSEIillI.CORETSEioolI.CORETSEiOI1.CORETSEOiI1.CORETSEO1i because it is equivalent to instance CORETSE_0_inst_0.CORETSE_0_0.CORETSEooIlI.CORETSEIillI.CORETSEioolI.CORETSEiOI1.CORETSEOiI1.CORETSEl0. To keep the instance, apply constraint syn_preserve=1 on the instance.
@W: BN132 :"f:\dg0799_final\libero_project\libero_project\component\work\coretse_0\coretse_0_0\rtl\vlog\obfuscated\perex_pcs.v":3772:0:3772:5|Removing sequential instance CORETSE_0_inst_0.CORETSE_0_0.CORETSEooIlI.CORETSEi01lI.CORETSEI11lI.CORETSEoIiII.CORETSEiio0.CORETSEIiIi because it is equivalent to instance CORETSE_0_inst_0.CORETSE_0_0.CORETSEooIlI.CORETSEi01lI.CORETSEI11lI.CORETSEoIiII.CORETSEiio0.CORETSEIIo0. To keep the instance, apply constraint syn_preserve=1 on the instance.
@W: BN132 :"f:\dg0799_final\libero_project\libero_project\component\microsemi\miv\miv_rv32\3.0.100\opsrv_merged\miv_rv32_opsrv_merged.v":11140:2:11140:10|Removing sequential instance MIV_RV32_C0_0.MIV_RV32_C0_0.u_opsrv_0.gen_opsrv_debug.u_opsrv_debug_unit_0.miv_rv32_opsrv_debug_du_0.debug_gpr_rd_data_ready because it is equivalent to instance MIV_RV32_C0_0.MIV_RV32_C0_0.u_opsrv_0.gen_opsrv_debug.u_opsrv_debug_unit_0.miv_rv32_opsrv_debug_du_0.debug_gpr_rd_en. To keep the instance, apply constraint syn_preserve=1 on the instance.
@W: BN132 :"f:\dg0799_final\libero_project\libero_project\component\microsemi\miv\miv_rv32\3.0.100\opsrv_merged\miv_rv32_opsrv_merged.v":11140:2:11140:10|Removing sequential instance MIV_RV32_C0_0.MIV_RV32_C0_0.u_opsrv_0.gen_opsrv_debug.u_opsrv_debug_unit_0.miv_rv32_opsrv_debug_du_0.debug_csr_rd_data_ready because it is equivalent to instance MIV_RV32_C0_0.MIV_RV32_C0_0.u_opsrv_0.gen_opsrv_debug.u_opsrv_debug_unit_0.miv_rv32_opsrv_debug_du_0.debug_csr_rd_en. To keep the instance, apply constraint syn_preserve=1 on the instance.
@W: MT530 :"f:\dg0799_final\libero_project\libero_project\component\work\pf_iod_cdr_c0\pf_iod_cdr_rx_n_0\pf_iod_cdr_c0_pf_iod_cdr_rx_n_0_pf_iod.v":48:53:48:59|Found inferred clock PF_IOD_CDR_C0_PF_LANECTRL_0_PF_LANECTRL|CDR_CLK_keep which controls 2 sequential elements including PF_IOD_CDR_C0_0.PF_IOD_CDR_RX_N_0.I_IOD_0. This clock has no specified timing constraint which may adversely impact design performance. 
@W: MT530 :"f:\dg0799_final\libero_project\libero_project\component\actel\directcore\corejtagdebug\3.1.100\core\corejtagdebug_uj_jtag.v":215:0:215:5|Found inferred clock COREJTAGDEBUG_Z1|iUDRCK_inferred_clock which controls 188 sequential elements including core_jatg_debug_0_0.core_jatg_debug_0_0.genblk3\.genblk1\.UJ_JTAG.state[4:0]. This clock has no specified timing constraint which may adversely impact design performance. 
@W: MF511 |Found issues with constraints. Please check constraint checker report "F:\DG0799_final\Libero_Project\Libero_Project\synthesis\top_cck.rpt" .
