@N|Running in 64-bit mode
@N|Running in 64-bit mode
@N: CG1349 :	| Running Verilog Compiler in System Verilog mode
@N: CG347 :"F:\DG0799_final\Libero_Project\Libero_Project\component\Actel\DirectCore\CORESPI\5.2.104\rtl\vlog\core\spi_rf.v":160:38:160:50|Read a parallel_case directive.
@N: CG347 :"F:\DG0799_final\Libero_Project\Libero_Project\component\Actel\DirectCore\CORESPI\5.2.104\rtl\vlog\core\spi_rf.v":223:34:223:46|Read a parallel_case directive.
@N: CG347 :"F:\DG0799_final\Libero_Project\Libero_Project\component\Actel\DirectCore\CORESPI\5.2.104\rtl\vlog\core\spi_control.v":69:31:69:43|Read a parallel_case directive.
@N: CG334 :"F:\DG0799_final\Libero_Project\Libero_Project\component\Microsemi\MiV\MIV_RV32\3.0.100\core_merged\miv_rv32_core_merged.v":18458:12:18458:24|Read directive translate_off.
@N: CG333 :"F:\DG0799_final\Libero_Project\Libero_Project\component\Microsemi\MiV\MIV_RV32\3.0.100\core_merged\miv_rv32_core_merged.v":18491:12:18491:23|Read directive translate_on.
@N: CG334 :"F:\DG0799_final\Libero_Project\Libero_Project\component\Microsemi\MiV\MIV_RV32\3.0.100\core_merged\miv_rv32_core_merged.v":18993:20:18993:32|Read directive translate_off.
@N: CG333 :"F:\DG0799_final\Libero_Project\Libero_Project\component\Microsemi\MiV\MIV_RV32\3.0.100\core_merged\miv_rv32_core_merged.v":19009:20:19009:31|Read directive translate_on.
@N: CG334 :"F:\DG0799_final\Libero_Project\Libero_Project\component\Microsemi\MiV\MIV_RV32\3.0.100\core_merged\miv_rv32_core_merged.v":19385:12:19385:24|Read directive translate_off.
@N: CG333 :"F:\DG0799_final\Libero_Project\Libero_Project\component\Microsemi\MiV\MIV_RV32\3.0.100\core_merged\miv_rv32_core_merged.v":19438:12:19438:23|Read directive translate_on.
@N: CG334 :"F:\DG0799_final\Libero_Project\Libero_Project\component\Microsemi\MiV\MIV_RV32\3.0.100\core_merged\miv_rv32_core_merged.v":22432:12:22432:24|Read directive translate_off.
@N: CG333 :"F:\DG0799_final\Libero_Project\Libero_Project\component\Microsemi\MiV\MIV_RV32\3.0.100\core_merged\miv_rv32_core_merged.v":22440:12:22440:23|Read directive translate_on.
@N: CG334 :"F:\DG0799_final\Libero_Project\Libero_Project\component\Microsemi\MiV\MIV_RV32\3.0.100\core_merged\miv_rv32_core_merged.v":22749:12:22749:24|Read directive translate_off.
@N: CG333 :"F:\DG0799_final\Libero_Project\Libero_Project\component\Microsemi\MiV\MIV_RV32\3.0.100\core_merged\miv_rv32_core_merged.v":22757:12:22757:23|Read directive translate_on.
@N: CG334 :"F:\DG0799_final\Libero_Project\Libero_Project\component\Microsemi\MiV\MIV_RV32\3.0.100\core_merged\miv_rv32_core_merged.v":24190:20:24190:32|Read directive translate_off.
@N: CG333 :"F:\DG0799_final\Libero_Project\Libero_Project\component\Microsemi\MiV\MIV_RV32\3.0.100\core_merged\miv_rv32_core_merged.v":24193:20:24193:31|Read directive translate_on.
@N: CG334 :"F:\DG0799_final\Libero_Project\Libero_Project\component\Microsemi\MiV\MIV_RV32\3.0.100\core_merged\miv_rv32_core_merged.v":24203:20:24203:32|Read directive translate_off.
@N: CG333 :"F:\DG0799_final\Libero_Project\Libero_Project\component\Microsemi\MiV\MIV_RV32\3.0.100\core_merged\miv_rv32_core_merged.v":24213:20:24213:31|Read directive translate_on.
@N: CG334 :"F:\DG0799_final\Libero_Project\Libero_Project\component\Microsemi\MiV\MIV_RV32\3.0.100\core_merged\miv_rv32_core_merged.v":24218:12:24218:24|Read directive translate_off.
@N: CG333 :"F:\DG0799_final\Libero_Project\Libero_Project\component\Microsemi\MiV\MIV_RV32\3.0.100\core_merged\miv_rv32_core_merged.v":24276:12:24276:23|Read directive translate_on.
@N: CG334 :"F:\DG0799_final\Libero_Project\Libero_Project\component\Microsemi\MiV\MIV_RV32\3.0.100\core_merged\miv_rv32_core_merged.v":25152:20:25152:32|Read directive translate_off.
@N: CG333 :"F:\DG0799_final\Libero_Project\Libero_Project\component\Microsemi\MiV\MIV_RV32\3.0.100\core_merged\miv_rv32_core_merged.v":25155:20:25155:31|Read directive translate_on.
@N: CG334 :"F:\DG0799_final\Libero_Project\Libero_Project\component\Microsemi\MiV\MIV_RV32\3.0.100\core_merged\miv_rv32_core_merged.v":25165:20:25165:32|Read directive translate_off.
@N: CG333 :"F:\DG0799_final\Libero_Project\Libero_Project\component\Microsemi\MiV\MIV_RV32\3.0.100\core_merged\miv_rv32_core_merged.v":25175:20:25175:31|Read directive translate_on.
@N: CG334 :"F:\DG0799_final\Libero_Project\Libero_Project\component\Microsemi\MiV\MIV_RV32\3.0.100\core_merged\miv_rv32_core_merged.v":25180:12:25180:24|Read directive translate_off.
@N: CG333 :"F:\DG0799_final\Libero_Project\Libero_Project\component\Microsemi\MiV\MIV_RV32\3.0.100\core_merged\miv_rv32_core_merged.v":25238:12:25238:23|Read directive translate_on.
@N: CG334 :"F:\DG0799_final\Libero_Project\Libero_Project\component\Microsemi\MiV\MIV_RV32\3.0.100\core_merged\miv_rv32_core_merged.v":25860:16:25860:28|Read directive translate_off.
@N: CG333 :"F:\DG0799_final\Libero_Project\Libero_Project\component\Microsemi\MiV\MIV_RV32\3.0.100\core_merged\miv_rv32_core_merged.v":25862:16:25862:27|Read directive translate_on.
@N: CG364 :"F:\DG0799_final\Libero_Project\Libero_Project\component\Microsemi\MiV\MIV_RV32\3.0.100\miv_rv32_mnemonics_pkg.v":58:8:58:28|Synthesizing module miv_rv32_mnemonic_pkg in library work.
@N: CG364 :"F:\DG0799_final\Libero_Project\Libero_Project\component\Microsemi\MiV\MIV_RV32\3.0.100\miv_rv32_pkg.v":74:8:74:19|Synthesizing module miv_rv32_pkg in library work.
@N: CG364 :"F:\DG0799_final\Libero_Project\Libero_Project\component\Microsemi\MiV\MIV_RV32\3.0.100\miv_rv32_core_cfg_pkg.v":70:8:70:28|Synthesizing module miv_rv32_core_cfg_pkg in library work.
@N: CG364 :"F:\DG0799_final\Libero_Project\Libero_Project\component\Microsemi\MiV\MIV_RV32\3.0.100\miv_rv32_bist_shared_pkg.v":166:8:166:31|Synthesizing module miv_rv32_bist_shared_pkg in library work.
@N: CG364 :"F:\DG0799_final\Libero_Project\Libero_Project\component\Microsemi\MiV\MIV_RV32\3.0.100\miv_rv32_bist_seq_pkg.v":159:8:159:28|Synthesizing module miv_rv32_bist_seq_pkg in library work.
@N: CG364 :"F:\DG0799_final\Libero_Project\Libero_Project\component\Microsemi\MiV\MIV_RV32\3.0.100\miv_rv32_opsrv_debug_pkg.v":67:8:67:31|Synthesizing module miv_rv32_opsrv_debug_pkg in library work.
@N: CG364 :"F:\DG0799_final\Libero_Project\Libero_Project\component\Microsemi\MiV\MIV_RV32\3.0.100\miv_rv32_opsrv_pkg.v":69:8:69:25|Synthesizing module miv_rv32_opsrv_pkg in library work.
@N: CG364 :"F:\DG0799_final\Libero_Project\Libero_Project\component\Microsemi\MiV\MIV_RV32\3.0.100\miv_rv32_opsrv_cfg_pkg.v":69:8:69:29|Synthesizing module miv_rv32_opsrv_cfg_pkg in library work.
@N: CG364 :"F:\DG0799_final\Libero_Project\Libero_Project\component\Microsemi\MiV\MIV_RV32\3.0.100\core_merged\miv_rv32_core_merged.v":314:0:314:5|Synthesizing module work_F:\DG0799_final\Libero_Project\Libero_Project\component\Microsemi\MiV\MIV_RV32\3.0.100\core_merged\miv_rv32_core_merged.v_unit in library work.
@N: CG364 :"F:\DG0799_final\Libero_Project\Libero_Project\component\Microsemi\MiV\MIV_RV32\3.0.100\opsrv_merged\miv_rv32_opsrv_merged.v":74:0:74:5|Synthesizing module work_F:\DG0799_final\Libero_Project\Libero_Project\component\Microsemi\MiV\MIV_RV32\3.0.100\opsrv_merged\miv_rv32_opsrv_merged.v_unit in library work.
@N: CG364 :"C:\Microsemi\Libero_SoC_v12.6\SynplifyPro\lib\generic\acg5.v":121:7:121:10|Synthesizing module AND2 in library work.
@N: CG364 :"C:\Microsemi\Libero_SoC_v12.6\SynplifyPro\lib\generic\acg5.v":333:7:333:11|Synthesizing module BIBUF in library work.
@N: CG775 :"F:\DG0799_final\Libero_Project\Libero_Project\component\Actel\DirectCore\COREJTAGDEBUG\3.1.100\core\corejtagdebug.v":22:7:22:19|Component COREJTAGDEBUG not found in library "work" or "__hyper__lib__", but found in library COREJTAGDEBUG_LIB
@N: CG364 :"F:\DG0799_final\Libero_Project\Libero_Project\component\Actel\DirectCore\COREJTAGDEBUG\3.1.100\core\corejtagdebug.v":22:7:22:19|Synthesizing module COREJTAGDEBUG in library COREJTAGDEBUG_LIB.
@N: CG364 :"C:\Microsemi\Libero_SoC_v12.6\SynplifyPro\lib\generic\acg5.v":1442:7:1442:11|Synthesizing module UJTAG in library work.
@N: CG364 :"F:\DG0799_final\Libero_Project\Libero_Project\component\Actel\DirectCore\COREJTAGDEBUG\3.1.100\core\corejtagdebug_bufd.v":20:7:20:24|Synthesizing module corejtagdebug_bufd in library COREJTAGDEBUG_LIB.
@N: CG364 :"C:\Microsemi\Libero_SoC_v12.6\SynplifyPro\lib\generic\acg5.v":229:7:229:10|Synthesizing module BUFD in library work.
@N: CG364 :"F:\DG0799_final\Libero_Project\Libero_Project\component\Actel\DirectCore\COREJTAGDEBUG\3.1.100\core\corejtagdebug_uj_jtag.v":47:7:47:27|Synthesizing module COREJTAGDEBUG_UJ_JTAG in library COREJTAGDEBUG_LIB.
@N: CG364 :"C:\Microsemi\Libero_SoC_v12.6\SynplifyPro\lib\generic\acg5.v":489:7:489:12|Synthesizing module CLKINT in library work.
@N: CG364 :"F:\DG0799_final\Libero_Project\Libero_Project\component\work\core_jatg_debug_0\core_jatg_debug_0.v":55:7:55:23|Synthesizing module core_jatg_debug_0 in library work.
@N: CG364 :"F:\DG0799_final\Libero_Project\Libero_Project\component\work\Core_reset_pf\Core_reset_pf_0\core\corereset_pf.v":21:7:21:48|Synthesizing module Core_reset_pf_Core_reset_pf_0_CORERESET_PF in library work.
@N: CG364 :"F:\DG0799_final\Libero_Project\Libero_Project\component\work\Core_reset_pf\Core_reset_pf.v":21:7:21:19|Synthesizing module Core_reset_pf in library work.
@N: CG775 :"F:\DG0799_final\Libero_Project\Libero_Project\component\Actel\DirectCore\CoreAPB3\4.2.100\rtl\vlog\core\coreapb3.v":31:7:31:14|Component CoreAPB3 not found in library "work" or "__hyper__lib__", but found in library COREAPB3_LIB
@N: CG364 :"F:\DG0799_final\Libero_Project\Libero_Project\component\Actel\DirectCore\CoreAPB3\4.2.100\rtl\vlog\core\coreapb3_muxptob3.v":30:7:30:23|Synthesizing module COREAPB3_MUXPTOB3 in library COREAPB3_LIB.
@N: CG364 :"F:\DG0799_final\Libero_Project\Libero_Project\component\Actel\DirectCore\CoreAPB3\4.2.100\rtl\vlog\core\coreapb3.v":31:7:31:14|Synthesizing module CoreAPB3 in library COREAPB3_LIB.
@N: CG364 :"F:\DG0799_final\Libero_Project\Libero_Project\component\work\CoreAPB3_0\CoreAPB3_0.v":57:7:57:16|Synthesizing module CoreAPB3_0 in library work.
@N: CG775 :"F:\DG0799_final\Libero_Project\Libero_Project\component\Actel\DirectCore\CORESPI\5.2.104\rtl\vlog\core\corespi.v":27:0:27:6|Component CORESPI not found in library "work" or "__hyper__lib__", but found in library CORESPI_LIB
@N: CG364 :"F:\DG0799_final\Libero_Project\Libero_Project\component\Actel\DirectCore\CORESPI\5.2.104\rtl\vlog\core\spi_rf.v":31:7:31:12|Synthesizing module spi_rf in library CORESPI_LIB.
@N: CG364 :"F:\DG0799_final\Libero_Project\Libero_Project\component\Actel\DirectCore\CORESPI\5.2.104\rtl\vlog\core\spi_control.v":24:7:24:17|Synthesizing module spi_control in library CORESPI_LIB.
@N: CG364 :"F:\DG0799_final\Libero_Project\Libero_Project\component\Actel\DirectCore\CORESPI\5.2.104\rtl\vlog\core\spi_fifo.v":25:7:25:14|Synthesizing module spi_fifo in library CORESPI_LIB.
@N: CG364 :"F:\DG0799_final\Libero_Project\Libero_Project\component\Actel\DirectCore\CORESPI\5.2.104\rtl\vlog\core\spi_clockmux.v":24:7:24:18|Synthesizing module spi_clockmux in library CORESPI_LIB.
@N: CG364 :"F:\DG0799_final\Libero_Project\Libero_Project\component\Actel\DirectCore\CORESPI\5.2.104\rtl\vlog\core\spi_chanctrl.v":29:7:29:18|Synthesizing module spi_chanctrl in library CORESPI_LIB.
@N: CG364 :"F:\DG0799_final\Libero_Project\Libero_Project\component\Actel\DirectCore\CORESPI\5.2.104\rtl\vlog\core\spi.v":29:7:29:9|Synthesizing module spi in library CORESPI_LIB.
@N: CG364 :"F:\DG0799_final\Libero_Project\Libero_Project\component\Actel\DirectCore\CORESPI\5.2.104\rtl\vlog\core\corespi.v":27:0:27:6|Synthesizing module CORESPI in library CORESPI_LIB.
@N: CG364 :"F:\DG0799_final\Libero_Project\Libero_Project\component\work\CORESPI_0\CORESPI_0.v":32:7:32:15|Synthesizing module CORESPI_0 in library work.
@N: CG364 :"F:\DG0799_final\Libero_Project\Libero_Project\component\work\CORETSE_0\CORETSE_0_0\rtl\vlog\obfuscated\decoder.v":6:0:6:28|Synthesizing module CORETSE_0_CORETSE_0_0_DECODER in library work.
@N: CG364 :"F:\DG0799_final\Libero_Project\Libero_Project\component\work\CORETSE_0\CORETSE_0_0\rtl\vlog\obfuscated\tsm_sysreg.v":4:0:4:31|Synthesizing module CORETSE_0_CORETSE_0_0_TSM_SYSREG in library work.
@N: CG364 :"F:\DG0799_final\Libero_Project\Libero_Project\component\work\CORETSE_0\CORETSE_0_0\rtl\vlog\obfuscated\mapbe_hst_cnv.v":6:0:6:34|Synthesizing module CORETSE_0_CORETSE_0_0_MAPBE_HST_CNV in library work.
@N: CG364 :"F:\DG0799_final\Libero_Project\Libero_Project\component\work\CORETSE_0\CORETSE_0_0\rtl\vlog\obfuscated\amcxtfif_fab.v":6:0:6:33|Synthesizing module CORETSE_0_CORETSE_0_0_AMCXTFIF_FAB in library work.
@N: CG364 :"F:\DG0799_final\Libero_Project\Libero_Project\component\work\CORETSE_0\CORETSE_0_0\rtl\vlog\obfuscated\amcxtfif_sys.v":6:0:6:33|Synthesizing module CORETSE_0_CORETSE_0_0_AMCXTFIF_SYS in library work.
@N: CG364 :"F:\DG0799_final\Libero_Project\Libero_Project\component\work\CORETSE_0\CORETSE_0_0\rtl\vlog\obfuscated\amcxrfif_fab.v":6:0:6:33|Synthesizing module CORETSE_0_CORETSE_0_0_AMCXRFIF_FAB in library work.
@N: CG179 :"F:\DG0799_final\Libero_Project\Libero_Project\component\work\CORETSE_0\CORETSE_0_0\rtl\vlog\obfuscated\amcxrfif_fab.v":1479:0:1479:11|Removing redundant assignment.
@N: CG179 :"F:\DG0799_final\Libero_Project\Libero_Project\component\work\CORETSE_0\CORETSE_0_0\rtl\vlog\obfuscated\amcxrfif_fab.v":1485:0:1485:11|Removing redundant assignment.
@N: CG179 :"F:\DG0799_final\Libero_Project\Libero_Project\component\work\CORETSE_0\CORETSE_0_0\rtl\vlog\obfuscated\amcxrfif_fab.v":1491:0:1491:11|Removing redundant assignment.
@N: CG179 :"F:\DG0799_final\Libero_Project\Libero_Project\component\work\CORETSE_0\CORETSE_0_0\rtl\vlog\obfuscated\amcxrfif_fab.v":1497:0:1497:11|Removing redundant assignment.
@N: CG179 :"F:\DG0799_final\Libero_Project\Libero_Project\component\work\CORETSE_0\CORETSE_0_0\rtl\vlog\obfuscated\amcxrfif_fab.v":1503:0:1503:11|Removing redundant assignment.
@N: CG364 :"F:\DG0799_final\Libero_Project\Libero_Project\component\work\CORETSE_0\CORETSE_0_0\rtl\vlog\obfuscated\amcxrfif_sys.v":6:0:6:33|Synthesizing module CORETSE_0_CORETSE_0_0_AMCXRFIF_SYS in library work.
@N: CG364 :"F:\DG0799_final\Libero_Project\Libero_Project\component\work\CORETSE_0\CORETSE_0_0\rtl\vlog\obfuscated\amcxtfif_wtm.v":6:0:6:33|Synthesizing module CORETSE_0_CORETSE_0_0_AMCXTFIF_WTM in library work.
@N: CG364 :"F:\DG0799_final\Libero_Project\Libero_Project\component\work\CORETSE_0\CORETSE_0_0\rtl\vlog\obfuscated\amcxfif_hst.v":6:0:6:32|Synthesizing module CORETSE_0_CORETSE_0_0_AMCXFIF_HST in library work.
@N: CG364 :"F:\DG0799_final\Libero_Project\Libero_Project\component\work\CORETSE_0\CORETSE_0_0\rtl\vlog\obfuscated\amcxfif_clkrst.v":7:0:7:35|Synthesizing module CORETSE_0_CORETSE_0_0_AMCXFIF_CLKRST in library work.
@N: CG364 :"F:\DG0799_final\Libero_Project\Libero_Project\component\work\CORETSE_0\CORETSE_0_0\rtl\vlog\obfuscated\amcxfif.v":6:0:6:28|Synthesizing module CORETSE_0_CORETSE_0_0_AMCXFIF in library work.
@N: CG364 :"F:\DG0799_final\Libero_Project\Libero_Project\component\work\CORETSE_0\CORETSE_0_0\rtl\vlog\obfuscated\petmc_top.v":6:0:6:30|Synthesizing module CORETSE_0_CORETSE_0_0_PETMC_TOP in library work.
@N: CG364 :"F:\DG0799_final\Libero_Project\Libero_Project\component\work\CORETSE_0\CORETSE_0_0\rtl\vlog\obfuscated\pecrc.v":6:0:6:26|Synthesizing module CORETSE_0_CORETSE_0_0_PECRC in library work.
@N: CG364 :"F:\DG0799_final\Libero_Project\Libero_Project\component\work\CORETSE_0\CORETSE_0_0\rtl\vlog\obfuscated\petfn_top.v":6:0:6:30|Synthesizing module CORETSE_0_CORETSE_0_0_PETFN_TOP in library work.
@N: CG179 :"F:\DG0799_final\Libero_Project\Libero_Project\component\work\CORETSE_0\CORETSE_0_0\rtl\vlog\obfuscated\petfn_top.v":10504:0:10504:10|Removing redundant assignment.
@N: CG179 :"F:\DG0799_final\Libero_Project\Libero_Project\component\work\CORETSE_0\CORETSE_0_0\rtl\vlog\obfuscated\petfn_top.v":10566:0:10566:10|Removing redundant assignment.
@N: CG364 :"F:\DG0799_final\Libero_Project\Libero_Project\component\work\CORETSE_0\CORETSE_0_0\rtl\vlog\obfuscated\perfn_top.v":6:0:6:30|Synthesizing module CORETSE_0_CORETSE_0_0_PERFN_TOP in library work.
@N: CG364 :"F:\DG0799_final\Libero_Project\Libero_Project\component\work\CORETSE_0\CORETSE_0_0\rtl\vlog\obfuscated\permc_top.v":6:0:6:30|Synthesizing module CORETSE_0_CORETSE_0_0_PERMC_TOP in library work.
@N: CG364 :"F:\DG0799_final\Libero_Project\Libero_Project\component\work\CORETSE_0\CORETSE_0_0\rtl\vlog\obfuscated\pe_mcxmac_core.v":6:0:6:35|Synthesizing module CORETSE_0_CORETSE_0_0_PE_MCXMAC_CORE in library work.
@N: CG364 :"F:\DG0799_final\Libero_Project\Libero_Project\component\work\CORETSE_0\CORETSE_0_0\rtl\vlog\obfuscated\pemgt.v":6:0:6:26|Synthesizing module CORETSE_0_CORETSE_0_0_PEMGT in library work.
@N: CG364 :"F:\DG0799_final\Libero_Project\Libero_Project\component\work\CORETSE_0\CORETSE_0_0\rtl\vlog\obfuscated\pehst.v":6:0:6:26|Synthesizing module CORETSE_0_CORETSE_0_0_PEHST in library work.
@N: CG364 :"F:\DG0799_final\Libero_Project\Libero_Project\component\work\CORETSE_0\CORETSE_0_0\rtl\vlog\obfuscated\pecar.v":6:0:6:26|Synthesizing module CORETSE_0_CORETSE_0_0_PECAR in library work.
@N: CG364 :"F:\DG0799_final\Libero_Project\Libero_Project\component\work\CORETSE_0\CORETSE_0_0\rtl\vlog\obfuscated\pe_mcxmac.v":6:0:6:30|Synthesizing module CORETSE_0_CORETSE_0_0_PE_MCXMAC in library work.
@N: CG364 :"F:\DG0799_final\Libero_Project\Libero_Project\component\work\CORETSE_0\CORETSE_0_0\rtl\vlog\obfuscated\tsmac_top.v":4:0:4:30|Synthesizing module CORETSE_0_CORETSE_0_0_TSMAC_TOP in library work.
@N: CG364 :"F:\DG0799_final\Libero_Project\Libero_Project\component\work\CORETSE_0\CORETSE_0_0\rtl\vlog\obfuscated\sib_sync_pulse.v":5:0:5:35|Synthesizing module CORETSE_0_CORETSE_0_0_SIB_SYNC_PULSE in library work.
@N: CG364 :"F:\DG0799_final\Libero_Project\Libero_Project\component\work\CORETSE_0\CORETSE_0_0\rtl\vlog\obfuscated\sib_sync_2flp.v":5:0:5:34|Synthesizing module CORETSE_0_CORETSE_0_0_SIB_SYNC_2FLP in library work.
@N: CG364 :"F:\DG0799_final\Libero_Project\Libero_Project\component\work\CORETSE_0\CORETSE_0_0\rtl\vlog\obfuscated\pemstat_cntrl.v":6:0:6:34|Synthesizing module CORETSE_0_CORETSE_0_0_PEMSTAT_CNTRL in library work.
@N: CG364 :"F:\DG0799_final\Libero_Project\Libero_Project\component\work\CORETSE_0\CORETSE_0_0\rtl\vlog\obfuscated\pemstat_linc.v":6:0:6:33|Synthesizing module CORETSE_0_CORETSE_0_0_PEMSTAT_LINC in library work.
@N: CG179 :"F:\DG0799_final\Libero_Project\Libero_Project\component\work\CORETSE_0\CORETSE_0_0\rtl\vlog\obfuscated\pemstat_linc.v":226:0:226:10|Removing redundant assignment.
@N: CG179 :"F:\DG0799_final\Libero_Project\Libero_Project\component\work\CORETSE_0\CORETSE_0_0\rtl\vlog\obfuscated\pemstat_linc.v":300:0:300:10|Removing redundant assignment.
@N: CG364 :"F:\DG0799_final\Libero_Project\Libero_Project\component\work\CORETSE_0\CORETSE_0_0\rtl\vlog\obfuscated\pemstat_ladd.v":6:0:6:33|Synthesizing module CORETSE_0_CORETSE_0_0_PEMSTAT_LADD in library work.
@N: CG179 :"F:\DG0799_final\Libero_Project\Libero_Project\component\work\CORETSE_0\CORETSE_0_0\rtl\vlog\obfuscated\pemstat_ladd.v":383:0:383:10|Removing redundant assignment.
@N: CG364 :"F:\DG0799_final\Libero_Project\Libero_Project\component\work\CORETSE_0\CORETSE_0_0\rtl\vlog\obfuscated\pemstat_sinc.v":6:0:6:33|Synthesizing module CORETSE_0_CORETSE_0_0_PEMSTAT_SINC in library work.
@N: CG179 :"F:\DG0799_final\Libero_Project\Libero_Project\component\work\CORETSE_0\CORETSE_0_0\rtl\vlog\obfuscated\pemstat_sinc.v":226:0:226:10|Removing redundant assignment.
@N: CG179 :"F:\DG0799_final\Libero_Project\Libero_Project\component\work\CORETSE_0\CORETSE_0_0\rtl\vlog\obfuscated\pemstat_sinc.v":300:0:300:10|Removing redundant assignment.
@N: CG364 :"F:\DG0799_final\Libero_Project\Libero_Project\component\work\CORETSE_0\CORETSE_0_0\rtl\vlog\obfuscated\pemstat_sinchd.v":6:0:6:35|Synthesizing module CORETSE_0_CORETSE_0_0_PEMSTAT_SINCHD in library work.
@N: CG179 :"F:\DG0799_final\Libero_Project\Libero_Project\component\work\CORETSE_0\CORETSE_0_0\rtl\vlog\obfuscated\pemstat_sinchd.v":226:0:226:10|Removing redundant assignment.
@N: CG179 :"F:\DG0799_final\Libero_Project\Libero_Project\component\work\CORETSE_0\CORETSE_0_0\rtl\vlog\obfuscated\pemstat_sinchd.v":300:0:300:10|Removing redundant assignment.
@N: CG364 :"F:\DG0799_final\Libero_Project\Libero_Project\component\work\CORETSE_0\CORETSE_0_0\rtl\vlog\obfuscated\pemstat_sadd.v":6:0:6:33|Synthesizing module CORETSE_0_CORETSE_0_0_PEMSTAT_SADD in library work.
@N: CG179 :"F:\DG0799_final\Libero_Project\Libero_Project\component\work\CORETSE_0\CORETSE_0_0\rtl\vlog\obfuscated\pemstat_sadd.v":244:0:244:10|Removing redundant assignment.
@N: CG179 :"F:\DG0799_final\Libero_Project\Libero_Project\component\work\CORETSE_0\CORETSE_0_0\rtl\vlog\obfuscated\pemstat_sadd.v":323:0:323:10|Removing redundant assignment.
@N: CG364 :"F:\DG0799_final\Libero_Project\Libero_Project\component\work\CORETSE_0\CORETSE_0_0\rtl\vlog\obfuscated\pemstat_sincnf.v":6:0:6:35|Synthesizing module CORETSE_0_CORETSE_0_0_PEMSTAT_SINCNF in library work.
@N: CG179 :"F:\DG0799_final\Libero_Project\Libero_Project\component\work\CORETSE_0\CORETSE_0_0\rtl\vlog\obfuscated\pemstat_sincnf.v":226:0:226:10|Removing redundant assignment.
@N: CG179 :"F:\DG0799_final\Libero_Project\Libero_Project\component\work\CORETSE_0\CORETSE_0_0\rtl\vlog\obfuscated\pemstat_sincnf.v":300:0:300:10|Removing redundant assignment.
@N: CG364 :"F:\DG0799_final\Libero_Project\Libero_Project\component\work\CORETSE_0\CORETSE_0_0\rtl\vlog\obfuscated\pemstat_store.v":6:0:6:34|Synthesizing module CORETSE_0_CORETSE_0_0_PEMSTAT_STORE in library work.
@N: CG364 :"F:\DG0799_final\Libero_Project\Libero_Project\component\work\CORETSE_0\CORETSE_0_0\rtl\vlog\obfuscated\pemstat_eim.v":6:0:6:32|Synthesizing module CORETSE_0_CORETSE_0_0_PEMSTAT_EIM in library work.
@N: CG364 :"F:\DG0799_final\Libero_Project\Libero_Project\component\work\CORETSE_0\CORETSE_0_0\rtl\vlog\obfuscated\pemstat.v":6:0:6:28|Synthesizing module CORETSE_0_CORETSE_0_0_PEMSTAT in library work.
@N: CG364 :"F:\DG0799_final\Libero_Project\Libero_Project\component\work\CORETSE_0\CORETSE_0_0\rtl\vlog\obfuscated\mmcxwol.v":6:0:6:28|Synthesizing module CORETSE_0_CORETSE_0_0_MMCXWOL in library work.
@N: CG364 :"F:\DG0799_final\Libero_Project\Libero_Project\component\work\CORETSE_0\CORETSE_0_0\rtl\vlog\obfuscated\si_sal.v":4:0:4:27|Synthesizing module CORETSE_0_CORETSE_0_0_SI_SAL in library work.
@N: CG179 :"F:\DG0799_final\Libero_Project\Libero_Project\component\work\CORETSE_0\CORETSE_0_0\rtl\vlog\obfuscated\si_sal.v":931:0:931:10|Removing redundant assignment.
@N: CG364 :"F:\DG0799_final\Libero_Project\Libero_Project\component\work\CORETSE_0\CORETSE_0_0\rtl\vlog\obfuscated\tx2048x40.v":6:0:6:30|Synthesizing module CORETSE_0_CORETSE_0_0_TX2048X40 in library work.
@N: CL134 :"F:\DG0799_final\Libero_Project\Libero_Project\component\work\CORETSE_0\CORETSE_0_0\rtl\vlog\obfuscated\tx2048x40.v":139:0:139:5|Found RAM CORETSEIIil, depth=2048, width=40
@N: CG364 :"F:\DG0799_final\Libero_Project\Libero_Project\component\work\CORETSE_0\CORETSE_0_0\rtl\vlog\obfuscated\rx4096x36.v":6:0:6:30|Synthesizing module CORETSE_0_CORETSE_0_0_RX4096X36 in library work.
@N: CL134 :"F:\DG0799_final\Libero_Project\Libero_Project\component\work\CORETSE_0\CORETSE_0_0\rtl\vlog\obfuscated\rx4096x36.v":139:0:139:5|Found RAM CORETSEIIil, depth=4096, width=36
@N: CG364 :"F:\DG0799_final\Libero_Project\Libero_Project\component\work\CORETSE_0\CORETSE_0_0\rtl\vlog\obfuscated\CoreTSE_top.v":2:0:2:32|Synthesizing module CORETSE_0_CORETSE_0_0_CORETSE_TOP in library work.
@N: CG364 :"F:\DG0799_final\Libero_Project\Libero_Project\component\work\CORETSE_0\CORETSE_0_0\rtl\vlog\obfuscated\msgmii_clkrst.v":7:0:7:34|Synthesizing module CORETSE_0_CORETSE_0_0_MSGMII_CLKRST in library work.
@N: CG364 :"F:\DG0799_final\Libero_Project\Libero_Project\component\work\CORETSE_0\CORETSE_0_0\rtl\vlog\obfuscated\msgmii_cnvtxi.v":6:0:6:34|Synthesizing module CORETSE_0_CORETSE_0_0_MSGMII_CNVTXI in library work.
@N: CG364 :"F:\DG0799_final\Libero_Project\Libero_Project\component\work\CORETSE_0\CORETSE_0_0\rtl\vlog\obfuscated\msgmii_cnvtxo.v":6:0:6:34|Synthesizing module CORETSE_0_CORETSE_0_0_MSGMII_CNVTXO in library work.
@N: CG364 :"F:\DG0799_final\Libero_Project\Libero_Project\component\work\CORETSE_0\CORETSE_0_0\rtl\vlog\obfuscated\t8b10b.v":6:0:6:27|Synthesizing module CORETSE_0_CORETSE_0_0_T8B10B in library work.
@N: CG364 :"F:\DG0799_final\Libero_Project\Libero_Project\component\work\CORETSE_0\CORETSE_0_0\rtl\vlog\obfuscated\petex_top.v":6:0:6:30|Synthesizing module CORETSE_0_CORETSE_0_0_PETEX_TOP in library work.
@N: CG179 :"F:\DG0799_final\Libero_Project\Libero_Project\component\work\CORETSE_0\CORETSE_0_0\rtl\vlog\obfuscated\petex_top.v":2139:0:2139:10|Removing redundant assignment.
@N: CG364 :"F:\DG0799_final\Libero_Project\Libero_Project\component\work\CORETSE_0\CORETSE_0_0\rtl\vlog\obfuscated\perex_pma.v":6:0:6:30|Synthesizing module CORETSE_0_CORETSE_0_0_PEREX_PMA in library work.
@N: CG364 :"F:\DG0799_final\Libero_Project\Libero_Project\component\work\CORETSE_0\CORETSE_0_0\rtl\vlog\obfuscated\r10b8b.v":6:0:6:27|Synthesizing module CORETSE_0_CORETSE_0_0_R10B8B in library work.
@N: CG364 :"F:\DG0799_final\Libero_Project\Libero_Project\component\work\CORETSE_0\CORETSE_0_0\rtl\vlog\obfuscated\perex_pcs.v":6:0:6:30|Synthesizing module CORETSE_0_CORETSE_0_0_PEREX_PCS in library work.
@N: CG364 :"F:\DG0799_final\Libero_Project\Libero_Project\component\work\CORETSE_0\CORETSE_0_0\rtl\vlog\obfuscated\peanx_sync.v":6:0:6:31|Synthesizing module CORETSE_0_CORETSE_0_0_PEANX_SYNC in library work.
@N: CG364 :"F:\DG0799_final\Libero_Project\Libero_Project\component\work\CORETSE_0\CORETSE_0_0\rtl\vlog\obfuscated\msgmii_peanx_top.v":6:0:6:37|Synthesizing module CORETSE_0_CORETSE_0_0_MSGMII_PEANX_TOP in library work.
@N: CG364 :"F:\DG0799_final\Libero_Project\Libero_Project\component\work\CORETSE_0\CORETSE_0_0\rtl\vlog\obfuscated\petbm.v":6:0:6:26|Synthesizing module CORETSE_0_CORETSE_0_0_PETBM in library work.
@N: CG364 :"F:\DG0799_final\Libero_Project\Libero_Project\component\work\CORETSE_0\CORETSE_0_0\rtl\vlog\obfuscated\petcr.v":7:0:7:26|Synthesizing module CORETSE_0_CORETSE_0_0_PETCR in library work.
@N: CG364 :"F:\DG0799_final\Libero_Project\Libero_Project\component\work\CORETSE_0\CORETSE_0_0\rtl\vlog\obfuscated\msgmii_tbi.v":6:0:6:31|Synthesizing module CORETSE_0_CORETSE_0_0_MSGMII_TBI in library work.
@N: CG364 :"F:\DG0799_final\Libero_Project\Libero_Project\component\work\CORETSE_0\CORETSE_0_0\rtl\vlog\obfuscated\msgmii_cnvrxi.v":6:0:6:34|Synthesizing module CORETSE_0_CORETSE_0_0_MSGMII_CNVRXI in library work.
@N: CG364 :"F:\DG0799_final\Libero_Project\Libero_Project\component\work\CORETSE_0\CORETSE_0_0\rtl\vlog\obfuscated\msgmii_cnvrxo.v":6:0:6:34|Synthesizing module CORETSE_0_CORETSE_0_0_MSGMII_CNVRXO in library work.
@N: CG364 :"F:\DG0799_final\Libero_Project\Libero_Project\component\work\CORETSE_0\CORETSE_0_0\rtl\vlog\obfuscated\msgmii_core.v":6:0:6:32|Synthesizing module CORETSE_0_CORETSE_0_0_MSGMII_CORE in library work.
@N: CG364 :"F:\DG0799_final\Libero_Project\Libero_Project\component\work\CORETSE_0\CORETSE_0_0\rtl\vlog\obfuscated\CoreTSE.v":2:0:2:28|Synthesizing module CORETSE_0_CORETSE_0_0_CORETSE in library work.
@N: CG364 :"F:\DG0799_final\Libero_Project\Libero_Project\component\work\CORETSE_0\CORETSE_0.v":28:7:28:15|Synthesizing module CORETSE_0 in library work.
@N: CG364 :"F:\DG0799_final\Libero_Project\Libero_Project\component\work\CoreUARTapb_0\CoreUARTapb_0_0\rtl\vlog\core_obfuscated\Clock_gen.v":30:0:30:38|Synthesizing module CoreUARTapb_0_CoreUARTapb_0_0_Clock_gen in library work.
@N: CG364 :"F:\DG0799_final\Libero_Project\Libero_Project\component\work\CoreUARTapb_0\CoreUARTapb_0_0\rtl\vlog\core_obfuscated\Tx_async.v":14:0:14:37|Synthesizing module CoreUARTapb_0_CoreUARTapb_0_0_Tx_async in library work.
@N: CG179 :"F:\DG0799_final\Libero_Project\Libero_Project\component\work\CoreUARTapb_0\CoreUARTapb_0_0\rtl\vlog\core_obfuscated\Tx_async.v":870:0:870:8|Removing redundant assignment.
@N: CG364 :"F:\DG0799_final\Libero_Project\Libero_Project\component\work\CoreUARTapb_0\CoreUARTapb_0_0\rtl\vlog\core_obfuscated\Rx_async.v":14:0:14:37|Synthesizing module CoreUARTapb_0_CoreUARTapb_0_0_Rx_async in library work.
@N: CG179 :"F:\DG0799_final\Libero_Project\Libero_Project\component\work\CoreUARTapb_0\CoreUARTapb_0_0\rtl\vlog\core_obfuscated\Rx_async.v":750:0:750:7|Removing redundant assignment.
@N: CG179 :"F:\DG0799_final\Libero_Project\Libero_Project\component\work\CoreUARTapb_0\CoreUARTapb_0_0\rtl\vlog\core_obfuscated\Rx_async.v":857:0:857:8|Removing redundant assignment.
@N: CG364 :"F:\DG0799_final\Libero_Project\Libero_Project\component\work\CoreUARTapb_0\CoreUARTapb_0_0\rtl\vlog\core_obfuscated\CoreUART.v":14:0:14:37|Synthesizing module CoreUARTapb_0_CoreUARTapb_0_0_COREUART in library work.
@N: CG179 :"F:\DG0799_final\Libero_Project\Libero_Project\component\work\CoreUARTapb_0\CoreUARTapb_0_0\rtl\vlog\core_obfuscated\CoreUART.v":1338:0:1338:7|Removing redundant assignment.
@N: CG364 :"F:\DG0799_final\Libero_Project\Libero_Project\component\work\CoreUARTapb_0\CoreUARTapb_0_0\rtl\vlog\core_obfuscated\CoreUARTapb.v":14:0:14:40|Synthesizing module CoreUARTapb_0_CoreUARTapb_0_0_CoreUARTapb in library work.
@N: CG179 :"F:\DG0799_final\Libero_Project\Libero_Project\component\work\CoreUARTapb_0\CoreUARTapb_0_0\rtl\vlog\core_obfuscated\CoreUARTapb.v":785:0:785:8|Removing redundant assignment.
@N: CG179 :"F:\DG0799_final\Libero_Project\Libero_Project\component\work\CoreUARTapb_0\CoreUARTapb_0_0\rtl\vlog\core_obfuscated\CoreUARTapb.v":868:0:868:8|Removing redundant assignment.
@N: CG364 :"F:\DG0799_final\Libero_Project\Libero_Project\component\work\CoreUARTapb_0\CoreUARTapb_0.v":31:7:31:19|Synthesizing module CoreUARTapb_0 in library work.
@N: CG364 :"C:\Microsemi\Libero_SoC_v12.6\SynplifyPro\lib\generic\acg5.v":357:7:357:16|Synthesizing module INBUF_DIFF in library work.
@N: CG364 :"F:\DG0799_final\Libero_Project\Libero_Project\component\Microsemi\MiV\MIV_RV32\3.0.100\core_merged\miv_rv32_core_merged.v":15936:7:15936:22|Synthesizing module miv_rv32_ifu_iab in library work.
@N: CG364 :"F:\DG0799_final\Libero_Project\Libero_Project\component\Microsemi\MiV\MIV_RV32\3.0.100\core_merged\miv_rv32_core_merged.v":10933:7:10933:25|Synthesizing module miv_rv32_fetch_unit in library work.
@N: CG364 :"F:\DG0799_final\Libero_Project\Libero_Project\component\Microsemi\MiV\MIV_RV32\3.0.100\core_merged\miv_rv32_core_merged.v":16373:7:16373:18|Synthesizing module miv_rv32_lsu in library work.
@N: CG364 :"F:\DG0799_final\Libero_Project\Libero_Project\component\Microsemi\MiV\MIV_RV32\3.0.100\core_merged\miv_rv32_core_merged.v":11814:7:11814:22|Synthesizing module miv_rv32_idecode in library work.
@N: CG179 :"F:\DG0799_final\Libero_Project\Libero_Project\component\Microsemi\MiV\MIV_RV32\3.0.100\core_merged\miv_rv32_core_merged.v":5850:72:5850:89|Removing redundant assignment.
@N: CG179 :"F:\DG0799_final\Libero_Project\Libero_Project\component\Microsemi\MiV\MIV_RV32\3.0.100\core_merged\miv_rv32_core_merged.v":5851:72:5851:89|Removing redundant assignment.
@N: CL214 :"F:\DG0799_final\Libero_Project\Libero_Project\component\Microsemi\MiV\MIV_RV32\3.0.100\core_merged\miv_rv32_core_merged.v":6037:35:6037:46|Found multi-write port RAM mem, number of write ports=2, depth=32, width=32
@N: CL214 :"F:\DG0799_final\Libero_Project\Libero_Project\component\Microsemi\MiV\MIV_RV32\3.0.100\core_merged\miv_rv32_core_merged.v":6036:35:6036:46|Found multi-write port RAM mem, number of write ports=2, depth=32, width=32
@N: CG179 :"F:\DG0799_final\Libero_Project\Libero_Project\component\Microsemi\MiV\MIV_RV32\3.0.100\opsrv_merged\miv_rv32_opsrv_merged.v":12880:67:12880:73|Removing redundant assignment.
@N: CG179 :"F:\DG0799_final\Libero_Project\Libero_Project\component\Microsemi\MiV\MIV_RV32\3.0.100\opsrv_merged\miv_rv32_opsrv_merged.v":12888:67:12888:73|Removing redundant assignment.
@N: CG179 :"F:\DG0799_final\Libero_Project\Libero_Project\component\Microsemi\MiV\MIV_RV32\3.0.100\opsrv_merged\miv_rv32_opsrv_merged.v":12908:48:12908:54|Removing redundant assignment.
@N: CG179 :"F:\DG0799_final\Libero_Project\Libero_Project\component\Microsemi\MiV\MIV_RV32\3.0.100\opsrv_merged\miv_rv32_opsrv_merged.v":12909:48:12909:54|Removing redundant assignment.
@N: CG179 :"F:\DG0799_final\Libero_Project\Libero_Project\component\Microsemi\MiV\MIV_RV32\3.0.100\opsrv_merged\miv_rv32_opsrv_merged.v":12910:48:12910:54|Removing redundant assignment.
@N: CG179 :"F:\DG0799_final\Libero_Project\Libero_Project\component\Microsemi\MiV\MIV_RV32\3.0.100\opsrv_merged\miv_rv32_opsrv_merged.v":12911:48:12911:55|Removing redundant assignment.
@N: CG179 :"F:\DG0799_final\Libero_Project\Libero_Project\component\Microsemi\MiV\MIV_RV32\3.0.100\opsrv_merged\miv_rv32_opsrv_merged.v":13087:45:13087:49|Removing redundant assignment.
@N: CL134 :"F:\DG0799_final\Libero_Project\Libero_Project\component\Microsemi\MiV\MIV_RV32\3.0.100\opsrv_merged\miv_rv32_opsrv_merged.v":12426:12:12426:20|Found RAM fifoMem, depth=2, width=41
@N: CL134 :"F:\DG0799_final\Libero_Project\Libero_Project\component\Microsemi\MiV\MIV_RV32\3.0.100\opsrv_merged\miv_rv32_opsrv_merged.v":12426:12:12426:20|Found RAM fifoMem, depth=2, width=34
@N: CG179 :"F:\DG0799_final\Libero_Project\Libero_Project\component\Microsemi\MiV\MIV_RV32\3.0.100\opsrv_merged\miv_rv32_opsrv_merged.v":6149:36:6149:48|Removing redundant assignment.
@N: CL159 :"F:\DG0799_final\Libero_Project\Libero_Project\component\work\PF_IOD_CDR_CCC_C0\PF_LANECTRL_CORE_READER_0\PF_LANECTRL_PAUSE_SYNC.v":15:7:15:9|Input CLK is unused.
@N: CL159 :"F:\DG0799_final\Libero_Project\Libero_Project\component\work\PF_IOD_CDR_CCC_C0\PF_LANECTRL_CORE_READER_0\PF_LANECTRL_PAUSE_SYNC.v":15:12:15:16|Input RESET is unused.
@N: CL201 :"F:\DG0799_final\Libero_Project\Libero_Project\component\Actel\DirectCore\COREDELAYCODE_TIP\2.1.100\rtl\vlog\core\CoreDelayCode_TIP.v":59:0:59:5|Trying to extract state machine for register state.
@N: CL159 :"F:\DG0799_final\Libero_Project\Libero_Project\component\work\PF_IOD_CDR_C0\PF_IOD_CDR_C0.v":69:13:69:20|Input DLL_LOCK is unused.
@N: CL159 :"F:\DG0799_final\Libero_Project\Libero_Project\component\work\PF_IOD_CDR_C0\PF_IOD_CDR_C0.v":76:13:76:20|Input PLL_LOCK is unused.
@N: CL159 :"F:\DG0799_final\Libero_Project\Libero_Project\component\work\PF_IOD_CDR_C0\PF_LANECTRL_0\PF_LANECTRL_PAUSE_SYNC.v":15:7:15:9|Input CLK is unused.
@N: CL159 :"F:\DG0799_final\Libero_Project\Libero_Project\component\work\PF_IOD_CDR_C0\PF_LANECTRL_0\PF_LANECTRL_PAUSE_SYNC.v":15:12:15:16|Input RESET is unused.
@N: CL159 :"F:\DG0799_final\Libero_Project\Libero_Project\component\work\PF_IOD_CDR_C0\PF_IOD_CDR_LANECTRL_OVERLAY_0\PF_IOD_CDR_C0_PF_IOD_CDR_LANECTRL_OVERLAY_0_PF_IOD.v":31:7:31:13|Input FAB_CLK is unused.
@N: CL201 :"F:\DG0799_final\Libero_Project\Libero_Project\component\Actel\DirectCore\CORECDR4_CNTL_TIP\2.0.100\rtl\vlog\core\corecdr4_cntl_tip.v":117:0:117:5|Trying to extract state machine for register tune_st.
@N: CL201 :"F:\DG0799_final\Libero_Project\Libero_Project\component\Microsemi\MiV\MIV_RV32\3.0.100\opsrv_merged\miv_rv32_opsrv_merged.v":9303:2:9303:7|Trying to extract state machine for register cpu_d_wr_rd_state.
@N: CL159 :"F:\DG0799_final\Libero_Project\Libero_Project\component\Microsemi\MiV\MIV_RV32\3.0.100\opsrv_merged\miv_rv32_opsrv_merged.v":9065:49:9065:63|Input opsrv_parity_en is unused.
@N: CL159 :"F:\DG0799_final\Libero_Project\Libero_Project\component\Microsemi\MiV\MIV_RV32\3.0.100\opsrv_merged\miv_rv32_opsrv_merged.v":9074:49:9074:68|Input cpu_i_req_rd_byte_en is unused.
@N: CL159 :"F:\DG0799_final\Libero_Project\Libero_Project\component\Microsemi\MiV\MIV_RV32\3.0.100\opsrv_merged\miv_rv32_opsrv_merged.v":9076:49:9076:64|Input cpu_i_req_addr_p is unused.
@N: CL159 :"F:\DG0799_final\Libero_Project\Libero_Project\component\Microsemi\MiV\MIV_RV32\3.0.100\opsrv_merged\miv_rv32_opsrv_merged.v":9078:49:9078:64|Input cpu_i_resp_ready is unused.
@N: CL159 :"F:\DG0799_final\Libero_Project\Libero_Project\component\Microsemi\MiV\MIV_RV32\3.0.100\opsrv_merged\miv_rv32_opsrv_merged.v":9084:49:9084:68|Input cpu_d_req_rd_byte_en is unused.
@N: CL159 :"F:\DG0799_final\Libero_Project\Libero_Project\component\Microsemi\MiV\MIV_RV32\3.0.100\opsrv_merged\miv_rv32_opsrv_merged.v":9086:49:9086:62|Input cpu_d_req_read is unused.
@N: CL159 :"F:\DG0799_final\Libero_Project\Libero_Project\component\Microsemi\MiV\MIV_RV32\3.0.100\opsrv_merged\miv_rv32_opsrv_merged.v":9087:49:9087:63|Input cpu_d_req_write is unused.
@N: CL159 :"F:\DG0799_final\Libero_Project\Libero_Project\component\Microsemi\MiV\MIV_RV32\3.0.100\opsrv_merged\miv_rv32_opsrv_merged.v":9089:49:9089:64|Input cpu_d_req_addr_p is unused.
@N: CL159 :"F:\DG0799_final\Libero_Project\Libero_Project\component\Microsemi\MiV\MIV_RV32\3.0.100\opsrv_merged\miv_rv32_opsrv_merged.v":9091:49:9091:67|Input cpu_d_req_wr_data_p is unused.
@N: CL159 :"F:\DG0799_final\Libero_Project\Libero_Project\component\Microsemi\MiV\MIV_RV32\3.0.100\opsrv_merged\miv_rv32_opsrv_merged.v":9093:49:9093:64|Input cpu_d_resp_ready is unused.
@N: CL159 :"F:\DG0799_final\Libero_Project\Libero_Project\component\Microsemi\MiV\MIV_RV32\3.0.100\opsrv_merged\miv_rv32_opsrv_merged.v":9099:49:9099:62|Input udma_req_valid is unused.
@N: CL159 :"F:\DG0799_final\Libero_Project\Libero_Project\component\Microsemi\MiV\MIV_RV32\3.0.100\opsrv_merged\miv_rv32_opsrv_merged.v":9101:49:9101:67|Input udma_req_rd_byte_en is unused.
@N: CL159 :"F:\DG0799_final\Libero_Project\Libero_Project\component\Microsemi\MiV\MIV_RV32\3.0.100\opsrv_merged\miv_rv32_opsrv_merged.v":9102:49:9102:67|Input udma_req_wr_byte_en is unused.
@N: CL159 :"F:\DG0799_final\Libero_Project\Libero_Project\component\Microsemi\MiV\MIV_RV32\3.0.100\opsrv_merged\miv_rv32_opsrv_merged.v":9103:49:9103:61|Input udma_req_read is unused.
@N: CL159 :"F:\DG0799_final\Libero_Project\Libero_Project\component\Microsemi\MiV\MIV_RV32\3.0.100\opsrv_merged\miv_rv32_opsrv_merged.v":9104:49:9104:62|Input udma_req_write is unused.
@N: CL159 :"F:\DG0799_final\Libero_Project\Libero_Project\component\Microsemi\MiV\MIV_RV32\3.0.100\opsrv_merged\miv_rv32_opsrv_merged.v":9105:49:9105:61|Input udma_req_addr is unused.
@N: CL159 :"F:\DG0799_final\Libero_Project\Libero_Project\component\Microsemi\MiV\MIV_RV32\3.0.100\opsrv_merged\miv_rv32_opsrv_merged.v":9106:49:9106:63|Input udma_req_addr_p is unused.
@N: CL159 :"F:\DG0799_final\Libero_Project\Libero_Project\component\Microsemi\MiV\MIV_RV32\3.0.100\opsrv_merged\miv_rv32_opsrv_merged.v":9107:49:9107:60|Input udma_req_len is unused.
@N: CL159 :"F:\DG0799_final\Libero_Project\Libero_Project\component\Microsemi\MiV\MIV_RV32\3.0.100\opsrv_merged\miv_rv32_opsrv_merged.v":9108:49:9108:64|Input udma_req_wr_data is unused.
@N: CL159 :"F:\DG0799_final\Libero_Project\Libero_Project\component\Microsemi\MiV\MIV_RV32\3.0.100\opsrv_merged\miv_rv32_opsrv_merged.v":9109:49:9109:66|Input udma_req_wr_data_p is unused.
@N: CL159 :"F:\DG0799_final\Libero_Project\Libero_Project\component\Microsemi\MiV\MIV_RV32\3.0.100\opsrv_merged\miv_rv32_opsrv_merged.v":9111:49:9111:63|Input udma_resp_ready is unused.
@N: CL159 :"F:\DG0799_final\Libero_Project\Libero_Project\component\Microsemi\MiV\MIV_RV32\3.0.100\opsrv_merged\miv_rv32_opsrv_merged.v":9118:49:9118:70|Input tcm_dma_access_disable is unused.
@N: CL159 :"F:\DG0799_final\Libero_Project\Libero_Project\component\Microsemi\MiV\MIV_RV32\3.0.100\opsrv_merged\miv_rv32_opsrv_merged.v":9119:49:9119:70|Input tcm_dap_access_disable is unused.
@N: CL159 :"F:\DG0799_final\Libero_Project\Libero_Project\component\Microsemi\MiV\MIV_RV32\3.0.100\opsrv_merged\miv_rv32_opsrv_merged.v":9120:49:9120:65|Input tcm_dap_req_valid is unused.
@N: CL159 :"F:\DG0799_final\Libero_Project\Libero_Project\component\Microsemi\MiV\MIV_RV32\3.0.100\opsrv_merged\miv_rv32_opsrv_merged.v":9122:49:9122:70|Input tcm_dap_req_rd_byte_en is unused.
@N: CL159 :"F:\DG0799_final\Libero_Project\Libero_Project\component\Microsemi\MiV\MIV_RV32\3.0.100\opsrv_merged\miv_rv32_opsrv_merged.v":9123:49:9123:70|Input tcm_dap_req_wr_byte_en is unused.
@N: CL159 :"F:\DG0799_final\Libero_Project\Libero_Project\component\Microsemi\MiV\MIV_RV32\3.0.100\opsrv_merged\miv_rv32_opsrv_merged.v":9124:48:9124:63|Input tcm_dap_req_addr is unused.
@N: CL159 :"F:\DG0799_final\Libero_Project\Libero_Project\component\Microsemi\MiV\MIV_RV32\3.0.100\opsrv_merged\miv_rv32_opsrv_merged.v":9125:49:9125:66|Input tcm_dap_req_addr_p is unused.
@N: CL159 :"F:\DG0799_final\Libero_Project\Libero_Project\component\Microsemi\MiV\MIV_RV32\3.0.100\opsrv_merged\miv_rv32_opsrv_merged.v":9126:49:9126:67|Input tcm_dap_req_wr_data is unused.
@N: CL159 :"F:\DG0799_final\Libero_Project\Libero_Project\component\Microsemi\MiV\MIV_RV32\3.0.100\opsrv_merged\miv_rv32_opsrv_merged.v":9127:49:9127:69|Input tcm_dap_req_wr_data_p is unused.
@N: CL159 :"F:\DG0799_final\Libero_Project\Libero_Project\component\Microsemi\MiV\MIV_RV32\3.0.100\opsrv_merged\miv_rv32_opsrv_merged.v":9129:49:9129:66|Input tcm_dap_resp_ready is unused.
@N: CL159 :"F:\DG0799_final\Libero_Project\Libero_Project\component\Microsemi\MiV\MIV_RV32\3.0.100\opsrv_merged\miv_rv32_opsrv_merged.v":9134:49:9134:61|Input tcm_ram_sb_in is unused.
@N: CL201 :"F:\DG0799_final\Libero_Project\Libero_Project\component\Microsemi\MiV\MIV_RV32\3.0.100\opsrv_merged\miv_rv32_opsrv_merged.v":14288:2:14288:7|Trying to extract state machine for register hipri_req_ptr.
@N: CL201 :"F:\DG0799_final\Libero_Project\Libero_Project\component\Microsemi\MiV\MIV_RV32\3.0.100\opsrv_merged\miv_rv32_opsrv_merged.v":6099:6:6099:11|Trying to extract state machine for register gen_apb_byte_shim.apb_st.
@N: CL159 :"F:\DG0799_final\Libero_Project\Libero_Project\component\Microsemi\MiV\MIV_RV32\3.0.100\opsrv_merged\miv_rv32_opsrv_merged.v":5931:49:5931:63|Input opsrv_parity_en is unused.
@N: CL159 :"F:\DG0799_final\Libero_Project\Libero_Project\component\Microsemi\MiV\MIV_RV32\3.0.100\opsrv_merged\miv_rv32_opsrv_merged.v":5938:49:5938:68|Input cpu_i_req_rd_byte_en is unused.
@N: CL159 :"F:\DG0799_final\Libero_Project\Libero_Project\component\Microsemi\MiV\MIV_RV32\3.0.100\opsrv_merged\miv_rv32_opsrv_merged.v":5940:49:5940:64|Input cpu_i_req_addr_p is unused.
@N: CL159 :"F:\DG0799_final\Libero_Project\Libero_Project\component\Microsemi\MiV\MIV_RV32\3.0.100\opsrv_merged\miv_rv32_opsrv_merged.v":5942:49:5942:64|Input cpu_i_resp_ready is unused.
@N: CL159 :"F:\DG0799_final\Libero_Project\Libero_Project\component\Microsemi\MiV\MIV_RV32\3.0.100\opsrv_merged\miv_rv32_opsrv_merged.v":5948:49:5948:68|Input cpu_d_req_rd_byte_en is unused.
@N: CL159 :"F:\DG0799_final\Libero_Project\Libero_Project\component\Microsemi\MiV\MIV_RV32\3.0.100\opsrv_merged\miv_rv32_opsrv_merged.v":5951:49:5951:64|Input cpu_d_req_addr_p is unused.
@N: CL159 :"F:\DG0799_final\Libero_Project\Libero_Project\component\Microsemi\MiV\MIV_RV32\3.0.100\opsrv_merged\miv_rv32_opsrv_merged.v":5955:49:5955:64|Input cpu_d_resp_ready is unused.
@N: CL201 :"F:\DG0799_final\Libero_Project\Libero_Project\component\Microsemi\MiV\MIV_RV32\3.0.100\opsrv_merged\miv_rv32_opsrv_merged.v":14288:2:14288:7|Trying to extract state machine for register hipri_req_ptr.
@N: CL201 :"F:\DG0799_final\Libero_Project\Libero_Project\component\Microsemi\MiV\MIV_RV32\3.0.100\opsrv_merged\miv_rv32_opsrv_merged.v":11381:0:11381:8|Trying to extract state machine for register debug_state.
@N: CL201 :"F:\DG0799_final\Libero_Project\Libero_Project\component\Microsemi\MiV\MIV_RV32\3.0.100\opsrv_merged\miv_rv32_opsrv_merged.v":10991:0:10991:8|Trying to extract state machine for register command_reg_state.
@N: CL159 :"F:\DG0799_final\Libero_Project\Libero_Project\component\Microsemi\MiV\MIV_RV32\3.0.100\opsrv_merged\miv_rv32_opsrv_merged.v":10455:39:10455:52|Input dmi_resp_ready is unused.
@N: CL201 :"F:\DG0799_final\Libero_Project\Libero_Project\component\Microsemi\MiV\MIV_RV32\3.0.100\opsrv_merged\miv_rv32_opsrv_merged.v":11826:0:11826:8|Trying to extract state machine for register sba_state.
@N: CL201 :"F:\DG0799_final\Libero_Project\Libero_Project\component\Microsemi\MiV\MIV_RV32\3.0.100\opsrv_merged\miv_rv32_opsrv_merged.v":12852:12:12852:20|Trying to extract state machine for register gen_shift_register_active_high.gen_shift_register_active_low.dtmcs_dmistat.
@N: CL201 :"F:\DG0799_final\Libero_Project\Libero_Project\component\Microsemi\MiV\MIV_RV32\3.0.100\opsrv_merged\miv_rv32_opsrv_merged.v":12732:12:12732:20|Trying to extract state machine for register gen_current_state_register_active_high.gen_current_state_register_active_low.currTapState.
@N: CL159 :"F:\DG0799_final\Libero_Project\Libero_Project\component\Microsemi\MiV\MIV_RV32\3.0.100\opsrv_merged\miv_rv32_opsrv_merged.v":12661:48:12661:60|Input dtm_req_ready is unused.
@N: CL159 :"F:\DG0799_final\Libero_Project\Libero_Project\component\Microsemi\MiV\MIV_RV32\3.0.100\opsrv_merged\miv_rv32_opsrv_merged.v":208:50:208:72|Input tcm1_cpu_access_disable is unused.
@N: CL159 :"F:\DG0799_final\Libero_Project\Libero_Project\component\Microsemi\MiV\MIV_RV32\3.0.100\opsrv_merged\miv_rv32_opsrv_merged.v":209:50:209:72|Input tcm1_dma_access_disable is unused.
@N: CL159 :"F:\DG0799_final\Libero_Project\Libero_Project\component\Microsemi\MiV\MIV_RV32\3.0.100\opsrv_merged\miv_rv32_opsrv_merged.v":210:50:210:72|Input tcm1_dap_access_disable is unused.
@N: CL159 :"F:\DG0799_final\Libero_Project\Libero_Project\component\Microsemi\MiV\MIV_RV32\3.0.100\opsrv_merged\miv_rv32_opsrv_merged.v":211:50:211:70|Input tcm_dap_apb_slv_paddr is unused.
@N: CL159 :"F:\DG0799_final\Libero_Project\Libero_Project\component\Microsemi\MiV\MIV_RV32\3.0.100\opsrv_merged\miv_rv32_opsrv_merged.v":212:50:212:72|Input tcm_dap_apb_slv_paddr_p is unused.
@N: CL159 :"F:\DG0799_final\Libero_Project\Libero_Project\component\Microsemi\MiV\MIV_RV32\3.0.100\opsrv_merged\miv_rv32_opsrv_merged.v":213:50:213:70|Input tcm_dap_apb_slv_pprot is unused.
@N: CL159 :"F:\DG0799_final\Libero_Project\Libero_Project\component\Microsemi\MiV\MIV_RV32\3.0.100\opsrv_merged\miv_rv32_opsrv_merged.v":214:50:214:69|Input tcm_dap_apb_slv_psel is unused.
@N: CL159 :"F:\DG0799_final\Libero_Project\Libero_Project\component\Microsemi\MiV\MIV_RV32\3.0.100\opsrv_merged\miv_rv32_opsrv_merged.v":215:50:215:72|Input tcm_dap_apb_slv_penable is unused.
@N: CL159 :"F:\DG0799_final\Libero_Project\Libero_Project\component\Microsemi\MiV\MIV_RV32\3.0.100\opsrv_merged\miv_rv32_opsrv_merged.v":216:50:216:71|Input tcm_dap_apb_slv_pwrite is unused.
@N: CL159 :"F:\DG0799_final\Libero_Project\Libero_Project\component\Microsemi\MiV\MIV_RV32\3.0.100\opsrv_merged\miv_rv32_opsrv_merged.v":217:50:217:71|Input tcm_dap_apb_slv_pwdata is unused.
@N: CL159 :"F:\DG0799_final\Libero_Project\Libero_Project\component\Microsemi\MiV\MIV_RV32\3.0.100\opsrv_merged\miv_rv32_opsrv_merged.v":218:50:218:73|Input tcm_dap_apb_slv_pwdata_p is unused.
@N: CL159 :"F:\DG0799_final\Libero_Project\Libero_Project\component\Microsemi\MiV\MIV_RV32\3.0.100\opsrv_merged\miv_rv32_opsrv_merged.v":229:50:229:63|Input tcm1_ram_sb_in is unused.
@N: CL159 :"F:\DG0799_final\Libero_Project\Libero_Project\component\Microsemi\MiV\MIV_RV32\3.0.100\opsrv_merged\miv_rv32_opsrv_merged.v":233:50:233:65|Input axi_mstr_aclk_en is unused.
@N: CL159 :"F:\DG0799_final\Libero_Project\Libero_Project\component\Microsemi\MiV\MIV_RV32\3.0.100\opsrv_merged\miv_rv32_opsrv_merged.v":242:50:242:65|Input axi_mstr_arready is unused.
@N: CL159 :"F:\DG0799_final\Libero_Project\Libero_Project\component\Microsemi\MiV\MIV_RV32\3.0.100\opsrv_merged\miv_rv32_opsrv_merged.v":245:50:245:63|Input axi_mstr_rresp is unused.
@N: CL159 :"F:\DG0799_final\Libero_Project\Libero_Project\component\Microsemi\MiV\MIV_RV32\3.0.100\opsrv_merged\miv_rv32_opsrv_merged.v":246:50:246:63|Input axi_mstr_rdata is unused.
@N: CL159 :"F:\DG0799_final\Libero_Project\Libero_Project\component\Microsemi\MiV\MIV_RV32\3.0.100\opsrv_merged\miv_rv32_opsrv_merged.v":247:50:247:63|Input axi_mstr_rlast is unused.
@N: CL159 :"F:\DG0799_final\Libero_Project\Libero_Project\component\Microsemi\MiV\MIV_RV32\3.0.100\opsrv_merged\miv_rv32_opsrv_merged.v":248:50:248:61|Input axi_mstr_rid is unused.
@N: CL159 :"F:\DG0799_final\Libero_Project\Libero_Project\component\Microsemi\MiV\MIV_RV32\3.0.100\opsrv_merged\miv_rv32_opsrv_merged.v":250:50:250:64|Input axi_mstr_rvalid is unused.
@N: CL159 :"F:\DG0799_final\Libero_Project\Libero_Project\component\Microsemi\MiV\MIV_RV32\3.0.100\opsrv_merged\miv_rv32_opsrv_merged.v":251:50:251:66|Input axi_mstr_r_data_p is unused.
@N: CL159 :"F:\DG0799_final\Libero_Project\Libero_Project\component\Microsemi\MiV\MIV_RV32\3.0.100\opsrv_merged\miv_rv32_opsrv_merged.v":261:50:261:65|Input axi_mstr_awready is unused.
@N: CL159 :"F:\DG0799_final\Libero_Project\Libero_Project\component\Microsemi\MiV\MIV_RV32\3.0.100\opsrv_merged\miv_rv32_opsrv_merged.v":267:50:267:64|Input axi_mstr_wready is unused.
@N: CL159 :"F:\DG0799_final\Libero_Project\Libero_Project\component\Microsemi\MiV\MIV_RV32\3.0.100\opsrv_merged\miv_rv32_opsrv_merged.v":270:50:270:63|Input axi_mstr_bresp is unused.
@N: CL159 :"F:\DG0799_final\Libero_Project\Libero_Project\component\Microsemi\MiV\MIV_RV32\3.0.100\opsrv_merged\miv_rv32_opsrv_merged.v":271:50:271:61|Input axi_mstr_bid is unused.
@N: CL159 :"F:\DG0799_final\Libero_Project\Libero_Project\component\Microsemi\MiV\MIV_RV32\3.0.100\opsrv_merged\miv_rv32_opsrv_merged.v":273:50:273:64|Input axi_mstr_bvalid is unused.
@N: CL159 :"F:\DG0799_final\Libero_Project\Libero_Project\component\Microsemi\MiV\MIV_RV32\3.0.100\opsrv_merged\miv_rv32_opsrv_merged.v":286:50:286:64|Input ahb_mstr_hrdata is unused.
@N: CL159 :"F:\DG0799_final\Libero_Project\Libero_Project\component\Microsemi\MiV\MIV_RV32\3.0.100\opsrv_merged\miv_rv32_opsrv_merged.v":287:50:287:66|Input ahb_mstr_hrdata_p is unused.
@N: CL159 :"F:\DG0799_final\Libero_Project\Libero_Project\component\Microsemi\MiV\MIV_RV32\3.0.100\opsrv_merged\miv_rv32_opsrv_merged.v":288:50:288:64|Input ahb_mstr_hready is unused.
@N: CL159 :"F:\DG0799_final\Libero_Project\Libero_Project\component\Microsemi\MiV\MIV_RV32\3.0.100\opsrv_merged\miv_rv32_opsrv_merged.v":289:50:289:63|Input ahb_mstr_hresp is unused.
@N: CL159 :"F:\DG0799_final\Libero_Project\Libero_Project\component\Microsemi\MiV\MIV_RV32\3.0.100\opsrv_merged\miv_rv32_opsrv_merged.v":7096:49:7096:71|Input cfg_axi_mstr_start_addr is unused.
@N: CL159 :"F:\DG0799_final\Libero_Project\Libero_Project\component\Microsemi\MiV\MIV_RV32\3.0.100\opsrv_merged\miv_rv32_opsrv_merged.v":7097:49:7097:69|Input cfg_axi_mstr_end_addr is unused.
@N: CL159 :"F:\DG0799_final\Libero_Project\Libero_Project\component\Microsemi\MiV\MIV_RV32\3.0.100\opsrv_merged\miv_rv32_opsrv_merged.v":7100:49:7100:71|Input cfg_ahb_mstr_start_addr is unused.
@N: CL159 :"F:\DG0799_final\Libero_Project\Libero_Project\component\Microsemi\MiV\MIV_RV32\3.0.100\opsrv_merged\miv_rv32_opsrv_merged.v":7101:49:7101:69|Input cfg_ahb_mstr_end_addr is unused.
@N: CL159 :"F:\DG0799_final\Libero_Project\Libero_Project\component\Microsemi\MiV\MIV_RV32\3.0.100\opsrv_merged\miv_rv32_opsrv_merged.v":7102:49:7102:72|Input cfg_udma_ctrl_start_addr is unused.
@N: CL159 :"F:\DG0799_final\Libero_Project\Libero_Project\component\Microsemi\MiV\MIV_RV32\3.0.100\opsrv_merged\miv_rv32_opsrv_merged.v":7103:49:7103:70|Input cfg_udma_ctrl_end_addr is unused.
@N: CL159 :"F:\DG0799_final\Libero_Project\Libero_Project\component\Microsemi\MiV\MIV_RV32\3.0.100\opsrv_merged\miv_rv32_opsrv_merged.v":7108:49:7108:67|Input cfg_tcm1_start_addr is unused.
@N: CL159 :"F:\DG0799_final\Libero_Project\Libero_Project\component\Microsemi\MiV\MIV_RV32\3.0.100\opsrv_merged\miv_rv32_opsrv_merged.v":7109:49:7109:65|Input cfg_tcm1_end_addr is unused.
@N: CL159 :"F:\DG0799_final\Libero_Project\Libero_Project\component\Microsemi\MiV\MIV_RV32\3.0.100\opsrv_merged\miv_rv32_opsrv_merged.v":7179:49:7179:68|Input apb_mstr_trx_os_d_rd is unused.
@N: CL159 :"F:\DG0799_final\Libero_Project\Libero_Project\component\Microsemi\MiV\MIV_RV32\3.0.100\opsrv_merged\miv_rv32_opsrv_merged.v":7180:49:7180:68|Input apb_mstr_trx_os_d_wr is unused.
@N: CL159 :"F:\DG0799_final\Libero_Project\Libero_Project\component\Microsemi\MiV\MIV_RV32\3.0.100\opsrv_merged\miv_rv32_opsrv_merged.v":7208:49:7208:64|Input tcm0_trx_os_d_rd is unused.
@N: CL159 :"F:\DG0799_final\Libero_Project\Libero_Project\component\Microsemi\MiV\MIV_RV32\3.0.100\opsrv_merged\miv_rv32_opsrv_merged.v":7209:49:7209:64|Input tcm0_trx_os_d_wr is unused.
@N: CL159 :"F:\DG0799_final\Libero_Project\Libero_Project\component\Microsemi\MiV\MIV_RV32\3.0.100\opsrv_merged\miv_rv32_opsrv_merged.v":7215:49:7215:64|Input tcm1_i_req_ready is unused.
@N: CL159 :"F:\DG0799_final\Libero_Project\Libero_Project\component\Microsemi\MiV\MIV_RV32\3.0.100\opsrv_merged\miv_rv32_opsrv_merged.v":7225:49:7225:64|Input tcm1_d_req_ready is unused.
@N: CL159 :"F:\DG0799_final\Libero_Project\Libero_Project\component\Microsemi\MiV\MIV_RV32\3.0.100\opsrv_merged\miv_rv32_opsrv_merged.v":7239:49:7239:64|Input tcm1_trx_os_d_rd is unused.
@N: CL159 :"F:\DG0799_final\Libero_Project\Libero_Project\component\Microsemi\MiV\MIV_RV32\3.0.100\opsrv_merged\miv_rv32_opsrv_merged.v":7240:49:7240:64|Input tcm1_trx_os_d_wr is unused.
@N: CL159 :"F:\DG0799_final\Libero_Project\Libero_Project\component\Microsemi\MiV\MIV_RV32\3.0.100\opsrv_merged\miv_rv32_opsrv_merged.v":7246:49:7246:68|Input axi_mstr_i_req_ready is unused.
@N: CL159 :"F:\DG0799_final\Libero_Project\Libero_Project\component\Microsemi\MiV\MIV_RV32\3.0.100\opsrv_merged\miv_rv32_opsrv_merged.v":7256:49:7256:68|Input axi_mstr_d_req_ready is unused.
@N: CL159 :"F:\DG0799_final\Libero_Project\Libero_Project\component\Microsemi\MiV\MIV_RV32\3.0.100\opsrv_merged\miv_rv32_opsrv_merged.v":7271:49:7271:68|Input axi_mstr_trx_os_d_rd is unused.
@N: CL159 :"F:\DG0799_final\Libero_Project\Libero_Project\component\Microsemi\MiV\MIV_RV32\3.0.100\opsrv_merged\miv_rv32_opsrv_merged.v":7272:49:7272:68|Input axi_mstr_trx_os_d_wr is unused.
@N: CL159 :"F:\DG0799_final\Libero_Project\Libero_Project\component\Microsemi\MiV\MIV_RV32\3.0.100\opsrv_merged\miv_rv32_opsrv_merged.v":7276:49:7276:68|Input ahb_mstr_i_req_ready is unused.
@N: CL159 :"F:\DG0799_final\Libero_Project\Libero_Project\component\Microsemi\MiV\MIV_RV32\3.0.100\opsrv_merged\miv_rv32_opsrv_merged.v":7286:49:7286:68|Input ahb_mstr_d_req_ready is unused.
@N: CL159 :"F:\DG0799_final\Libero_Project\Libero_Project\component\Microsemi\MiV\MIV_RV32\3.0.100\opsrv_merged\miv_rv32_opsrv_merged.v":7300:49:7300:68|Input ahb_mstr_trx_os_d_rd is unused.
@N: CL134 :"F:\DG0799_final\Libero_Project\Libero_Project\component\Microsemi\MiV\MIV_RV32\3.0.100\core_merged\miv_rv32_core_merged.v":16192:4:16192:9|Found RAM gen_buff_loop[0].buff_entry_data_resp, depth=3, width=16
@N: CL134 :"F:\DG0799_final\Libero_Project\Libero_Project\component\Microsemi\MiV\MIV_RV32\3.0.100\core_merged\miv_rv32_core_merged.v":16192:4:16192:9|Found RAM gen_buff_loop[0].buff_entry_data_resp, depth=3, width=32
@N: CL134 :"F:\DG0799_final\Libero_Project\Libero_Project\component\Microsemi\MiV\MIV_RV32\3.0.100\core_merged\miv_rv32_core_merged.v":16192:4:16192:9|Found RAM gen_buff_loop[0].buff_entry_error_resp, depth=3, width=2
@N: CL134 :"F:\DG0799_final\Libero_Project\Libero_Project\component\Microsemi\MiV\MIV_RV32\3.0.100\core_merged\miv_rv32_core_merged.v":16192:4:16192:9|Found RAM gen_buff_loop[0].buff_entry_error_resp, depth=3, width=2
@N: CL201 :"F:\DG0799_final\Libero_Project\Libero_Project\component\work\CoreUARTapb_0\CoreUARTapb_0_0\rtl\vlog\core_obfuscated\Rx_async.v":871:0:871:5|Trying to extract state machine for register CUARTll0.
@N: CL201 :"F:\DG0799_final\Libero_Project\Libero_Project\component\work\CoreUARTapb_0\CoreUARTapb_0_0\rtl\vlog\core_obfuscated\Tx_async.v":301:0:301:5|Trying to extract state machine for register CUARTlI0l.
@N: CL135 :"F:\DG0799_final\Libero_Project\Libero_Project\component\work\CORETSE_0\CORETSE_0_0\rtl\vlog\obfuscated\petcr.v":377:0:377:5|Found sequential shift CORETSEo0OI with address depth of 3 words and data bit width of 1.
@N: CL201 :"F:\DG0799_final\Libero_Project\Libero_Project\component\work\CORETSE_0\CORETSE_0_0\rtl\vlog\obfuscated\msgmii_peanx_top.v":3461:0:3461:5|Trying to extract state machine for register CORETSEilIlI.
@N: CL201 :"F:\DG0799_final\Libero_Project\Libero_Project\component\work\CORETSE_0\CORETSE_0_0\rtl\vlog\obfuscated\perex_pcs.v":4925:0:4925:5|Trying to extract state machine for register CORETSEIo10.
@N: CL201 :"F:\DG0799_final\Libero_Project\Libero_Project\component\work\CORETSE_0\CORETSE_0_0\rtl\vlog\obfuscated\pemgt.v":588:0:588:5|Trying to extract state machine for register CORETSEo0o1.
@N: CL201 :"F:\DG0799_final\Libero_Project\Libero_Project\component\work\CORETSE_0\CORETSE_0_0\rtl\vlog\obfuscated\perfn_top.v":5295:0:5295:5|Trying to extract state machine for register CORETSEoo.
@N: CL135 :"F:\DG0799_final\Libero_Project\Libero_Project\component\work\CORETSE_0\CORETSE_0_0\rtl\vlog\obfuscated\petfn_top.v":6630:0:6630:5|Found sequential shift CORETSEoIll with address depth of 3 words and data bit width of 8.
@N: CL135 :"F:\DG0799_final\Libero_Project\Libero_Project\component\work\CORETSE_0\CORETSE_0_0\rtl\vlog\obfuscated\petfn_top.v":7633:0:7633:5|Found sequential shift CORETSEilll with address depth of 4 words and data bit width of 1.
@N: CL135 :"F:\DG0799_final\Libero_Project\Libero_Project\component\work\CORETSE_0\CORETSE_0_0\rtl\vlog\obfuscated\petfn_top.v":7496:0:7496:5|Found sequential shift CORETSEllll with address depth of 4 words and data bit width of 1.
@N: CL135 :"F:\DG0799_final\Libero_Project\Libero_Project\component\work\CORETSE_0\CORETSE_0_0\rtl\vlog\obfuscated\petfn_top.v":7755:0:7755:5|Found sequential shift CORETSEI0ll with address depth of 4 words and data bit width of 1.
@N: CL135 :"F:\DG0799_final\Libero_Project\Libero_Project\component\work\CORETSE_0\CORETSE_0_0\rtl\vlog\obfuscated\petfn_top.v":2998:0:2998:5|Found sequential shift CORETSEOoiI with address depth of 3 words and data bit width of 1.
@N: CL135 :"F:\DG0799_final\Libero_Project\Libero_Project\component\work\CORETSE_0\CORETSE_0_0\rtl\vlog\obfuscated\petfn_top.v":3171:0:3171:5|Found sequential shift CORETSEoOOl with address depth of 3 words and data bit width of 4.
@N: CL135 :"F:\DG0799_final\Libero_Project\Libero_Project\component\work\CORETSE_0\CORETSE_0_0\rtl\vlog\obfuscated\petfn_top.v":8862:0:8862:5|Found sequential shift CORETSEoIII with address depth of 4 words and data bit width of 1.
@N: CL135 :"F:\DG0799_final\Libero_Project\Libero_Project\component\work\CORETSE_0\CORETSE_0_0\rtl\vlog\obfuscated\petfn_top.v":8161:0:8161:5|Found sequential shift CORETSEIIII with address depth of 4 words and data bit width of 1.
@N: CL201 :"F:\DG0799_final\Libero_Project\Libero_Project\component\work\CORETSE_0\CORETSE_0_0\rtl\vlog\obfuscated\petfn_top.v":10871:0:10871:5|Trying to extract state machine for register CORETSEoIoI.
@N: CL201 :"F:\DG0799_final\Libero_Project\Libero_Project\component\work\CORETSE_0\CORETSE_0_0\rtl\vlog\obfuscated\amcxtfif_wtm.v":309:0:309:5|Trying to extract state machine for register CORETSEOloOI.
@N: CL135 :"F:\DG0799_final\Libero_Project\Libero_Project\component\work\CORETSE_0\CORETSE_0_0\rtl\vlog\obfuscated\amcxrfif_fab.v":1591:0:1591:5|Found sequential shift CORETSElOoi with address depth of 3 words and data bit width of 1.
@N: CL201 :"F:\DG0799_final\Libero_Project\Libero_Project\component\work\CORETSE_0\CORETSE_0_0\rtl\vlog\obfuscated\amcxrfif_fab.v":1094:0:1094:5|Trying to extract state machine for register genblk1.CORETSEooIOI.
@N: CL201 :"F:\DG0799_final\Libero_Project\Libero_Project\component\work\CORETSE_0\CORETSE_0_0\rtl\vlog\obfuscated\amcxtfif_sys.v":896:0:896:5|Trying to extract state machine for register CORETSEOI1OI.
@N: CL201 :"F:\DG0799_final\Libero_Project\Libero_Project\component\Actel\DirectCore\CORESPI\5.2.104\rtl\vlog\core\spi_chanctrl.v":416:0:416:5|Trying to extract state machine for register mtx_state.
@N: CL134 :"F:\DG0799_final\Libero_Project\Libero_Project\component\Actel\DirectCore\CORESPI\5.2.104\rtl\vlog\core\spi_fifo.v":101:0:101:5|Found RAM fifo_mem_q, depth=32, width=1
@N: CL134 :"F:\DG0799_final\Libero_Project\Libero_Project\component\Actel\DirectCore\CORESPI\5.2.104\rtl\vlog\core\spi_fifo.v":101:0:101:5|Found RAM fifo_mem_q, depth=32, width=16
@N: CL135 :"F:\DG0799_final\Libero_Project\Libero_Project\component\work\Core_reset_pf\Core_reset_pf_0\core\corereset_pf.v":58:0:58:5|Found sequential shift dff with address depth of 16 words and data bit width of 1.
@N|Running in 64-bit mode

