@N: MF916 |Option synthesis_strategy=base is enabled. 
@N: MF248 |Running in 64-bit mode.
@N: MF667 |Clock conversion disabled. (Command "set_option -fix_gated_and_generated_clocks 0" in the project file.)
@N: MO111 :"c:\pf_task_jan_2021\test\dg0762\dg0762_corefir\libero_project\component\work\pf_corefft\pf_corefft_0\rtl\in_place\vlog\core\corefft_top.v":86:39:86:49|Tristate driver OVFLOW_FLAG (in view: COREFFT_LIB.PF_COREFFT_PF_COREFFT_0_COREFFT_Z1_layer0(verilog)) on net OVFLOW_FLAG (in view: COREFFT_LIB.PF_COREFFT_PF_COREFFT_0_COREFFT_Z1_layer0(verilog)) has its enable tied to GND.
@N: MO111 :"c:\pf_task_jan_2021\test\dg0762\dg0762_corefir\libero_project\component\work\pf_corefft\pf_corefft_0\rtl\in_place\vlog\core\corefft_top.v":86:34:86:36|Tristate driver RFS (in view: COREFFT_LIB.PF_COREFFT_PF_COREFFT_0_COREFFT_Z1_layer0(verilog)) on net RFS (in view: COREFFT_LIB.PF_COREFFT_PF_COREFFT_0_COREFFT_Z1_layer0(verilog)) has its enable tied to GND.
@N: MO231 :"c:\pf_task_jan_2021\test\dg0762\dg0762_corefir\libero_project\component\work\pf_coreuart_0\pf_coreuart_0_0\rtl\vlog\core\clock_gen.v":101:6:101:11|Found counter in view:work.PF_COREUART_0_PF_COREUART_0_0_Clock_gen_1s_0s(verilog) instance genblk1\.baud_cntr[12:0] 
@N: BN362 :"c:\pf_task_jan_2021\test\dg0762\dg0762_corefir\libero_project\component\work\pf_coreuart_0\pf_coreuart_0_0\rtl\vlog\core\tx_async.v":339:0:339:5|Removing sequential instance tx_parity (in view: work.PF_COREUART_0_PF_COREUART_0_0_Tx_async_0s_0s_0s_1s_2s_3s_4s_5s_6s(verilog)) because it does not drive other instances.
@N: MO225 :"c:\pf_task_jan_2021\test\dg0762\dg0762_corefir\libero_project\component\work\pf_coreuart_0\pf_coreuart_0_0\rtl\vlog\core\rx_async.v":286:0:286:5|There are no possible illegal states for state machine rx_state[3:0] (in view: work.PF_COREUART_0_PF_COREUART_0_0_Rx_async_0s_0s_0s_1s_2s_3s(verilog)); safe FSM implementation is not required.
@N: MO231 :"c:\pf_task_jan_2021\test\dg0762\dg0762_corefir\libero_project\hdl\filter_control_fsm.v":98:0:98:5|Found counter in view:work.FILTERCONTROL_FSM(verilog) instance COEF_RADDR[6:0] 
@N: MO231 :"c:\pf_task_jan_2021\test\dg0762\dg0762_corefir\libero_project\hdl\filter_control_fsm.v":98:0:98:5|Found counter in view:work.FILTERCONTROL_FSM(verilog) instance FFT_WADDR[7:0] 
@N: MO231 :"c:\pf_task_jan_2021\test\dg0762\dg0762_corefir\libero_project\hdl\filter_control_fsm.v":98:0:98:5|Found counter in view:work.FILTERCONTROL_FSM(verilog) instance FIR_WR_ADDR[9:0] 
@N: FX493 |Applying initial value "0" on instance fsm_i[0].
@N: MO231 :"c:\pf_task_jan_2021\test\dg0762\dg0762_corefir\libero_project\component\actel\directcore\corefft\7.1.100\rtl\in_place\vlog\core\kit.v":111:2:111:7|Found counter in view:COREFFT_LIB.fft_inpl_sm_top_256s_128s_8_3_10s_1s(verilog) instance wTimer_0.Q[6:0] 
@N: BN362 :"c:\pf_task_jan_2021\test\dg0762\dg0762_corefir\libero_project\component\actel\directcore\corefft\7.1.100\rtl\in_place\vlog\core\kit.v":244:6:244:11|Removing sequential instance rStage_dly2.genblk1\.delayLine\[1\][3] (in view: COREFFT_LIB.fft_inpl_sm_top_256s_128s_8_3_10s_1s(verilog)) of type view:PrimLib.dffr(prim) because it does not drive other instances.
@N: BN362 :"c:\pf_task_jan_2021\test\dg0762\dg0762_corefir\libero_project\component\actel\directcore\corefft\7.1.100\rtl\in_place\vlog\core\kit.v":244:6:244:11|Removing sequential instance rStage_dly2.genblk1\.delayLine\[1\][4] (in view: COREFFT_LIB.fft_inpl_sm_top_256s_128s_8_3_10s_1s(verilog)) of type view:PrimLib.dffr(prim) because it does not drive other instances.
@N: BN362 :"c:\pf_task_jan_2021\test\dg0762\dg0762_corefir\libero_project\component\actel\directcore\corefft\7.1.100\rtl\in_place\vlog\core\kit.v":244:6:244:11|Removing sequential instance rTimer_dly2.genblk1\.delayLine\[1\][7] (in view: COREFFT_LIB.fft_inpl_sm_top_256s_128s_8_3_10s_1s(verilog)) of type view:PrimLib.dffr(prim) because it does not drive other instances.
@N: BN362 :"c:\pf_task_jan_2021\test\dg0762\dg0762_corefir\libero_project\component\actel\directcore\corefft\7.1.100\rtl\in_place\vlog\core\kit.v":244:6:244:11|Removing sequential instance rTimer_dly2.genblk1\.delayLine\[1\][8] (in view: COREFFT_LIB.fft_inpl_sm_top_256s_128s_8_3_10s_1s(verilog)) of type view:PrimLib.dffr(prim) because it does not drive other instances.
@N: BN362 :"c:\pf_task_jan_2021\test\dg0762\dg0762_corefir\libero_project\component\actel\directcore\corefft\7.1.100\rtl\in_place\vlog\core\kit.v":244:6:244:11|Removing sequential instance rTimer_dly2.genblk1\.delayLine\[1\][9] (in view: COREFFT_LIB.fft_inpl_sm_top_256s_128s_8_3_10s_1s(verilog)) of type view:PrimLib.dffr(prim) because it does not drive other instances.
@N: BN362 :"c:\pf_task_jan_2021\test\dg0762\dg0762_corefir\libero_project\component\actel\directcore\corefft\7.1.100\rtl\in_place\vlog\core\kit.v":244:6:244:11|Removing sequential instance rStage_dly2.genblk1\.delayLine\[0\][3] (in view: COREFFT_LIB.fft_inpl_sm_top_256s_128s_8_3_10s_1s(verilog)) of type view:PrimLib.dffr(prim) because it does not drive other instances.
@N: BN362 :"c:\pf_task_jan_2021\test\dg0762\dg0762_corefir\libero_project\component\actel\directcore\corefft\7.1.100\rtl\in_place\vlog\core\kit.v":244:6:244:11|Removing sequential instance rStage_dly2.genblk1\.delayLine\[0\][4] (in view: COREFFT_LIB.fft_inpl_sm_top_256s_128s_8_3_10s_1s(verilog)) of type view:PrimLib.dffr(prim) because it does not drive other instances.
@N: BN362 :"c:\pf_task_jan_2021\test\dg0762\dg0762_corefir\libero_project\component\actel\directcore\corefft\7.1.100\rtl\in_place\vlog\core\kit.v":244:6:244:11|Removing sequential instance rTimer_dly2.genblk1\.delayLine\[0\][7] (in view: COREFFT_LIB.fft_inpl_sm_top_256s_128s_8_3_10s_1s(verilog)) of type view:PrimLib.dffr(prim) because it does not drive other instances.
@N: BN362 :"c:\pf_task_jan_2021\test\dg0762\dg0762_corefir\libero_project\component\actel\directcore\corefft\7.1.100\rtl\in_place\vlog\core\kit.v":244:6:244:11|Removing sequential instance rTimer_dly2.genblk1\.delayLine\[0\][8] (in view: COREFFT_LIB.fft_inpl_sm_top_256s_128s_8_3_10s_1s(verilog)) of type view:PrimLib.dffr(prim) because it does not drive other instances.
@N: BN362 :"c:\pf_task_jan_2021\test\dg0762\dg0762_corefir\libero_project\component\actel\directcore\corefft\7.1.100\rtl\in_place\vlog\core\kit.v":244:6:244:11|Removing sequential instance rTimer_dly2.genblk1\.delayLine\[0\][9] (in view: COREFFT_LIB.fft_inpl_sm_top_256s_128s_8_3_10s_1s(verilog)) of type view:PrimLib.dffr(prim) because it does not drive other instances.
@N: MO231 :"c:\pf_task_jan_2021\test\dg0762\dg0762_corefir\libero_project\component\actel\directcore\corefft\7.1.100\rtl\in_place\vlog\core\kit.v":139:2:139:7|Found counter in view:COREFFT_LIB.fft_inpl_counter_w_10_137s(verilog) instance Q[9:0] 
@N: MO231 :"c:\pf_task_jan_2021\test\dg0762\dg0762_corefir\libero_project\component\actel\directcore\corefft\7.1.100\rtl\in_place\vlog\core\kit.v":79:2:79:7|Found counter in view:COREFFT_LIB.fft_inpl_counter_5_7(verilog) instance Q[4:0] 
@N: MO231 :"c:\pf_task_jan_2021\test\dg0762\dg0762_corefir\libero_project\component\actel\directcore\corefft\7.1.100\rtl\in_place\vlog\core\kit.v":79:2:79:7|Found counter in view:COREFFT_LIB.fft_inpl_counter_8_255s(verilog) instance Q[7:0] 
@N: MO231 :"c:\pf_task_jan_2021\test\dg0762\dg0762_corefir\libero_project\component\actel\directcore\corefft\7.1.100\rtl\in_place\vlog\core\kit.v":168:2:168:7|Found counter in view:COREFFT_LIB.fft_inpl_twid_wA_gen_8_3(verilog) instance slowTimer.Q[6:0] 
@N: MO231 :"c:\pf_task_jan_2021\test\dg0762\dg0762_corefir\libero_project\hdl\uart_if.v":186:0:186:5|Found counter in view:work.UART_IF(verilog) instance R_ADDR[10:0] 
@N: MO231 :"c:\pf_task_jan_2021\test\dg0762\dg0762_corefir\libero_project\hdl\uart_if.v":186:0:186:5|Found counter in view:work.UART_IF(verilog) instance COEF_WADDR[7:0] 
@N: MO231 :"c:\pf_task_jan_2021\test\dg0762\dg0762_corefir\libero_project\hdl\uart_if.v":186:0:186:5|Found counter in view:work.UART_IF(verilog) instance DATA_WADDR[10:0] 
@N: FX493 |Applying initial value "0" on instance rfsm_i[0].
@N: MF135 :"c:\pf_task_jan_2021\test\dg0762\dg0762_corefir\libero_project\component\actel\directcore\corefir_pf\2.3.100\rtl\vhdl\core\enum_kit.vhd":116:4:116:5|RAM enum_pad_g5_0.data_pipe_0.delayLine_seqshift[15:0] (in view: corefir_pf_lib.enum_fir_adv_g5_work_pf_corefir_rtl_0layer1(rtl)) is 8 words by 16 bits.
@N: MF135 :"c:\pf_task_jan_2021\test\dg0762\dg0762_corefir\libero_project\component\actel\directcore\corefir_pf\2.3.100\rtl\vhdl\core\enum_kit.vhd":116:4:116:5|RAM enum_pad_g5_0.reload_coef_pad\.symm_data_pipe_0.delayLine_seqshift[15:0] (in view: corefir_pf_lib.enum_fir_adv_g5_work_pf_corefir_rtl_0layer1(rtl)) is 8 words by 16 bits.
@N: MO231 :"c:\pf_task_jan_2021\test\dg0762\dg0762_corefir\libero_project\component\actel\directcore\corefir_pf\2.3.100\rtl\vhdl\core\enum_kit.vhd":314:4:314:5|Found counter in view:corefir_pf_lib.enum_kitCountS_7_122_1(rtl) instance count[6:0] 
@N: BN362 :"c:\pf_task_jan_2021\test\dg0762\dg0762_corefir\libero_project\component\actel\directcore\corefft\7.1.100\rtl\in_place\vlog\core\fftsm.v":439:2:439:7|Removing sequential instance sm_0.rdFFTtimer_0.rStage_r[3] (in view: COREFFT_LIB.PF_COREFFT_PF_COREFFT_0_COREFFT_INPLC_Z2_layer0(verilog)) because it does not drive other instances.
@N: BN362 :"c:\pf_task_jan_2021\test\dg0762\dg0762_corefir\libero_project\component\actel\directcore\corefft\7.1.100\rtl\in_place\vlog\core\fftsm.v":439:2:439:7|Removing sequential instance sm_0.rdFFTtimer_0.rStage_r[4] (in view: COREFFT_LIB.PF_COREFFT_PF_COREFFT_0_COREFFT_INPLC_Z2_layer0(verilog)) because it does not drive other instances.
@N: BN362 :"c:\pf_task_jan_2021\test\dg0762\dg0762_corefir\libero_project\component\work\pf_coreuart_0\pf_coreuart_0_0\rtl\vlog\core\rx_async.v":377:0:377:5|Removing sequential instance PF_COREUART_0_0.PF_COREUART_0_0.make_RX.rx_shift[8] (in view: work.top(verilog)) because it does not drive other instances.
@N: MO106 :"c:\pf_task_jan_2021\test\dg0762\dg0762_corefir\libero_project\component\work\pf_corefft\pf_corefft_0\twiddle32.v":35:4:35:7|Found ROM PF_DSP_FLOW_DEMO_TOP_0.PF_COREFFT_0.PF_COREFFT_0.genblk1\.DUT_INPLACE.lut_0.T_1_00_0[31:0] (in view: work.top(verilog)) with 64 words by 32 bits.
@N: MO106 :"c:\pf_task_jan_2021\test\dg0762\dg0762_corefir\libero_project\component\work\pf_corefft\pf_corefft_0\twiddle32.v":35:4:35:7|Found ROM PF_DSP_FLOW_DEMO_TOP_0.PF_COREFFT_0.PF_COREFFT_0.genblk1\.DUT_INPLACE.lut_0.T_1_00[31:0] (in view: work.top(verilog)) with 64 words by 32 bits.
@N: BN362 :"c:\pf_task_jan_2021\test\dg0762\dg0762_corefir\libero_project\component\work\pf_corefft\pf_corefft_0\twiddle32.v":35:4:35:7|Removing sequential instance G_294 (in view: work.top(verilog)) because it does not drive other instances.
@N: BN362 :"c:\pf_task_jan_2021\test\dg0762\dg0762_corefir\libero_project\component\work\pf_corefft\pf_corefft_0\twiddle32.v":35:4:35:7|Removing sequential instance PF_DSP_FLOW_DEMO_TOP_0.PF_COREFFT_0.PF_COREFFT_0.genblk1\.DUT_INPLACE.lut_0.T_1_00_dreg[31:0] (in view: work.top(verilog)) of type view:PrimLib.dff(prim) because it does not drive other instances.
@N: BN362 :"c:\pf_task_jan_2021\test\dg0762\dg0762_corefir\libero_project\component\work\pf_corefft\pf_corefft_0\twiddle32.v":35:4:35:7|Removing sequential instance PF_DSP_FLOW_DEMO_TOP_0.PF_COREFFT_0.PF_COREFFT_0.genblk1\.DUT_INPLACE.lut_0.T_1_00_0_dreg[31:0] (in view: work.top(verilog)) of type view:PrimLib.dff(prim) because it does not drive other instances.
@N: FP130 |Promoting Net dff_arst on CLKINT  I_476 
@N: FP130 |Promoting Net PF_DSP_FLOW_DEMO_TOP_0.PF_COREFFT_0.PF_COREFFT_0.genblk1\.DUT_INPLACE.slowClock_0.divider_i_0[2] on CLKINT  I_477 
@N: BW103 |The default time unit for the Synopsys Constraint File (SDC or FDC) is 1ns.
@N: BW107 |Synopsys Constraint File capacitance units using default value of 1pF 
@N: MT615 |Found clock REF_CLK_0 with period 20.00ns 
@N: MT615 |Found clock PF_ccc_0_0/PF_ccc_0_0/pll_inst_0/OUT0 with period 5.00ns 
@N: MT320 |This timing report is an estimate of place and route data. For final timing results, use the FPGA vendor place and route report.
@N: MT322 |Clock constraints include only register-to-register paths associated with each individual clock.
