@N: MF916 |Option synthesis_strategy=base is enabled. 
@N: MF248 |Running in 64-bit mode.
@N: MF667 |Clock conversion disabled. (Command "set_option -fix_gated_and_generated_clocks 0" in the project file.)
@N: FX1171 :"c:\pf_task_jan_2021\test\dg0762\dg0762_fir_rtl\libero_project\hdl\filter_control_fsm.v":98:0:98:5|Found instance PF_DSP_FLOW_DEMO_TOP_0.FILTERCONTROL_FSM_0.FFT_I_VALID with reset/set having higher priority than enable. Selected technology supports register with enable having higher priority than reset/set. Adding glue logic to resolve priority. 
@N: FX1171 :"c:\pf_task_jan_2021\test\dg0762\dg0762_fir_rtl\libero_project\hdl\filter_control_fsm.v":98:0:98:5|Found instance PF_DSP_FLOW_DEMO_TOP_0.FILTERCONTROL_FSM_0.COEF_RD_ENABLE with reset/set having higher priority than enable. Selected technology supports register with enable having higher priority than reset/set. Adding glue logic to resolve priority. 
@N: FX1171 :"c:\pf_task_jan_2021\test\dg0762\dg0762_fir_rtl\libero_project\hdl\filter_control_fsm.v":98:0:98:5|Found instance PF_DSP_FLOW_DEMO_TOP_0.FILTERCONTROL_FSM_0.FILTER_COMPLETE with reset/set having higher priority than enable. Selected technology supports register with enable having higher priority than reset/set. Adding glue logic to resolve priority. 
@N: FX1171 :"c:\pf_task_jan_2021\test\dg0762\dg0762_fir_rtl\libero_project\hdl\filter_control_fsm.v":98:0:98:5|Found instance PF_DSP_FLOW_DEMO_TOP_0.FILTERCONTROL_FSM_0.COEF_ON with reset/set having higher priority than enable. Selected technology supports register with enable having higher priority than reset/set. Adding glue logic to resolve priority. 
@N: FX1171 :"c:\pf_task_jan_2021\test\dg0762\dg0762_fir_rtl\libero_project\hdl\filter_control_fsm.v":98:0:98:5|Found instance PF_DSP_FLOW_DEMO_TOP_0.FILTERCONTROL_FSM_0.FIR_WR_ENABLE with reset/set having higher priority than enable. Selected technology supports register with enable having higher priority than reset/set. Adding glue logic to resolve priority. 
@N: FX1171 :"c:\pf_task_jan_2021\test\dg0762\dg0762_fir_rtl\libero_project\component\actel\directcore\corefft\7.1.100\rtl\in_place\vlog\core\kit.v":599:2:599:7|Found instance PF_DSP_FLOW_DEMO_TOP_0.PF_COREFFT_0.PF_COREFFT_0.genblk1.DUT_INPLACE.autoScale_0.bflyMonitor with reset/set having higher priority than enable. Selected technology supports register with enable having higher priority than reset/set. Adding glue logic to resolve priority. 
@N: FX1171 :"c:\pf_task_jan_2021\test\dg0762\dg0762_fir_rtl\libero_project\component\actel\directcore\corefft\7.1.100\rtl\in_place\vlog\core\kit.v":599:2:599:7|Found instance PF_DSP_FLOW_DEMO_TOP_0.PF_COREFFT_0.PF_COREFFT_0.genblk1.DUT_INPLACE.autoScale_0.ldMonitor with reset/set having higher priority than enable. Selected technology supports register with enable having higher priority than reset/set. Adding glue logic to resolve priority. 
@N: FX1171 :"c:\pf_task_jan_2021\test\dg0762\dg0762_fir_rtl\libero_project\hdl\uart_if.v":186:0:186:5|Found instance PF_DSP_FLOW_DEMO_TOP_0.UART_IF_0.rx_en with reset/set having higher priority than enable. Selected technology supports register with enable having higher priority than reset/set. Adding glue logic to resolve priority. 
@N: FX1171 :"c:\pf_task_jan_2021\test\dg0762\dg0762_fir_rtl\libero_project\hdl\uart_if.v":186:0:186:5|Found instance PF_DSP_FLOW_DEMO_TOP_0.UART_IF_0.RAM_REN with reset/set having higher priority than enable. Selected technology supports register with enable having higher priority than reset/set. Adding glue logic to resolve priority. 
@N: FX1171 :"c:\pf_task_jan_2021\test\dg0762\dg0762_fir_rtl\libero_project\hdl\uart_if.v":186:0:186:5|Found instance PF_DSP_FLOW_DEMO_TOP_0.UART_IF_0.WDATA[15:0] with reset/set having higher priority than enable. Selected technology supports register with enable having higher priority than reset/set. Adding glue logic to resolve priority. 
@N: FX1171 :"c:\pf_task_jan_2021\test\dg0762\dg0762_fir_rtl\libero_project\hdl\uart_if.v":186:0:186:5|Found instance PF_DSP_FLOW_DEMO_TOP_0.UART_IF_0.OEN with reset/set having higher priority than enable. Selected technology supports register with enable having higher priority than reset/set. Adding glue logic to resolve priority. 
@N: FX1171 :"c:\pf_task_jan_2021\test\dg0762\dg0762_fir_rtl\libero_project\hdl\uart_if.v":186:0:186:5|Found instance PF_DSP_FLOW_DEMO_TOP_0.UART_IF_0.SEL with reset/set having higher priority than enable. Selected technology supports register with enable having higher priority than reset/set. Adding glue logic to resolve priority. 
@N: FX1171 :"c:\pf_task_jan_2021\test\dg0762\dg0762_fir_rtl\libero_project\hdl\uart_if.v":186:0:186:5|Found instance PF_DSP_FLOW_DEMO_TOP_0.UART_IF_0.WEN with reset/set having higher priority than enable. Selected technology supports register with enable having higher priority than reset/set. Adding glue logic to resolve priority. 
@N: FX1171 :"c:\pf_task_jan_2021\test\dg0762\dg0762_fir_rtl\libero_project\hdl\uart_if.v":186:0:186:5|Found instance PF_DSP_FLOW_DEMO_TOP_0.UART_IF_0.COEF_WEN with reset/set having higher priority than enable. Selected technology supports register with enable having higher priority than reset/set. Adding glue logic to resolve priority. 
@N: MO111 :"c:\pf_task_jan_2021\test\dg0762\dg0762_fir_rtl\libero_project\component\work\pf_corefft\pf_corefft_0\rtl\in_place\vlog\core\corefft_top.v":86:39:86:49|Tristate driver OVFLOW_FLAG (in view: COREFFT_LIB.PF_COREFFT_PF_COREFFT_0_COREFFT_Z1(verilog)) on net OVFLOW_FLAG (in view: COREFFT_LIB.PF_COREFFT_PF_COREFFT_0_COREFFT_Z1(verilog)) has its enable tied to GND.
@N: MO111 :"c:\pf_task_jan_2021\test\dg0762\dg0762_fir_rtl\libero_project\component\work\pf_corefft\pf_corefft_0\rtl\in_place\vlog\core\corefft_top.v":86:34:86:36|Tristate driver RFS (in view: COREFFT_LIB.PF_COREFFT_PF_COREFFT_0_COREFFT_Z1(verilog)) on net RFS (in view: COREFFT_LIB.PF_COREFFT_PF_COREFFT_0_COREFFT_Z1(verilog)) has its enable tied to GND.
@N: BN115 :"c:\pf_task_jan_2021\test\dg0762\dg0762_fir_rtl\libero_project\component\actel\directcore\corefft\7.1.100\rtl\in_place\vlog\core\mac_lib.v":130:71:130:79|Removing instance signExt_a (in view: COREFFT_LIB.fft_inpl_mac18x18mx_16s_16s_0s_0s_0s_26s_0_0_0_48s_1(verilog)) of type view:COREFFT_LIB.fft_inpl_signExt_16s_18s_0s_1_1(verilog) because it does not drive other instances.
@N: BN115 :"c:\pf_task_jan_2021\test\dg0762\dg0762_fir_rtl\libero_project\component\actel\directcore\corefft\7.1.100\rtl\in_place\vlog\core\mac_lib.v":132:71:132:79|Removing instance signExt_b (in view: COREFFT_LIB.fft_inpl_mac18x18mx_16s_16s_0s_0s_0s_26s_0_0_0_48s_1(verilog)) of type view:COREFFT_LIB.fft_inpl_signExt_16s_18s_0s_1_0(verilog) because it does not drive other instances.
@N: BN115 :"c:\pf_task_jan_2021\test\dg0762\dg0762_fir_rtl\libero_project\component\actel\directcore\corefft\7.1.100\rtl\in_place\vlog\core\mac_lib.v":130:71:130:79|Removing instance signExt_a (in view: COREFFT_LIB.fft_inpl_mac18x18mx_16s_16s_0s_0s_0s_26s_0_0_0_48s_0(verilog)) of type view:COREFFT_LIB.fft_inpl_signExt_16s_18s_0s_1_3(verilog) because it does not drive other instances.
@N: BN115 :"c:\pf_task_jan_2021\test\dg0762\dg0762_fir_rtl\libero_project\component\actel\directcore\corefft\7.1.100\rtl\in_place\vlog\core\mac_lib.v":132:71:132:79|Removing instance signExt_b (in view: COREFFT_LIB.fft_inpl_mac18x18mx_16s_16s_0s_0s_0s_26s_0_0_0_48s_0(verilog)) of type view:COREFFT_LIB.fft_inpl_signExt_16s_18s_0s_1_2(verilog) because it does not drive other instances.
@N: BN115 :"c:\pf_task_jan_2021\test\dg0762\dg0762_fir_rtl\libero_project\component\actel\directcore\corefft\7.1.100\rtl\in_place\vlog\core\cmplx.v":407:78:407:86|Removing instance signExt_p (in view: COREFFT_LIB.fft_inpl_half_cmplx_18_16s_1s_0s_26s_48s_1_0s(verilog)) of type view:COREFFT_LIB.fft_inpl_signExt_48s_33s_0s_0(verilog) because it does not drive other instances.
@N: BN115 :"c:\pf_task_jan_2021\test\dg0762\dg0762_fir_rtl\libero_project\component\actel\directcore\corefft\7.1.100\rtl\in_place\vlog\core\mac_lib.v":130:71:130:79|Removing instance signExt_a (in view: COREFFT_LIB.fft_inpl_mac18x18mx_16s_16s_0s_0s_0s_26s_0_0_0_48s_3(verilog)) of type view:COREFFT_LIB.fft_inpl_signExt_16s_18s_0s_1_4(verilog) because it does not drive other instances.
@N: BN115 :"c:\pf_task_jan_2021\test\dg0762\dg0762_fir_rtl\libero_project\component\actel\directcore\corefft\7.1.100\rtl\in_place\vlog\core\mac_lib.v":132:71:132:79|Removing instance signExt_b (in view: COREFFT_LIB.fft_inpl_mac18x18mx_16s_16s_0s_0s_0s_26s_0_0_0_48s_3(verilog)) of type view:COREFFT_LIB.fft_inpl_signExt_16s_18s_0s_0(verilog) because it does not drive other instances.
@N: BN115 :"c:\pf_task_jan_2021\test\dg0762\dg0762_fir_rtl\libero_project\component\actel\directcore\corefft\7.1.100\rtl\in_place\vlog\core\mac_lib.v":130:71:130:79|Removing instance signExt_a (in view: COREFFT_LIB.fft_inpl_mac18x18mx_16s_16s_0s_0s_0s_26s_0_0_0_48s_2(verilog)) of type view:COREFFT_LIB.fft_inpl_signExt_16s_18s_0s_1_6(verilog) because it does not drive other instances.
@N: BN115 :"c:\pf_task_jan_2021\test\dg0762\dg0762_fir_rtl\libero_project\component\actel\directcore\corefft\7.1.100\rtl\in_place\vlog\core\mac_lib.v":132:71:132:79|Removing instance signExt_b (in view: COREFFT_LIB.fft_inpl_mac18x18mx_16s_16s_0s_0s_0s_26s_0_0_0_48s_2(verilog)) of type view:COREFFT_LIB.fft_inpl_signExt_16s_18s_0s_1_5(verilog) because it does not drive other instances.
@N: BN115 :"c:\pf_task_jan_2021\test\dg0762\dg0762_fir_rtl\libero_project\component\actel\directcore\corefft\7.1.100\rtl\in_place\vlog\core\cmplx.v":407:78:407:86|Removing instance signExt_p (in view: COREFFT_LIB.fft_inpl_half_cmplx_18_16s_0s_0s_26s_48s_0_0s(verilog)) of type view:COREFFT_LIB.fft_inpl_signExt_48s_33s_0s_1(verilog) because it does not drive other instances.
@N: BN362 :"c:\pf_task_jan_2021\test\dg0762\dg0762_fir_rtl\libero_project\component\work\pf_corefft\pf_corefft_0\rtl\in_place\vlog\core\corefft.v":229:2:229:7|Removing sequential instance buf_ready_r (in view: COREFFT_LIB.PF_COREFFT_PF_COREFFT_0_COREFFT_INPLC_Z2(verilog)) of type view:PrimLib.dff(prim) because it does not drive other instances.
@N: BN362 :"c:\pf_task_jan_2021\test\dg0762\dg0762_fir_rtl\libero_project\component\work\pf_coreuart_0\pf_coreuart_0_0\rtl\vlog\core\rx_async.v":501:0:501:5|Removing sequential instance fifo_write (in view: work.PF_COREUART_0_PF_COREUART_0_0_Rx_async_0s_0s_0s_1s_2s_3s(verilog)) of type view:PrimLib.dffs(prim) because it does not drive other instances.
@N: BN362 :"c:\pf_task_jan_2021\test\dg0762\dg0762_fir_rtl\libero_project\component\work\pf_coreuart_0\pf_coreuart_0_0\rtl\vlog\core\rx_async.v":501:0:501:5|Removing sequential instance clear_parity_en (in view: work.PF_COREUART_0_PF_COREUART_0_0_Rx_async_0s_0s_0s_1s_2s_3s(verilog)) of type view:PrimLib.dffr(prim) because it does not drive other instances.
@N: BN362 :"c:\pf_task_jan_2021\test\dg0762\dg0762_fir_rtl\libero_project\component\actel\directcore\corefft\7.1.100\rtl\in_place\vlog\core\fftsm.v":675:2:675:7|Removing sequential instance swCross (in view: COREFFT_LIB.fft_inpl_inBuf_fftA_pipe_8_3_0(verilog)) of type view:PrimLib.dff(prim) because it does not drive other instances.
@N: BN362 :"c:\pf_task_jan_2021\test\dg0762\dg0762_fir_rtl\libero_project\component\actel\directcore\corefft\7.1.100\rtl\in_place\vlog\core\fftsm.v":265:2:265:7|Removing sequential instance fftRd_done_tick (in view: COREFFT_LIB.fft_inpl_sm_top_256s_128s_8_3_10s_1s(verilog)) of type view:PrimLib.dff(prim) because it does not drive other instances.
@N: BN362 :"c:\pf_task_jan_2021\test\dg0762\dg0762_fir_rtl\libero_project\hdl\filter_control_fsm.v":98:0:98:5|Removing sequential instance COEF_ON (in view: work.FILTERCONTROL_FSM(verilog)) of type view:PrimLib.sdffre(prim) because it does not drive other instances.
@N: BN362 :"c:\pf_task_jan_2021\test\dg0762\dg0762_fir_rtl\libero_project\component\work\pf_corefft\pf_corefft_0\rtl\in_place\vlog\core\corefft.v":229:2:229:7|Removing sequential instance datao_valid_r (in view: COREFFT_LIB.PF_COREFFT_PF_COREFFT_0_COREFFT_INPLC_Z2(verilog)) of type view:PrimLib.dff(prim) because it does not drive other instances.
@N: BN362 :"c:\pf_task_jan_2021\test\dg0762\dg0762_fir_rtl\libero_project\component\work\pf_coreuart_0\pf_coreuart_0_0\rtl\vlog\core\rx_async.v":206:0:206:5|Removing sequential instance overflow (in view: work.PF_COREUART_0_PF_COREUART_0_0_Rx_async_0s_0s_0s_1s_2s_3s(verilog)) of type view:PrimLib.dffre(prim) because it does not drive other instances.
@N: BN362 :"c:\pf_task_jan_2021\test\dg0762\dg0762_fir_rtl\libero_project\component\work\pf_coreuart_0\pf_coreuart_0_0\rtl\vlog\core\rx_async.v":447:0:447:5|Removing sequential instance parity_err (in view: work.PF_COREUART_0_PF_COREUART_0_0_Rx_async_0s_0s_0s_1s_2s_3s(verilog)) of type view:PrimLib.dffre(prim) because it does not drive other instances.
@N: BN362 :"c:\pf_task_jan_2021\test\dg0762\dg0762_fir_rtl\libero_project\component\work\pf_coreuart_0\pf_coreuart_0_0\rtl\vlog\core\rx_async.v":231:0:231:5|Removing sequential instance framing_error (in view: work.PF_COREUART_0_PF_COREUART_0_0_Rx_async_0s_0s_0s_1s_2s_3s(verilog)) of type view:PrimLib.dffre(prim) because it does not drive other instances.
@N: BN115 :"c:\pf_task_jan_2021\test\dg0762\dg0762_fir_rtl\libero_project\component\actel\directcore\corefft\7.1.100\rtl\in_place\vlog\core\fftsm.v":582:42:582:50|Removing instance bit_dly_1 (in view: COREFFT_LIB.fft_inpl_outBufA_256s_8_1s(verilog)) of type view:COREFFT_LIB.fft_inpl_kitDelay_bit_reg_3s_1(verilog) because it does not drive other instances.
@N: BN362 :"c:\pf_task_jan_2021\test\dg0762\dg0762_fir_rtl\libero_project\component\actel\directcore\corefft\7.1.100\rtl\in_place\vlog\core\kit.v":203:6:203:11|Removing sequential instance genblk1\.delayLine\[2\] (in view: COREFFT_LIB.fft_inpl_kitDelay_bit_reg_3s_1(verilog)) of type view:PrimLib.dffr(prim) because it does not drive other instances.
@N: BN362 :"c:\pf_task_jan_2021\test\dg0762\dg0762_fir_rtl\libero_project\component\actel\directcore\corefft\7.1.100\rtl\in_place\vlog\core\kit.v":203:6:203:11|Removing sequential instance genblk1\.delayLine\[1\] (in view: COREFFT_LIB.fft_inpl_kitDelay_bit_reg_3s_1(verilog)) of type view:PrimLib.dffr(prim) because it does not drive other instances.
@N: BN362 :"c:\pf_task_jan_2021\test\dg0762\dg0762_fir_rtl\libero_project\component\work\pf_coreuart_0\pf_coreuart_0_0\rtl\vlog\core\rx_async.v":286:0:286:5|Removing sequential instance overflow_int (in view: work.PF_COREUART_0_PF_COREUART_0_0_Rx_async_0s_0s_0s_1s_2s_3s(verilog)) of type view:PrimLib.dffre(prim) because it does not drive other instances.
@N: BN362 :"c:\pf_task_jan_2021\test\dg0762\dg0762_fir_rtl\libero_project\component\work\pf_coreuart_0\pf_coreuart_0_0\rtl\vlog\core\rx_async.v":286:0:286:5|Removing sequential instance framing_error_int (in view: work.PF_COREUART_0_PF_COREUART_0_0_Rx_async_0s_0s_0s_1s_2s_3s(verilog)) of type view:PrimLib.dffre(prim) because it does not drive other instances.
@N: BN362 :"c:\pf_task_jan_2021\test\dg0762\dg0762_fir_rtl\libero_project\component\actel\directcore\corefft\7.1.100\rtl\in_place\vlog\core\kit.v":203:6:203:11|Removing sequential instance genblk1\.delayLine\[0\] (in view: COREFFT_LIB.fft_inpl_kitDelay_bit_reg_3s_1(verilog)) of type view:PrimLib.dffr(prim) because it does not drive other instances.
@N: FX1184 |Applying syn_allowed_resources blockrams=952,dsps=924 on top level netlist top 
@N: FX1143 |Skipping assigning INTERNAL_VREF to iobanks, because the table of mapping from pin to iobank is not initialized.
@N: BN225 |Writing default property annotation file C:\PF_task_jan_2021\test\DG0762\DG0762_FIR_RTL\Libero_Project\synthesis\top.sap.
@N: MO225 :"c:\pf_task_jan_2021\test\dg0762\dg0762_fir_rtl\libero_project\component\work\pf_coreuart_0\pf_coreuart_0_0\rtl\vlog\core\rx_async.v":286:0:286:5|There are no possible illegal states for state machine rx_state[3:0] (in view: work.PF_COREUART_0_PF_COREUART_0_0_Rx_async_0s_0s_0s_1s_2s_3s(verilog)); safe FSM implementation is not required.
