# Microsemi NMAT TXT File

# Version: v12.6 12.900.20.24

# Design Name: top 

# Input Netlist Format: EDIF 

# Family: PolarFire , Die: MPF300TS , Package: FCG1152 , Speed grade: -1 

# Date generated: Wed Jan 13 11:22:42 2021 


#
# I/O constraints
#

set_io REF_CLK_0 E25
set_io RESET_N K22
set_io RX H18
set_io TX G17

#
# Core cell constraints
#

set_location PF_DSP_FLOW_DEMO_TOP_0/UART_IF_0/rfsm[10] 1307 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[29][8] 653 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[45][0] 809 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.poBuf/genblk1.memQ/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R0C1/R_ADDR_3_inst 1454 28
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/preBflySw_0/leftQ_r[23] 1569 37
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/twidLUT_1/twidLUT_0/PolarFire_uram.uram_0/OR2_rD[21] 1227 33
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/inPr_dly_0/genblk1.delayLine[0][14] 1447 37
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/postBflySw_0/muxQ_w[5] 1408 36
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[2][11] 501 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/postBflySw_0/rightP_r[27] 1537 37
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/cmplx_0/genblk1.cmplx18_0/half_1/genblk1.dly_c/genblk1.delayLine[0][12] 1425 46
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[21][9] 517 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[61][0] 1217 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[26][5] 594 19
set_location PF_DSP_FLOW_DEMO_TOP_0/UART_IF_0/rfsm[9] 1306 19
set_location PF_DSP_FLOW_DEMO_TOP_0/UART_IF_0/R_ADDR_lm_0[0] 1461 15
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.poBuf/genblk1.memP/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R0C0/R_ADDR_2_inst 1291 28
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/datai_valid_r 1382 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[54][11] 1115 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[30][4] 1341 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[3][12] 452 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/preBflySw_0/rightP_r[24] 1561 40
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/twid_rA_0/twid_rA_0.tA_w_8_RNO 1272 36
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[20][5] 1703 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[41][0] 948 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[72][2] 1422 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/inBuf_rA_0/offsetPQ_r1[1] 1264 40
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/outQ[27] 1511 43
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[1][8] 2093 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.piBuf/wQ_w[31] 1534 33
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[48][7] 708 19
set_location PF_DSP_FLOW_DEMO_TOP_0/UART_IF_0/rfsm_RNO[10] 1307 18
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.poBuf/genblk1.memQ/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R0C0/R_ADDR_0_inst 1298 34
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[36][12] 1160 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/lut_0/T_1_00_31_0_.m141_3 1235 36
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/genblk1.outBuff_0/outD[14] 1392 28
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[35][15] 855 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/lut_0/T_1_00_31_0_.m80_i 1187 39
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.poBuf/wP_w[20] 1452 27
set_location PF_COREUART_0_0/PF_COREUART_0_0/make_RX/rcv_cnt.receive_count_3_i_o4[0] 1315 12
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[3][5] 2027 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/rdFFTtimer_0/bit_dly_5/genblk1.delayLine[1] 1364 40
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[49][5] 670 19
set_location PF_DSP_FLOW_DEMO_TOP_0/UART_IF_0/rfsm_RNO[9] 1306 18
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/genblk1.outBuff_0/outD[10] 1402 7
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/outQ[10] 1338 36
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[21][15] 555 28
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[0][13] 984 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[47][5] 965 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[12][7] 2003 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[22][0] 1600 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[47][9] 989 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/twidLUT_1/twidLUT_0/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R0C1/BLK_EN_inst 1231 34
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[19][0] 468 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/inQr_w[13] 1430 45
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/preBflySw_0/muxP_w[0] 1342 27
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/inQr_w[9] 1325 45
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/twidLUT_1/twidLUT_0/PolarFire_uram.uram_0/OR2_rD[18] 1226 33
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[4][6] 1643 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.poBuf/genblk1.memP/PolarFire_uram.uram_0/OR2_rD[3] 1284 27
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/inPr_dly_0/genblk1.delayLine[0][1] 1332 43
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/lut_0/T_1_00_31_0_.m103 1241 33
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.poBuf/genblk1.memQ/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R0C1/R_ADDR_2_inst 1433 37
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/inPi_dly_0/genblk1.delayLine[2][9] 1558 40
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[28][10] 638 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[98][2] 1871 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[28][1] 632 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/inBuf_wA_0/offsetPQ_r2[4] 1341 34
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/rTimer_dly2/genblk1.delayLine[1][0] 1302 43
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/genblk1.outBuff_0/inQ_r[22] 1528 34
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[115][2] 2181 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/inPi_dly_0/genblk1.delayLine[3][9] 1551 40
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[79][12] 1551 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[16][12] 1843 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/lut_0/T_1_00_31_0_.m73 1211 36
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/genblk1.outBuff_0/outBuf_1/PolarFire_uram.uram_0/OR2_rD[10] 1431 6
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[25][7] 1547 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[26][14] 667 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[78][12] 1543 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[37][5] 806 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[126][10] 1286 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/cmplx_0/genblk1.cmplx18_0/half_0/genblk1.dly_d/genblk1.delayLine[0][4] 1316 46
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.poBuf/genblk1.memP/PolarFire_uram.uram_0/OR2_rD[11] 1446 33
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/twid_rA_0/twid_rA_0.tA_w_4 1260 36
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/outQ[7] 1395 43
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.piBuf/genblk1.memQ/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R1C2/R_ADDR_4_inst 1550 34
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[49][8] 681 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[27][10] 1474 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[30][6] 1367 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/genblk1.outBuff_0/outBuf_1/PolarFire_uram.uram_0/CFG2_BLKX0[0] 1536 27
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[123][15] 1983 13
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/lut_0/T_1_00_0_31_0_.m166_i 1187 36
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[4][4] 2051 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FILTERCONTROL_FSM_0/fsm_tr4_0_a4_0_a3_4 1079 15
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[26][10] 607 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[49][15] 669 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[61][6] 1197 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[21][7] 1667 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[44][11] 836 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[62][4] 1235 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/outP[2] 1321 27
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[119][0] 2187 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[89][6] 1733 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/outQ[2] 1330 27
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/postBflySw_0/outQ[13] 1428 37
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[45][13] 973 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[43][8] 917 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.poBuf/genblk1.memQ/PolarFire_uram.uram_0/OR2_rD[31] 1583 33
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[84][5] 1606 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/preBflySw_0/muxP_w[17] 1426 39
set_location PF_DSP_FLOW_DEMO_TOP_0/FILTERCONTROL_FSM_0/COEF_RADDR[1] 1070 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.piBuf/wQ_w[8] 1404 24
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.piBuf/genblk1.memP/PolarFire_uram.uram_0/CFG2_BLKZ0[0] 1492 33
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[35][1] 749 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/postBflySw_0/leftQ_r[1] 1396 40
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[94][9] 1835 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/postBflySw_0/outQ[7] 1415 37
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[51][2] 1025 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/outBufA_0/bit_dly_0/genblk1.delayLine[2] 1356 40
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/postBflySw_0/rightP_r[17] 1474 37
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[73][15] 1477 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[34][3] 1202 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[25][8] 569 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[22][6] 1631 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[115][13] 2110 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.piBuf/genblk1.memQ/PolarFire_uram.uram_0/OR2_rD[28] 1550 33
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[19][12] 543 28
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[99][0] 1889 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.piBuf/wP_w[2] 1399 33
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[123][11] 2167 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[22][3] 1605 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/inBuf_ldA_0/ldCount/Q[5] 1359 37
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.poBuf/wP_w[13] 1438 27
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[18][12] 551 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/twid_rA_0/timer_tick[5] 1270 37
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[116][11] 2189 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/lut_0/T_1_00_31_0_.m193_1_2 1247 42
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[64][7] 999 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/wTimer_0/Q[6] 1315 37
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[39][7] 845 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FILTERCONTROL_FSM_0/FFT_WADDR[6] 1254 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[14][5] 1907 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[19][7] 485 28
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[37][11] 1114 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[4][13] 435 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[45][7] 795 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[38][15] 847 25
set_location PF_DSP_FLOW_DEMO_TOP_0/UART_IF_0/WEN_RNO 1262 18
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/postBflySw_0/muxQ_w[9] 1412 39
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/slowClock_0/divider[1] 1253 46
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[5][12] 439 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[49][15] 1023 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[19][3] 441 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[10][1] 2034 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/lut_0/T_1_00_31_0_.m283 1199 33
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/preBflySw_0/muxP_w[31] 1577 33
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[8][2] 415 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/inQi_w[11] 1398 45
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/inPi_dly_0/genblk1.delayLine[1][1] 1479 40
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/inPr_dly_0/genblk1.delayLine[3][13] 1425 40
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[27][8] 1472 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.poBuf/genblk1.memP/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R0C2/BLK_EN_inst 1553 34
set_location PF_DSP_FLOW_DEMO_TOP_0/UART_IF_0/rfsm_RNO[12] 1232 15
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[38][2] 1055 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/genblk1.outBuff_0/inQ_r[23] 1526 34
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[34][12] 810 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/preBflySw_0/outP[11] 1343 37
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[110][13] 2026 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/genblk1.outBuff_0/inQ_r[4] 1433 10
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[41][7] 958 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[23][8] 1602 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/genblk1.outBuff_0/outBuf_0/PolarFire_uram.uram_0/OR2_rD[21] 1405 27
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.piBuf/genblk1.memP/PolarFire_uram.uram_0/OR2_rD[18] 1479 33
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[30][8] 1353 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/twidLUT_1/twidLUT_0/PolarFire_uram.uram_0/OR2_rD[28] 1251 36
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[41][14] 879 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[2][6] 466 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/rw_dly_lastStage/genblk1.delayLine[6]_3 1311 42
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[37][15] 1088 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[70][15] 1414 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[95][11] 1841 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/inPr_dly_0/genblk1.delayLine[1][14] 1441 37
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[82][4] 1583 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/lut_0/T_1_00_0_31_0_.m117 1199 36
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[121][2] 2135 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/twid_wA_0/rstAfterInit 1300 37
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/preBflySw_0/rightP_r[30] 1558 37
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[15][0] 437 13
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[13][15] 507 28
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[16][6] 1847 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/inBuf_rA_0/mask1_r[3] 1286 43
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[37][7] 1113 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[84][9] 1630 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[71][0] 1409 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[2][9] 467 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[72][10] 1451 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/preBflySw_0/rightP_r[10] 1334 37
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[23][5] 545 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[1][15] 480 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[33][7] 1235 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[17][11] 1808 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[28][11] 1424 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/trueRst 1351 37
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[35][11] 1162 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/postBflySw_0/muxQ_w[14] 1456 36
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/cmplx_0/genblk1.cmplx18_0/half_0/genblk1.dly_d/genblk1.delayLine[0][1] 1245 37
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/genblk1.outBuff_0/outBuf_1/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R0C2/R_ADDR_3_inst 1521 34
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[31][6] 689 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[1]_1_sqmuxa_0_a4_i_fast 1228 18
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[19][8] 487 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/preBflySw_0/rightP_r[12] 1468 34
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[5][8] 374 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/inPr_dly_0/genblk1.delayLine[3][6] 1355 40
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.piBuf/wP_w[8] 1382 24
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[52][10] 558 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/outQ[2] 1390 43
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/inPr_dly_0/genblk1.delayLine[0][9] 1333 40
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/preBflySw_0/leftQ_r[22] 1562 34
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[52][12] 593 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[37][0] 1092 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/autoScale_0/edge_detect_0/inp_tick 1350 43
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.piBuf/genblk1.memQ/PolarFire_uram.uram_0/OR2_rD[21] 1408 33
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[71][9] 1433 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[60][13] 1195 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/postBflySw_0/outP[28] 1605 37
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[7][14] 2033 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[33][0] 1234 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[37][11] 826 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[29][6] 652 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/preBflySw_0/muxP_w[26] 1568 33
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[63][11] 1277 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[47][10] 755 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FILTERCONTROL_FSM_0/fsm_RNI8CKB1[4] 1241 18
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[66][5] 1312 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[112][15] 2036 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[17][15] 1831 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[107][1] 2045 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/inBuf_wA_0/mask1_shft_stage_8 1314 33
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[120][6] 2125 16
set_location PF_ccc_0_0/PF_ccc_0_0/clkint_0_1 2448 164
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[8][7] 385 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/outP[4] 1315 39
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[26][11] 609 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[2][5] 431 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/twidLUT_1/twidLUT_0/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R0C1/R_ADDR_3_inst 1220 28
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/twidLUT_1/twidLUT_0/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R1C2/R_ADDR_1_inst 1243 34
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.piBuf/genblk1.memP/PolarFire_uram.uram_0/OR2_rD[21] 1474 33
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[10][15] 426 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.poBuf/genblk1.memQ/PolarFire_uram.uram_0/CFG2_BLKZ0[0] 1555 27
set_location PF_DSP_FLOW_DEMO_TOP_0/UART_IF_0/DATA_OUT[0] 1416 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[105][4] 2000 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[85][6] 1649 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/cmplx_0/genblk1.cmplx18_0/half_0/genblk1.dly_d/genblk1.delayLine[0][9] 1258 34
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[58][6] 1181 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[77][3] 1505 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[123][2] 2144 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[23][15] 1615 25
set_location PF_DSP_FLOW_DEMO_TOP_0/UART_IF_0/DATA_OUT_11_0_1_0[2] 1399 15
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[15][11] 1883 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/cmplx_0/genblk1.cmplx18_0/half_0/genblk1.dly_d/genblk1.delayLine[0][13] 1254 37
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/genblk1.outBuff_0/outBuf_0/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R1C2/R_ADDR_4_inst 1614 28
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/twid_rA_0/twid_rA_0.tA_w_6 1267 36
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/genblk1.outBuff_0/outBuf_1/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R1C0/R_ADDR_0_inst 1432 10
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[1][3] 494 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/inBuf_wA_0/addrP_r2[1] 1323 34
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[89][11] 1734 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[59][2] 614 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[12][10] 395 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[17][2] 426 16
set_location PF_DSP_FLOW_DEMO_TOP_0/UART_IF_0/DATA_OUT_11_0_1_0[7] 1410 15
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.piBuf/wP_w[23] 1588 33
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/preBflySw_0/leftQ_r[9] 1335 40
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[1]_1_sqmuxa_0_a4_i_fast_RNIIM1I_4 799 15
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[79][5] 1541 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[14][3] 1906 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.poBuf/wP_w[16] 1466 27
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/postBflySw_0/outP[4] 1394 40
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/outP[24] 1508 37
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[2][10] 533 28
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[93][13] 1815 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[10][9] 2063 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/lut_0/T_1_00_31_0_.N_202_i 1223 36
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/outQ[20] 1432 36
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.poBuf/wQ_w[5] 1416 24
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[62][13] 1243 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[36][1] 1102 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[44][10] 923 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/wTimer_dly_2/genblk1.delayLine[0][1] 1325 37
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/preBflySw_0/rightP_r[2] 1327 28
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[95][0] 1679 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/inBuf_rA_0/swCross 1316 43
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[9][12] 477 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[84][14] 1639 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/autoScale_0/un1_bflyOutValid 1350 42
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/outBufA_0/outBuf_wA[2] 1330 37
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/inPr_dly_0/genblk1.delayLine[1][6] 1353 40
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/inBuf_wA_0/un1_offsetPQ_w_8 1338 33
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/outP[18] 1483 33
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/inQi_w[14] 1436 45
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[35][7] 779 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/lut_0/T_1_00_0_31_0_.N_183_i 1199 39
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/genblk1.outBuff_0/outPQ[0] 1416 6
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[126][3] 1277 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/postBflySw_0/rightP_r[26] 1544 37
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[15][7] 417 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/lut_0/T_1_00_31_0_.m82 1222 36
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[76][12] 1519 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/lut_0/T_1_00_0_31_0_.m248_2_1 1221 36
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[22][2] 511 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[7][13] 425 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[77][15] 1527 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[5][1] 2129 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[18][2] 1759 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.piBuf/genblk1.memP/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R0C0/R_ADDR_5_inst 1304 28
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[15][3] 436 13
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[107][9] 2057 13
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[35][2] 1165 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[50][13] 1051 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[53][11] 1112 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/smPong_2_sqmuxa_i 1303 36
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[47][13] 987 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[29][13] 1393 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[99][7] 1912 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/inBuf_rA_0/mask1_shft_stage_9_i 1266 42
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/inPi_dly_0/genblk1.delayLine[1][9] 1552 40
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[41][12] 878 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[38][9] 1055 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FILTERCONTROL_FSM_0/fsm[1] 1077 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/postBflySw_0/outP[8] 1401 28
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/inBuf_rA_0/bflyA[4] 1276 43
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[26][0] 599 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/twid_wA_0/twid_wEn_1_sqmuxa_i 1258 42
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[31][2] 1318 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[0][6] 1227 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/inPr_dly_0/genblk1.delayLine[3][8] 1390 40
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[48][1] 705 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.piBuf/genblk1.memP/PolarFire_uram.uram_0/OR2_rD[5] 1301 33
set_location PF_DSP_FLOW_DEMO_TOP_0/UART_IF_0/DATA_OUT_11_0_2[3] 1392 15
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/postBflySw_0/leftQ_r[6] 1404 40
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/preBflySw_0/muxQ_w[8] 1325 39
set_location PF_DSP_FLOW_DEMO_TOP_0/UART_IF_0/R_ADDR_lm_0[7] 1464 15
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/preBflySw_0/muxP_w[29] 1548 33
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/genblk1.outBuff_0/outBuf_1/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R1C0/BLK_EN_inst 1431 10
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/genblk1.outBuff_0/outBuf_0/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R1C2/R_ADDR_2_inst 1613 28
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/lut_0/T_1_00_0_31_0_.m172 1186 36
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[19][6] 470 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[106][2] 1985 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FILTERCONTROL_FSM_0/FIR_WR_ADDR[5] 1178 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[48][11] 718 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[110][6] 2075 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/genblk1.outBuff_0/outPQ[18] 1400 27
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[0][9] 639 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[49][3] 660 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/inBuf_rA_0/offsetPQ_r1[5] 1271 40
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[114][1] 2089 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[95][10] 1840 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[15][8] 401 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[48][6] 998 19
set_location PF_DSP_FLOW_DEMO_TOP_0/UART_IF_0/WDATA[10] 1200 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[16][12] 478 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[48][7] 966 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/lut_0/T_1_00_0_31_0_.m125 1198 39
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[17][15] 543 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/postBflySw_0/muxP_w[12] 1468 36
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[52][13] 1087 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/preBflySw_0/rightP_r[23] 1571 37
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.piBuf/wQ_w[1] 1426 27
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[1][13] 428 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[1]_1_sqmuxa_0_a4_i_fast_RNIIM1I_3 1258 18
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/outP[11] 1415 43
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/inBuf_wA_0/mask1_r_RNO[2] 1331 33
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[52][3] 1054 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[76][4] 1494 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.poBuf/wP_w[6] 1386 33
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/outP[28] 1512 37
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[25][6] 568 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.poBuf/wA_w[0] 1371 33
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/ctrl_dly_0/genblk1.delayLine[0][0] 1471 34
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[22][9] 1629 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[82][3] 1582 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[1][9] 2092 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/preBflySw_0/muxQ_w[26] 1567 33
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.poBuf/genblk1.memP/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R1C1/R_ADDR_5_inst 1457 34
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/postBflySw_0/muxP_w[27] 1537 36
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[39][13] 869 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[29][14] 687 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[72][1] 1426 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/lut_0/T_1_00_0_31_0_.m90 1175 42
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[0][5] 799 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[117][12] 2108 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/genblk1.outBuff_0/outBuf_1/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R1C1/R_ADDR_3_inst 1377 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/postBflySw_0/leftQ_r[9] 1413 40
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/postBflySw_0/leftQ_r[13] 1437 43
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[67][9] 1337 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.piBuf/wP_w[26] 1605 33
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[100][8] 1931 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[43][15] 895 19
set_location PF_DSP_FLOW_DEMO_TOP_0/UART_IF_0/R_ADDR[6] 1466 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[2][1] 463 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/twidLUT_1/rA_r[0] 1266 34
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.poBuf/wQ_w[19] 1451 33
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[42][3] 896 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/preBflySw_0/outP[9] 1342 40
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/twidLUT_1/twidLUT_0/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R0C2/R_ADDR_3_inst 1254 34
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[98][13] 1883 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/twidLUT_1/twidLUT_0/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R1C1/R_ADDR_2_inst 1218 28
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[6][10] 1851 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/inPr_dly_0/genblk1.delayLine[1][8] 1337 40
set_location PF_COREUART_0_0/PF_COREUART_0_0/make_RX/rx_shift[6] 1291 16
set_location PF_DSP_FLOW_DEMO_TOP_0/UART_IF_0/rx_en_RNO 1209 15
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[32][8] 717 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[39][11] 1042 19
set_location PF_COREUART_0_0/PF_COREUART_0_0/make_TX/xmit_state[3] 1215 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/inBuf_wA_0/mask1_shft_stage_9 1317 33
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[2][4] 482 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/preBflySw_0/outQ[22] 1570 37
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[7][6] 353 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/rA_r[3] 1277 40
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[75][5] 1493 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[18][8] 1787 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/outP[29] 1556 33
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/preBflySw_0/rightP_r[25] 1555 34
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[2][15] 2004 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[49][5] 1001 25
set_location PF_DSP_FLOW_DEMO_TOP_0/UART_IF_0/R_ADDR_lm_0[10] 1462 15
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[57][6] 534 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[49][9] 1013 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[41][8] 869 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/postBflySw_0/rightP_r[16] 1467 37
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[53][6] 524 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[115][11] 2185 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/slowClock_0/divider[0] 1248 46
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[52][7] 555 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/inBuf_ldA_0/ifoLoad 1347 37
set_location PF_DSP_FLOW_DEMO_TOP_0/FILTERCONTROL_FSM_0/fsm_ns_4_0_.m38_i_i_o2_5 1257 15
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.poBuf/genblk1.memQ/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R0C2/R_ADDR_3_inst 1590 28
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[63][5] 1241 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[40][9] 999 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/preBflySw_0/outQ[25] 1558 34
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/twidLUT_1/twidLUT_0/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R0C0/R_ADDR_4_inst 1206 34
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[7][9] 361 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/lut_0/T_1_00_31_0_.m12 1197 39
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[9][7] 2074 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[15][2] 1870 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[33][10] 1234 19
set_location PF_COREUART_0_0/PF_COREUART_0_0/make_RX/rx_bit_cnt[1] 1323 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/inPr_w[3] 1317 39
set_location PF_COREUART_0_0/PF_COREUART_0_0/make_CLOCK_GEN/genblk1.baud_cntr_lm_0[1] 1229 27
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.piBuf/wA_w[5] 1356 33
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[119][7] 2127 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[40][6] 1005 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/cmplx_0/rndHr_0/outp[14] 1386 43
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[110][8] 2073 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/tA_r[5] 1256 34
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/inBuf_ldA_0/ldCount/Q[7] 1362 37
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/rdFFTtimer_0/bit_dly_3/genblk1.delayLine[0] 1293 40
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[4][3] 1967 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/genblk1.outBuff_0/inQ_r[9] 1423 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[39][5] 845 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[60][2] 495 13
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[59][5] 679 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[49][13] 702 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[58][3] 647 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/postBflySw_0/muxQ_w[28] 1524 36
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.poBuf/genblk1.memQ/PolarFire_uram.uram_0/OR2_rD[12] 1442 33
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/lut_0/T_1_00_31_0_.m265 1210 42
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[35][9] 1163 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[95][7] 1839 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[11][2] 2010 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[19][11] 1727 19
set_location PF_COREUART_0_0/PF_COREUART_0_0/make_RX/receive_shift.rx_bit_cnt_4[2] 1328 15
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/rdFFTtimer_0/rStage_r_RNO[1] 1285 33
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/outBufA_0/outBuf_rA_0/Q_RNIQSFH1[4] 1401 36
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/inPr_w[10] 1342 36
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[51][10] 645 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[45][1] 799 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[97][1] 1865 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/rA_r[0] 1276 40
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/inPi_dly_0/genblk1.delayLine[0][3] 1486 37
set_location PF_DSP_FLOW_DEMO_TOP_0/UART_IF_0/DATA_OUT_11_RNO[3] 1393 15
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[18][1] 434 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.poBuf/genblk1.memP/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R1C1/R_ADDR_2_inst 1453 34
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/inBuf_wA_0/offsetPQ_r2[1] 1340 34
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.piBuf/genblk1.memP/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R1C0/R_ADDR_1_inst 1319 28
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[20][11] 450 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[62][6] 480 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[112][2] 2145 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[124][0] 1940 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[7][5] 403 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[62][2] 1233 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[31][9] 1541 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[26][8] 1511 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/postBflySw_0/outQ[4] 1406 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[50][0] 1019 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.poBuf/genblk1.memQ/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R1C1/R_ADDR_0_inst 1446 28
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/inPi_w[11] 1554 39
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[15][6] 448 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/lut_0/T_1_00_31_0_.m274_1_0 1236 33
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[41][1] 958 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[64][3] 1004 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/preBflySw_0/muxQ_w[29] 1554 33
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[57][4] 1157 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[35][13] 1171 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/postBflySw_0/outP[26] 1563 37
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[13][10] 1967 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[27][4] 1466 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/genblk1.outBuff_0/inP_r[5] 1394 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[119][4] 2140 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/genblk1.outBuff_0/outBuf_0/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R0C0/R_ADDR_3_inst 1406 7
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[60][10] 1186 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/inPi_dly_0/genblk1.delayLine[2][5] 1490 46
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[23][4] 1581 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[4][5] 1895 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[24][4] 563 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/inPi_dly_0/genblk1.delayLine[3][5] 1489 46
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/twid_rA_0/twid_rA_0.tA_w_3 1268 36
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/rdFFTtimer_0/rA_timer/N_87_i 1291 39
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.poBuf/genblk1.memQ/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R0C2/R_ADDR_2_inst 1589 28
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[21][5] 488 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/postBflySw_0/muxP_w[11] 1470 36
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[36][7] 1139 19
set_location reset_sync_0/reset_sync_0/dff_1 1714 16
set_location PF_DSP_FLOW_DEMO_TOP_0/UART_IF_0/R_ADDR[3] 1457 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/twid_wA_0/slowTimer/Q[3] 1252 43
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/inQi_w[5] 1386 45
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/lut_0/T_1_00_31_0_.m256 1196 39
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[23][0] 544 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[52][5] 1053 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[119][3] 2141 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[17][9] 483 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/postBflySw_0/outP[22] 1545 34
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/rTimer_dly2/genblk1.delayLine[1][5] 1301 43
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/outP[10] 1414 43
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/outQ[14] 1402 43
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[94][4] 1795 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[98][14] 1914 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[52][11] 561 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[36][0] 1099 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[6][13] 433 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/genblk1.outBuff_0/outD[26] 1531 28
set_location PF_COREUART_0_0/PF_COREUART_0_0/make_RX/un1_rx_bit_cnt_1.CO1 1324 15
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[34][4] 743 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[110][15] 2016 25
set_location PF_DSP_FLOW_DEMO_TOP_0/UART_IF_0/COEF_WEN_RNO_0 1020 15
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[39][12] 866 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.poBuf/genblk1.memP/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R0C1/R_ADDR_5_inst 1482 28
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.poBuf/genblk1.memQ/PolarFire_uram.uram_0/OR2_rD[21] 1414 33
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[81][10] 1589 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.poBuf/wQ_w[7] 1381 33
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.poBuf/wA_w[1] 1369 33
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[15][13] 1865 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/inPi_dly_0/genblk1.delayLine[0][2] 1476 40
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[38][12] 846 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[32][0] 704 16
set_location PF_DSP_FLOW_DEMO_TOP_0/UART_IF_0/WDATA_0 1203 15
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/postBflySw_0/muxQ_w[20] 1464 36
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.piBuf/genblk1.memQ/PolarFire_uram.uram_0/OR2_rD[8] 1351 33
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBufValid_r 1355 43
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[0][1] 872 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/lut_0/T_1_00_0_31_0_.m8 1195 39
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/rw_dly_lastStage/genblk1.delayLine[2] 1314 43
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[15][8] 1882 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/preBflySw_0/outQ[29] 1554 34
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/preBflySw_0/muxP_w[5] 1303 33
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[42][4] 911 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/inBuf_rA_0/mask1_shft_stage_9 1262 42
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/postBflySw_0/outP[2] 1396 37
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[5][3] 389 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[0][4] 1052 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/inBuf_wA_0/mask1_shft_stage_5 1328 33
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[118][1] 2170 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[45][5] 954 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[33][12] 1242 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[28][1] 1388 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[45][9] 929 19
set_location PF_DSP_FLOW_DEMO_TOP_0/UART_IF_0/rfsm[7] 1249 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[20][3] 420 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[73][4] 1427 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[57][9] 1141 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[11][8] 2016 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/lut_0/T_1_00_0_31_0_.m30 1246 42
set_location PF_init_monitor_0_0/PF_init_monitor_0_0/I_INIT 508 2
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/inBuf_wA_0/mask2_r[3] 1313 34
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[74][6] 1475 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/lut_0/T_1_00_31_0_.m71 1234 42
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/outBufA_0/outBuf_rA_0/tc_RNO 1382 39
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[50][10] 1039 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/preBflySw_0/muxP_w[4] 1316 39
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/lut_0/T_1_00_31_0_.m284 1198 33
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[59][10] 811 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/inBuf_wA_0/addrP_r2[4] 1310 34
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[55][3] 522 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[67][10] 1336 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[62][8] 1233 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[125][3] 1565 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[33][15] 795 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/postBflySw_0/rightP_r[25] 1536 37
set_location PF_COREUART_0_0/PF_COREUART_0_0/make_RX/rx_bit_cnt_1_sqmuxa_0_a4 1325 12
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[35][5] 748 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/twid_rA_0/twid_rA_0.tA_w_7_RNO_0 1261 36
set_location PF_COREUART_0_0/PF_COREUART_0_0/tx_hold_reg[6] 1372 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[104][1] 1979 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/inBuf_rA_0/offsetPQ_r1[2] 1265 40
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[34][14] 1194 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.poBuf/wQ_w[17] 1435 33
set_location reset_sync_0/reset_sync_0/dff_3 1713 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/lut_0/T_1_00_31_0_.m261 1186 39
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[5][0] 2096 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[51][3] 611 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[73][10] 1457 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[94][15] 1830 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/genblk1.outBuff_0/inP_r[24] 1599 34
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[94][13] 1829 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/genblk1.outBuff_0/outD[24] 1509 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[13][12] 1984 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[5][2] 2071 19
set_location PF_COREUART_0_0/PF_COREUART_0_0/make_CLOCK_GEN/genblk1.baud_cntr[3] 1225 28
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.piBuf/wQ_w[19] 1436 33
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/outP[17] 1501 37
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/lut_0/T_1_00_31_0_.m125 1211 39
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/lut_0/T_1_00_31_0_.m35 1175 39
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[52][7] 1041 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[79][3] 1540 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[110][5] 2066 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.poBuf/genblk1.memP/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R0C1/R_ADDR_2_inst 1481 28
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/genblk1.outBuff_0/outD[20] 1404 28
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[32][3] 703 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[7][13] 2028 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/TAP_CHAIN[63].genblk1.muladd_0/FIR_DP_reg[16] 1531 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/outQ[18] 1502 43
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[48][2] 971 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.poBuf/genblk1.memQ/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R1C2/R_ADDR_1_inst 1559 28
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[22][11] 513 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[7][1] 419 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[82][15] 1614 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[49][11] 1012 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/rdFFTtimer_0/preRdValid 1289 40
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[44][1] 910 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[19][2] 446 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.poBuf/genblk1.memQ/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R0C1/R_ADDR_0_inst 1426 34
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/outQ[1] 1304 33
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/lut_0/T_1_00_31_0_.m8_i 1226 39
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.piBuf/genblk1.wA_r[1] 1362 34
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[96][15] 1842 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[32][4] 1259 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[105][2] 1984 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[22][5] 1604 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.piBuf/genblk1.memQ/PolarFire_uram.uram_0/OR2_rD[6] 1334 27
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[7][4] 397 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.piBuf/genblk1.memQ/PolarFire_uram.uram_0/OR2_rD[18] 1412 33
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/inPr_dly_0/genblk1.delayLine[0][5] 1345 40
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[70][7] 1365 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[30][15] 701 25
set_location PF_DSP_FLOW_DEMO_TOP_0/UART_IF_0/DATA_OUT_11[4] 1424 15
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/postBflySw_0/outP[29] 1540 34
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[102][4] 1955 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[14][14] 1927 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/rdFFTtimer_0/rStage_r[0] 1295 34
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[44][14] 931 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[32][2] 702 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[61][0] 523 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[120][9] 2109 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[32][10] 716 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[23][14] 615 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[3][14] 502 13
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[121][14] 2055 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/cmplx_0/rndHi_0/outp[15] 1498 43
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/postBflySw_0/outQ[6] 1422 37
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[30][15] 1351 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[82][1] 1580 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[124][8] 1996 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/rw_dly_lastStage/genblk1.delayLine[5] 1315 43
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[104][9] 2002 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[3][6] 437 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[57][10] 1146 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/genblk1.outBuff_0/outBuf_0/PolarFire_uram.uram_0/CFG2_BLKZ0[1] 972 24
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/postBflySw_0/leftQ_r[31] 1542 37
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[13][10] 387 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/lut_0/T_1_0_Or2_16 1185 36
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[9][2] 413 13
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/inPr_dly_0/genblk1.delayLine[2][14] 1435 43
set_location PF_COREUART_0_0/PF_COREUART_0_0/make_TX/xmit_bit_sel_RNO[2] 1365 15
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/preBflySw_0/outP[14] 1445 37
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[29][2] 1383 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[116][0] 2104 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/outP[14] 1455 39
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/genblk1.outBuff_0/outBuf_0/PolarFire_uram.uram_0/OR2_rD[0] 1415 6
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/genblk1.outBuff_0/rAmsb_r2 1394 28
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[121][6] 2116 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[3][9] 430 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/inBuf_rA_0/un1_offsetPQ_w_7 1268 39
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/datai_re_r[15] 1471 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/inBuf_rA_0/offsetPQ_r2[6] 1265 43
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/inPi_w[4] 1484 36
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[10][4] 411 13
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[25][1] 1495 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/genblk1.outBuff_0/outBuf_1/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R0C2/R_ADDR_2_inst 1524 34
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/genblk1.outBuff_0/outPQ[24] 1530 27
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[37][9] 802 19
set_location PF_COREUART_0_0/PF_COREUART_0_0/make_RX/receive_count_RNO[0] 1314 12
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[38][13] 1080 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[40][0] 848 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/twidLUT_1/twidLUT_0/PolarFire_uram.uram_0/CFG2_BLKZ0[0] 1259 36
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[28][14] 1440 19
set_location PF_COREUART_0_0/PF_COREUART_0_0/tx_hold_reg[4] 1371 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/genblk1.outBuff_0/inQ_r[27] 1516 34
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[21][1] 1655 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.piBuf/genblk1.memP/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R1C2/R_ADDR_0_inst 1602 37
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/preBflySw_0/outQ[31] 1578 34
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[32][6] 1259 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[10][15] 2005 25
set_location PF_DSP_FLOW_DEMO_TOP_0/UART_IF_0/DATA_OUT_11_0_2_0[6] 1431 15
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.poBuf/wP_w[29] 1540 33
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/lut_0/T_1_00_31_0_.m167_1_1 1187 33
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/TAP_CHAIN[63].genblk1.muladd_0/FIR_DP_reg[19] 1530 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[80][7] 1583 19
set_location PF_DSP_FLOW_DEMO_TOP_0/UART_IF_0/MAIN_FSM.DATA_WEN_6_f0 1190 15
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.piBuf/genblk1.memQ/PolarFire_uram.uram_0/OR2_rD[11] 1443 33
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/postBflySw_0/rightP_r[15] 1471 37
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/lut_0/T_1_00_31_0_.m38_i 1174 39
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/inBuf_ldA_0/ldCount/Q_lm_0[7] 1362 36
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[80][14] 1579 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[56][6] 479 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[25][15] 1542 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[60][1] 642 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/inPr_dly_0/genblk1.delayLine[2][6] 1350 40
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[3][5] 409 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[67][3] 1331 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[61][5] 1216 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/lut_0/T_1_00_31_0_.m153 1244 33
set_location PF_DSP_FLOW_DEMO_TOP_0/UART_IF_0/DATA_OUT_11_0_2_0[2] 1394 15
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[67][7] 1335 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[112][10] 2105 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/twidLUT_1/twidLUT_0/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R0C1/R_ADDR_2_inst 1230 34
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[90][8] 1736 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/preBflySw_0/outQ[1] 1326 28
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/inPi_dly_0/genblk1.delayLine[1][5] 1488 46
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/lut_0/T_1_00_0_31_0_.m264_2_0 1199 42
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[9][7] 359 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[123][6] 2091 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.piBuf/genblk1.memP/PolarFire_uram.uram_0/OR2_rD[11] 1481 33
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/inPi_dly_0/genblk1.delayLine[2][0] 1478 43
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[36][12] 866 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[50][8] 644 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/outP[22] 1506 37
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[37][15] 831 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/inPi_dly_0/genblk1.delayLine[3][0] 1482 43
set_location PF_DSP_FLOW_DEMO_TOP_0/FILTERCONTROL_FSM_0/fsm_tr4_0_a4_0_a3_3 1078 15
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[69][9] 1396 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[18][13] 1807 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/preBflySw_0/validOut 1344 43
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.piBuf/genblk1.memQ/PolarFire_uram.uram_0/OR2_rD[7] 1335 27
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/postBflySw_0/rightP_r[8] 1400 34
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.piBuf/genblk1.memP/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R1C1/R_ADDR_5_inst 1487 34
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[75][3] 1492 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/outQ[0] 1368 43
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.poBuf/genblk1.memQ/PolarFire_uram.uram_0/OR2_rD[0] 1297 27
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[34][5] 1210 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[106][10] 2026 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[92][14] 1806 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[86][5] 1654 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/genblk1.outBuff_0/inQ_r[16] 1404 34
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/outBufA_0/outBuf_rA_valid_RNO 1384 39
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[92][6] 1823 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FILTERCONTROL_FSM_0/FIR_WR_ADDR_RNIJMT71[0] 1256 12
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[15][2] 404 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/outBuf_rA_r[3] 1376 34
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/genblk1.outBuff_0/outPQ[5] 1410 6
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[96][9] 1850 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[116][15] 2060 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[103][15] 1954 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[55][12] 557 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[2][1] 2127 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[42][4] 886 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.poBuf/genblk1.memP/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R1C2/R_ADDR_4_inst 1581 34
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[70][2] 1390 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[12][1] 1978 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/inPr_dly_0/genblk1.delayLine[1][13] 1443 37
set_location PF_DSP_FLOW_DEMO_TOP_0/UART_IF_0/rfsm[1] 1282 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/rdFFTtimer_0/rStage_r[1] 1285 34
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/preBflySw_0/outQ[4] 1311 40
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/outP[9] 1335 36
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/inBuf_ldA_0/ldCount/Q_lm_0[3] 1363 36
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/postBflySw_0/muxQ_w[2] 1412 36
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/twidLUT_1/twidLUT_0/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R1C2/R_ADDR_0_inst 1236 34
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[38][1] 774 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[65][15] 1311 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[111][6] 2114 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/lut_0/T_1_00_0_31_0_.m166 1187 42
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[23][11] 1618 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[85][14] 1659 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[29][14] 1391 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[97][12] 1896 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[122][13] 2120 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[26][4] 1485 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[32][8] 1268 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[108][1] 2080 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[28][8] 647 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/outP[17] 1452 33
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[6][11] 376 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[18][0] 1753 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[37][3] 1075 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/twid_wA_0/ngrst2rst_0/tick1 1252 46
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[1][11] 2091 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.piBuf/wQ_w[17] 1428 33
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/inBuf_wA_0/addrP_w[2] 1320 33
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[33][3] 1232 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[21][0] 472 16
set_location PF_DSP_FLOW_DEMO_TOP_0/UART_IF_0/DATA_WADDR[5] 1058 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/outBufA_0/bit_dly_0/genblk1.delayLine[1] 1358 40
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/genblk1.outBuff_0/outPQ[1] 1401 6
set_location PF_DSP_FLOW_DEMO_TOP_0/FILTERCONTROL_FSM_0/fsm_RNIE86B2[4] 1244 15
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[17][5] 1810 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/twidLUT_1/twidLUT_0/PolarFire_uram.uram_0/OR2_rD[17] 1245 36
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/outP[28] 1541 33
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[63][10] 625 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[103][11] 1997 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/postBflySw_0/rightP_r[4] 1403 40
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[63][7] 519 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[13][5] 1954 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[99][1] 1888 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[62][1] 1231 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/genblk1.outBuff_0/outBuf_1/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R1C2/R_ADDR_3_inst 1506 28
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[22][12] 558 28
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.piBuf/wA_w[1] 1362 33
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[113][13] 2056 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[2][10] 1773 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[87][2] 1685 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/postBflySw_0/leftQ_r[0] 1370 43
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/inBuf_wA_0/offsetPQ_r1[3] 1339 34
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/lut_0/T_1_00_0_31_0_.m111 1223 33
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[100][0] 1905 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[101][8] 1949 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[97][5] 1864 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/genblk1.outBuff_0/outBuf_0/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R0C1/R_ADDR_0_inst 1384 28
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/inPr_dly_0/genblk1.delayLine[2][8] 1343 40
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[86][9] 1666 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/rdFFTtimer_0/rStage_r_RNIMDE6[2] 1284 42
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.poBuf/genblk1.memP/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R0C0/R_ADDR_3_inst 1289 28
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[8][13] 2032 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[57][8] 1149 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[44][0] 831 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[48][14] 727 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[59][4] 1181 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[113][6] 2169 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/postBflySw_0/outP[24] 1575 34
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/wTimer_dly_2/genblk1.delayLine[0][5] 1324 37
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/lut_0/T_1_0_Or2_25 1228 33
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/inBuf_rA_0/mask1_shft_stage_4_i 1292 42
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[118][12] 2109 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[30][13] 1345 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/postBflySw_0/rightP_r[29] 1451 34
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[93][12] 1814 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[18][0] 465 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[71][4] 1408 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.poBuf/genblk1.memQ/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R1C2/R_ADDR_5_inst 1553 28
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[45][15] 835 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.poBuf/wP_w[10] 1392 24
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[116][14] 2102 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[108][9] 2062 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/lut_0/T_1_00_31_0_.m152 1239 33
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/postBflySw_0/outP[27] 1540 37
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[55][15] 1127 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.piBuf/genblk1.memP/PolarFire_uram.uram_0/OR2_rD[29] 1599 33
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[60][4] 1209 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/genblk1.outBuff_0/outBuf_1/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R1C1/R_ADDR_2_inst 1388 28
set_location PF_DSP_FLOW_DEMO_TOP_0/FILTERCONTROL_FSM_0/fsm[3] 1232 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/postBflySw_0/leftQ_r[12] 1453 37
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[3][1] 424 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/TAP_CHAIN[63].genblk1.muladd_0/FIR_DP_reg[28] 1823 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[19][9] 512 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[81][13] 1587 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/genblk1.outBuff_0/inQ_r[20] 1368 34
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[111][8] 2104 13
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/twidLUT_1/twidLUT_0/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R0C2/R_ADDR_2_inst 1249 34
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[4][2] 427 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.piBuf/genblk1.memP/PolarFire_uram.uram_0/OR2_rD[8] 1319 33
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/inPr_dly_0/genblk1.delayLine[0][0] 1335 43
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[8][13] 421 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[3][4] 481 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[27][9] 608 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/postBflySw_0/outQ[20] 1464 37
set_location PF_DSP_FLOW_DEMO_TOP_0/UART_IF_0/WDATA[15] 1201 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[67][0] 1346 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/genblk1.outBuff_0/outBuf_0/PolarFire_uram.uram_0/OR2_rD[24] 1620 27
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/lut_0/T_1_00_0_31_0_.m39 1174 42
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/genblk1.outBuff_0/outD[19] 1413 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/preBflySw_0/outQ[21] 1403 37
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[65][9] 1313 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[12][9] 1993 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/lut_0/T_1_00_31_0_.m168 1220 36
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[6][2] 417 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/lut_0/T_1_00_31_0_.m59_2_0_1 1234 39
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/cmplx_0/genblk1.cmplx18_0/half_0/genblk1.dly_d/genblk1.delayLine[0][6] 1322 46
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[103][8] 1996 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[6][15] 462 16
set_location PF_DSP_FLOW_DEMO_TOP_0/UART_IF_0/SEL_RNO 1229 15
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[41][10] 868 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/sync_rAwA_w_0_a2_0 1293 42
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/preBflySw_0/leftQ_r[27] 1554 28
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/inPr_dly_0/genblk1.delayLine[3][1] 1336 43
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.poBuf/genblk1.wA_r[4] 1378 34
set_location PF_COREUART_0_0/PF_COREUART_0_0/tx_hold_reg[3] 1377 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[10][13] 1963 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.piBuf/genblk1.memP/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R0C1/R_ADDR_5_inst 1494 28
set_location PF_COREUART_0_0/PF_COREUART_0_0/make_RX/rx_shift[7] 1294 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/inBuf_wA_0/mask1_shft_stage_4 1327 33
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[96][13] 1879 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[68][15] 1349 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.poBuf/wP_w[27] 1584 33
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[121][12] 2044 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[88][6] 1718 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/lut_0/T_1_0_Or2_9 1225 33
set_location PF_DSP_FLOW_DEMO_TOP_0/FILTERCONTROL_FSM_0/fsm_ns_4_0_.m35_i_0 1232 18
set_location PF_DSP_FLOW_DEMO_TOP_0/UART_IF_0/rfsm_RNO[4] 1297 18
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.piBuf/genblk1.wA_r[4] 1363 34
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[59][9] 1169 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[64][12] 1271 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/inQr_w[12] 1425 45
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[43][11] 873 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[49][14] 661 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/cmplx_0/genblk1.cmplx18_0/half_1/genblk1.dly_c/genblk1.delayLine[0][7] 1330 46
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[8][1] 2052 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[24][7] 1573 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/cmplx_0/rndHi_0/outp[2] 1485 43
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/twidLUT_1/twidLUT_0/PolarFire_uram.uram_0/OR2_rD[27] 1269 33
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[15][0] 1869 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/postBflySw_0/muxQ_w[4] 1414 36
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[17][3] 1809 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[63][12] 531 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/genblk1.outBuff_0/outBuf_1/PolarFire_uram.uram_0/OR2_rD[14] 1374 27
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[9][8] 2062 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[13][3] 1953 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/inBuf_ldA_0/ldCount/Q_0_sqmuxa_3_0_1 1357 36
set_location PF_COREUART_0_0/PF_COREUART_0_0/make_RX/rx_bit_cnt[0] 1322 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[113][8] 2123 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[87][14] 1695 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[98][0] 1868 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/slowClock_0/divider_inferred_clock_RNISVF8_0[2] 1164 162
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/preBflySw_0/leftQ_r[8] 1327 40
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/lut_0/T_1_00_31_0_.m130_1_1 1198 42
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/inPi_w[13] 1557 36
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[85][12] 1658 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[121][10] 2116 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/outBuf_wA_r[4] 1382 34
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[35][10] 1158 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/lut_0/T_1_00_0_31_0_.m242 1210 36
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[80][4] 1559 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/twid_rA_0/stage_tick[1] 1280 34
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[38][7] 813 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/postBflySw_0/leftQ_r[11] 1456 40
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[18][7] 491 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[11][0] 1989 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[83][5] 1601 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[4][7] 400 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.poBuf/genblk1.memP/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R0C2/R_ADDR_5_inst 1555 28
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[91][11] 1769 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/lut_0/T_1_00_31_0_.m11_2_1 1186 42
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/twidLUT_1/rA_r[2] 1265 34
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[93][9] 1817 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/startFFT_g4_dly_0/genblk1.delayLine[1] 1307 37
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[95][1] 1673 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/ctrl_dly_0/genblk1.delayLine[3][0] 1473 34
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[6][7] 388 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[115][0] 2103 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[18][3] 460 13
set_location PF_DSP_FLOW_DEMO_TOP_0/UART_IF_0/WDATA[11] 1208 16
set_location PF_COREUART_0_0/PF_COREUART_0_0/genblk1.RXRDY4 1272 15
set_location PF_DSP_FLOW_DEMO_TOP_0/FILTERCONTROL_FSM_0/FIR_WR_ADDR[2] 1175 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/cmplx_0/genblk1.cmplx18_0/half_0/genblk1.dly_c/genblk1.delayLine[0][12] 1416 46
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/inBuf_rA_0/mask1_shft_stage_4 1266 39
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[4][12] 2032 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/lut_0/T_1_0_Or2_26 1209 42
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/inPr_dly_0/genblk1.delayLine[1][1] 1338 43
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/genblk1.outBuff_0/outBuf_1/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R0C2/BLK_EN_inst 1513 34
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[122][3] 2198 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[64][14] 977 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/inBuf_rA_0/timer_r[3] 1295 43
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/inBuf_rA_0/addrP_w[5] 1261 42
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/lut_0/T_1_00_31_0_.m167_1 1186 33
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.poBuf/wQ_w[6] 1392 33
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[118][14] 2059 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[7][7] 2083 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/lut_0/T_1_00_31_0_.N_82_i 1219 36
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.piBuf/wP_w[20] 1481 27
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/postBflySw_0/rightP_r[19] 1465 37
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.piBuf/genblk1.memP/PolarFire_uram.uram_0/OR2_rD[6] 1323 27
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/postBflySw_0/muxQ_w[18] 1469 36
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[19][4] 1722 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[75][11] 1493 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[67][11] 1334 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/twid_rA_0/stage_tick2[0] 1277 37
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/inPi_dly_0/genblk1.delayLine[1][0] 1481 40
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[67][6] 1342 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/datai_re_r[0] 1419 28
set_location PF_DSP_FLOW_DEMO_TOP_0/UART_IF_0/R_ADDR[7] 1464 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[55][4] 1121 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[58][15] 1170 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[42][15] 894 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[56][12] 504 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/twidLUT_1/twidLUT_0/PolarFire_uram.uram_0/OR2_rD[19] 1264 33
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/lut_0/T_1_0_Or2_17 1197 33
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/genblk1.outBuff_0/outBuf_0/PolarFire_uram.uram_0/OR2_rD[15] 1401 27
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/outQ[12] 1400 43
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/inPi_w[7] 1568 39
set_location PF_DSP_FLOW_DEMO_TOP_0/UART_IF_0/WDATA[4] 1209 13
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/preBflySw_0/outQ[3] 1288 28
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/inBuf_wA_0/timer_r[1] 1325 34
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[116][7] 2145 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[15][10] 1881 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[44][7] 862 16
set_location PF_COREUART_0_0/PF_COREUART_0_0/make_TX/xmit_state_ns_0_a2[5] 1214 15
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/genblk1.outBuff_0/outBuf_0/PolarFire_uram.uram_0/OR2_rD[5] 1405 6
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/cmplx_0/genblk1.cmplx18_0/half_0/genblk1.dly_c/genblk1.delayLine[0][5] 1386 46
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[54][12] 1095 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[124][12] 1986 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[59][4] 569 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.poBuf/wA_w[3] 1373 33
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[18][8] 438 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.poBuf/wP_w[3] 1401 33
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.poBuf/genblk1.memQ/PolarFire_uram.uram_0/OR2_rD[23] 1563 36
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[57][2] 1156 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[4][12] 437 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/wStage_r_5[0] 1279 33
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/lut_0/T_1_00_0_31_0_.m102_1_1 1222 39
set_location PF_DSP_FLOW_DEMO_TOP_0/FILTERCONTROL_FSM_0/COEF_RADDR[4] 1073 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.piBuf/genblk1.memP/PolarFire_uram.uram_0/OR2_rD[22] 1594 33
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[15][9] 438 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/twid_wA_0/ngrst2rst_0/sync_ngrst_0/genblk1.delayLine[3] 1251 46
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[112][11] 2110 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[82][8] 1591 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/inBuf_rA_0/bflyA[5] 1277 43
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[108][10] 2061 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[102][2] 1952 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.poBuf/genblk1.memQ/PolarFire_uram.uram_0/OR2_rD[11] 1441 33
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.piBuf/genblk1.memP/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R1C0/R_ADDR_4_inst 1313 28
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[58][0] 656 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/lut_0/T_1_00_31_0_.m2 1236 42
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/preBflySw_0/muxP_w[30] 1558 36
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[28][6] 641 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/cmplx_0/genblk1.cmplx18_0/half_0/genblk1.dly_d/genblk1.delayLine[0][15] 1370 40
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/cmplx_0/rndHi_0/outp[4] 1487 43
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/postBflySw_0/muxQ_w[6] 1413 36
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[83][9] 1613 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/lut_0/T_1_00_31_0_.m219 1210 39
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/preBflySw_0/muxQ_w[31] 1578 33
set_location PF_COREUART_0_0/PF_COREUART_0_0/make_RX/samples[1] 1311 13
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/genblk1.outBuff_0/outBuf_0/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R1C0/R_ADDR_1_inst 1392 10
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[60][15] 499 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/genblk1.outBuff_0/outPQ[15] 1393 27
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[39][12] 1019 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/rw_dly_lastStage/genblk1.delayLine[4] 1317 43
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.poBuf/genblk1.memP/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R0C2/R_ADDR_2_inst 1547 28
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[15][11] 418 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/inPr_dly_0/genblk1.delayLine[3][9] 1334 40
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[42][9] 922 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[82][0] 1579 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[116][4] 2166 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/inBuf_wA_0/timer_r[4] 1316 37
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.piBuf/genblk1.memQ/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R1C2/R_ADDR_1_inst 1541 34
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[33][10] 725 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.poBuf/genblk1.memQ/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R0C2/R_ADDR_0_inst 1588 28
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[9][13] 448 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[20][2] 455 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/outBufA_0/rdCtl_reg_RNIFE5L 1383 39
set_location PF_DSP_FLOW_DEMO_TOP_0/UART_IF_0/WDATA[3] 1208 13
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.piBuf/genblk1.memQ/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R0C0/R_ADDR_4_inst 1343 34
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[111][5] 2086 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[42][6] 921 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[39][9] 844 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/lut_0/T_1_00_31_0_.m89 1223 42
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[10][6] 2029 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/twidLUT_1/twidLUT_0/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R1C0/R_ADDR_1_inst 1189 28
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/inBuf_wA_0/addrP_r2[5] 1312 34
set_location PF_COREUART_0_0/PF_COREUART_0_0/tx_hold_reg[7] 1379 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[57][11] 1140 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[12][5] 392 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[55][9] 1121 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[62][2] 501 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[73][13] 1478 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/postBflySw_0/muxQ_w[10] 1399 36
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[115][14] 2101 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/inPi_w[3] 1486 36
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[78][5] 1522 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[113][10] 2115 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/outQ[9] 1397 43
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[2][0] 2037 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[36][15] 1146 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[124][10] 2164 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[116][3] 2142 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/postBflySw_0/muxP_w[22] 1538 36
set_location PF_COREUART_0_0/PF_COREUART_0_0/make_TX/xmit_cnt.xmit_bit_sel_3_i_0_o2[3] 1361 15
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.piBuf/wQ_w[22] 1526 33
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[77][0] 1504 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[2][2] 1981 19
set_location PF_COREUART_0_0/PF_COREUART_0_0/make_CLOCK_GEN/genblk1.baud_cntr_lm_0[3] 1225 27
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[40][14] 871 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[69][3] 1373 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/lut_0/T_1_00_31_0_.m160_1_2 1244 39
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/outQ[26] 1510 43
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[37][6] 823 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[34][13] 1193 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[69][7] 1360 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[59][9] 495 16
set_location PF_COREUART_0_0/PF_COREUART_0_0/make_CLOCK_GEN/genblk1.baud_cntr_lm_0[11] 1256 27
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/lut_0/T_1_00_0_31_0_.m285 1196 33
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[19][12] 1759 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[121][9] 2115 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[59][1] 644 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[48][2] 701 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/wTimer_dly_2/genblk1.delayLine[0][0] 1323 37
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[100][3] 1904 19
set_location PF_DSP_FLOW_DEMO_TOP_0/UART_IF_0/DATA_OUT_11[7] 1407 15
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[72][8] 1419 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[24][15] 1578 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.piBuf/genblk1.memP/PolarFire_uram.uram_0/OR2_rD[7] 1322 27
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[77][9] 1529 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/twidLUT_1/twidLUT_0/PolarFire_uram.uram_0/OR2_rD[29] 1254 36
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[36][3] 1129 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/postBflySw_0/outP[11] 1453 28
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/outQ[3] 1287 27
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[57][11] 489 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/lut_0/T_1_00_0_31_0_.m157_1 1243 39
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[98][7] 1880 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FILTERCONTROL_FSM_0/fsm_RNI5KDI[3] 1243 15
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/rTimer_dly2/genblk1.delayLine[0][6] 1306 43
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[113][5] 2093 25
set_location PF_COREUART_0_0/PF_COREUART_0_0/make_RX/rx_statece[1] 1320 12
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/smPong_5 1299 36
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/inPr_dly_0/genblk1.delayLine[1][9] 1336 40
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[16][5] 1844 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/genblk1.outBuff_0/outBuf_1/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R0C2/R_ADDR_5_inst 1524 28
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[29][10] 651 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/genblk1.outBuff_0/inP_r[0] 1412 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/lut_0/T_1_00_0_31_0_.m280 1242 39
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/genblk1.outBuff_0/inP_r[6] 1397 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[50][3] 1018 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[13][13] 506 28
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[16][15] 1840 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[27][13] 1470 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[119][1] 2182 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/wTimer_dly_2/genblk1.delayLine[1][2] 1331 37
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/outQ[25] 1509 43
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/inBuf_wA_0/mask1_shft_stage_4_i 1329 33
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/outQ[23] 1507 43
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[80][3] 1558 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[26][4] 596 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.piBuf/genblk1.bflyMode_r 1421 28
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[69][13] 1364 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[120][1] 2180 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[18][6] 473 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/genblk1.outBuff_0/outBuf_1/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R0C2/R_ADDR_4_inst 1512 28
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/tA_r[6] 1253 37
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[107][15] 2007 28
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[30][1] 1339 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[14][13] 1926 25
set_location PF_COREUART_0_0/PF_COREUART_0_0/make_TX/xmit_sel.tx_4_iv_i 1355 15
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[57][15] 509 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[122][14] 2056 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[75][10] 1492 25
set_location PF_DSP_FLOW_DEMO_TOP_0/UART_IF_0/rfsm_nss_i_0_a2_1[0] 1275 15
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[70][1] 1389 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[34][2] 1200 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[3][13] 436 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[123][9] 2151 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[63][3] 510 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[45][14] 938 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[88][11] 1726 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[40][3] 849 19
set_location PF_DSP_FLOW_DEMO_TOP_0/UART_IF_0/WDATA_0_7 1207 15
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[55][0] 488 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/inBuf_rA_0/addrP_r2[3] 1287 43
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[96][4] 1681 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/postBflySw_0/outP[7] 1388 34
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[30][8] 682 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/rdFFTtimer_0/rA_timer/Q[5] 1294 40
set_location PF_DSP_FLOW_DEMO_TOP_0/FILTERCONTROL_FSM_0/FIR_WR_ENABLE_RNO 1236 15
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/postBflySw_0/leftQ_r[15] 1433 43
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[55][11] 536 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[80][12] 1577 25
set_location PF_DSP_FLOW_DEMO_TOP_0/UART_IF_0/rx_en_RNO_1 1205 15
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[36][4] 767 19
set_location PF_DSP_FLOW_DEMO_TOP_0/UART_IF_0/COEF_WEN_0_sqmuxa_i_o3 1201 15
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.poBuf/wQ_w[22] 1529 33
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[54][0] 1101 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/genblk1.outBuff_0/outBuf_1/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R0C1/R_ADDR_0_inst 1374 28
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/outP[1] 1405 43
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/genblk1.outBuff_0/outBuf_0/PolarFire_uram.uram_0/OR2_rD[13] 1395 27
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[126][4] 1276 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[51][0] 605 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/cmplx_0/rndHr_0/outp[8] 1380 43
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/inBuf_rA_0/bflyA[1] 1273 43
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/inBuf_rA_0/offsetPQ_r2[2] 1269 40
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/un1_bflyRiskOV_w_2 1423 42
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/lut_0/T_1_00_31_0_.m184 1185 42
set_location PF_COREUART_0_0/PF_COREUART_0_0/make_TX/xmit_bit_sel[0] 1363 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[107][11] 2053 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[91][15] 1791 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[89][2] 1758 19
set_location reset_sync_0/reset_sync_0/dff_0 1712 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[92][3] 1783 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[78][13] 1541 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[21][12] 1675 25
set_location PF_DSP_FLOW_DEMO_TOP_0/UART_IF_0/rfsm_i[0] 1281 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[99][5] 1887 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/twid_rA_0/twid_rA_0.tA_w_9 1271 36
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[35][9] 784 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/inPi_dly_0/genblk1.delayLine[2][7] 1565 40
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.piBuf/genblk1.memQ/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R1C0/R_ADDR_0_inst 1346 28
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/ctrl_dly_0/genblk1.delayLine[2][1] 1354 43
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/rdFFTtimer_0/bit_dly_2/genblk1.delayLine[1] 1295 37
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/genblk1.outBuff_0/inQ_r[19] 1437 34
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/outP[24] 1569 39
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/inPi_dly_0/genblk1.delayLine[3][7] 1564 40
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[59][8] 1168 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[15][10] 397 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/cmplx_0/genblk1.cmplx18_0/half_1/genblk1.dly_c/genblk1.delayLine[0][3] 1314 46
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[76][6] 1510 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/lut_0/T_1_00_0_31_0_.m206_2_0 1233 39
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/inBuf_wA_0/mask2_r[0] 1336 34
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[48][5] 988 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[59][13] 1174 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/lut_0/T_1_00_31_0_.m34_2_1 1185 33
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[98][10] 1879 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[48][9] 1003 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[84][11] 1628 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[6][6] 2147 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[26][14] 1518 16
set_location PF_COREUART_0_0/PF_COREUART_0_0/make_RX/receive_full_int_1_sqmuxa_i_1 1329 15
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/postBflySw_0/muxP_w[21] 1459 36
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/genblk1.outBuff_0/outD[8] 1394 7
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[65][3] 1301 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/outQ[31] 1515 43
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[96][14] 1877 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/genblk1.outBuff_0/inQ_r[11] 1432 34
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[65][7] 1294 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[45][2] 808 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/genblk1.outBuff_0/outBuf_1/PolarFire_uram.uram_0/OR2_rD[0] 1434 6
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[60][2] 1207 25
set_location PF_COREUART_0_0/PF_COREUART_0_0/make_RX/rx_byte_1_sqmuxa 1330 15
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[60][13] 540 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[8][0] 2092 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.poBuf/genblk1.memP/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R0C1/BLK_EN_inst 1480 28
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[30][14] 1360 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[44][15] 870 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[16][3] 1859 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/inPr_dly_0/genblk1.delayLine[3][15] 1419 43
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/genblk1.outBuff_0/inP_r[14] 1431 28
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[8][2] 2064 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/genblk1.outBuff_0/outBuf_1/PolarFire_uram.uram_0/CFG2_BLKZ0[0] 979 24
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[41][13] 877 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[96][10] 1845 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/tA_r[1] 1252 37
set_location PF_DSP_FLOW_DEMO_TOP_0/UART_IF_0/rfsm[3] 1202 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[29][9] 650 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[31][13] 1333 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[69][0] 1372 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[38][5] 811 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/postBflySw_0/rightP_r[28] 1545 37
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[41][2] 952 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/postBflySw_0/outQ[11] 1458 37
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[81][5] 1565 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/outBufA_0/outBuf_rA_0/Q_lm_0[4] 1398 39
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/genblk1.outBuff_0/outPQ[21] 1408 27
set_location PF_COREUART_0_0/PF_COREUART_0_0/make_RX/receive_shift.rx_bit_cnt_4[0] 1322 15
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/lut_0/T_1_00_31_0_.m200 1244 42
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[18][13] 549 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[6][4] 2110 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[91][9] 1768 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[24][3] 562 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/lut_0/T_1_00_0_31_0_.m256_2_1_1_1 1194 39
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/outQ[5] 1393 43
set_location PF_DSP_FLOW_DEMO_TOP_0/UART_IF_0/DATA_OUT_11_RNO[4] 1423 15
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/cmplx_0/rndHr_0/outp[7] 1379 43
set_location PF_DSP_FLOW_DEMO_TOP_0/FILTERCONTROL_FSM_0/FFT_WADDR[2] 1250 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[46][1] 921 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[52][1] 1031 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[47][13] 762 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/lut_0/T_1_00_0_31_0_.m216 1209 39
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.poBuf/genblk1.bflyMode_r 1422 28
set_location PF_DSP_FLOW_DEMO_TOP_0/FILTERCONTROL_FSM_0/FIR_WR_ADDR[1] 1174 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/twidLUT_1/twidLUT_0/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R1C1/BLK_EN_inst 1217 28
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.piBuf/genblk1.memQ/PolarFire_uram.uram_0/CFG2_BLKZ0[1] 1490 33
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[30][12] 1357 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/rdFFTtimer_0/fftRd_done_r_3_0_a2 1293 36
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[101][0] 1937 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.piBuf/wA_w[3] 1364 33
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[25][13] 629 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/inBuf_wA_0/addrP_w[0] 1324 33
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/lut_0/T_1_00_0_31_0_.m188_i 1235 42
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[50][5] 1017 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FILTERCONTROL_FSM_0/FFT_I_VALID 1223 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[14][2] 1903 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[22][7] 490 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[22][14] 1638 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[69][12] 1376 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/preOutBuf_wEn_2_sqmuxa_i_0 1290 36
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/inBuf_rA_0/offsetPQ_r2[4] 1279 40
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.poBuf/genblk1.wA_r[5] 1375 34
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[10][14] 1974 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[115][7] 2156 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[48][5] 697 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[68][12] 1346 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[9][9] 2076 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.poBuf/genblk1.memP/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R1C1/R_ADDR_3_inst 1462 34
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/postBflySw_0/muxP_w[4] 1403 39
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.poBuf/wQ_w[2] 1418 33
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/cmplx_0/genblk1.cmplx18_0/half_1/genblk1.dly_c/genblk1.delayLine[0][11] 1424 46
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[47][8] 970 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[30][0] 669 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[34][9] 1185 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/lut_0/T_1_0_Or2_27 1243 36
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/outP[13] 1443 36
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[11][13] 1965 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/genblk1.outBuff_0/outBuf_1/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R1C1/R_ADDR_5_inst 1385 28
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[20][10] 1725 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/genblk1.outBuff_0/outD[31] 1519 28
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/lut_0/T_1_00_0_31_0_.N_200_i 1243 42
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.poBuf/wQ_w[11] 1439 33
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[47][14] 986 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/twidLUT_1/twidLUT_0/PolarFire_uram.uram_0/OR2_rD[5] 1200 33
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[44][1] 839 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.piBuf/genblk1.memP/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R1C2/R_ADDR_3_inst 1601 37
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[45][12] 959 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/genblk1.outBuff_0/outBuf_1/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R1C2/R_ADDR_2_inst 1505 28
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/rdFFTtimer_0/rA_timer/Q_lm_0[6] 1292 39
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[124][5] 2106 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/twidLUT_1/twidLUT_0/PolarFire_uram.uram_0/OR2_rD[0] 1208 33
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/outBuf_wA_r[0] 1389 34
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/inBuf_rA_0/addrP_r2[1] 1290 43
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[29][15] 686 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/inBuf_wA_0/un1_offsetPQ_w_7 1339 33
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[19][7] 1737 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[78][14] 1540 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/genblk1.outBuff_0/outBuf_1/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R1C1/R_ADDR_4_inst 1379 28
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[29][0] 1355 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[116][13] 2129 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/inBuf_wA_0/offsetPQ_r2[0] 1355 34
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/lut_0/T_1_00_0_31_0_.m71 1234 36
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/genblk1.outBuff_0/outBuf_0/PolarFire_uram.uram_0/OR2_rD[18] 1394 27
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[10][12] 2014 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[120][7] 2108 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.poBuf/genblk1.memP/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R1C0/R_ADDR_0_inst 1278 28
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/outP[27] 1552 27
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/genblk1.outBuff_0/inQ_r[7] 1423 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[101][14] 1935 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[85][2] 1637 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[23][4] 543 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[81][9] 1588 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.piBuf/genblk1.memP/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R0C2/R_ADDR_5_inst 1602 28
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/cmplx_0/rndHr_0/outp[0] 1372 43
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[103][0] 1973 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[41][12] 955 19
set_location PF_DSP_FLOW_DEMO_TOP_0/UART_IF_0/rfsm_nss_i_0_a3_1[0] 1278 15
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[20][8] 1724 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[74][7] 1466 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[21][14] 554 28
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/lut_0/T_1_00_0_31_0_.m206_1_0 1232 39
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/inPr_w[14] 1447 36
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[95][5] 1796 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[62][1] 519 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/lut_0/T_1_00_31_0_.m34_2 1184 33
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/genblk1.outBuff_0/outBuf_0/PolarFire_uram.uram_0/OR2_rD[30] 1616 27
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/inPr_dly_0/genblk1.delayLine[0][7] 1323 40
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[26][11] 1509 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[63][15] 1263 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[115][4] 2163 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[114][15] 2063 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[60][8] 1172 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[48][8] 715 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/twidLUT_1/twidLUT_0/PolarFire_uram.uram_0/OR2_rD[8] 1210 33
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[55][8] 1120 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[69][6] 1357 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/rdFFTtimer_0/stage_timer/Q_RNO[2] 1290 33
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/lut_0/T_1_00_0_31_0_.m249 1216 36
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/outBuf_rA_r[2] 1384 40
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[112][0] 2077 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[93][4] 1793 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[46][14] 796 19
set_location PF_COREUART_0_0/PF_COREUART_0_0/make_CLOCK_GEN/genblk1.baud_cntr[4] 1231 28
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/twid_rA_0/timer_tick[6] 1263 37
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[52][8] 560 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.piBuf/genblk1.memQ/PolarFire_uram.uram_0/OR2_rD[23] 1563 33
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/rdFFTtimer_0/stage_timer/Q_RNO[4] 1288 33
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.piBuf/genblk1.memP/PolarFire_uram.uram_0/OR2_rD[19] 1476 33
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[59][11] 690 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[33][4] 737 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[59][12] 1199 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[30][7] 1029 19
set_location PF_COREUART_0_0/PF_COREUART_0_0/make_CLOCK_GEN/genblk1.baud_cntr[8] 1255 28
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/genblk1.outBuff_0/outD[1] 1401 7
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[115][3] 2146 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[58][12] 1169 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/inBuf_rA_0/bflyA[6] 1267 40
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.poBuf/genblk1.memQ/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R0C0/BLK_EN_inst 1281 28
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[109][1] 2077 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[59][2] 1180 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/preBflySw_0/muxP_w[9] 1332 39
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[50][7] 1019 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/postBflySw_0/rightP_r[18] 1466 37
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[30][3] 668 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[18][14] 548 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/outQ[30] 1514 43
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[27][5] 617 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FILTERCONTROL_FSM_0/FFT_WADDR[1] 1249 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/twid_rA_0/tA[6] 1271 37
set_location PF_COREUART_0_0/PF_COREUART_0_0/make_TX/xmit_state_ns_0[5] 1217 15
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/rTimer_dly2/genblk1.delayLine[1][4] 1291 40
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[96][11] 1846 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[14][4] 360 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[30][0] 1354 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[92][2] 1782 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[22][1] 471 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/cmplx_0/rndHr_0/outp[3] 1375 43
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/outP[11] 1445 33
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/preBflySw_0/outQ[24] 1570 40
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[25][9] 567 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[65][0] 1283 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[14][8] 1930 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/cmplx_0/genblk1.cmplx18_0/half_0/genblk1.dly_c/genblk1.delayLine[0][2] 1383 46
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[60][15] 1192 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.piBuf/genblk1.memP/PolarFire_uram.uram_0/OR2_rD[24] 1618 33
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[53][10] 524 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.piBuf/wQ_w[0] 1418 27
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[1][1] 2009 19
set_location PF_DSP_FLOW_DEMO_TOP_0/UART_IF_0/rfsmce[14] 1234 15
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/postBflySw_0/muxQ_w[3] 1419 36
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/inPr_dly_0/genblk1.delayLine[0][13] 1444 37
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[74][15] 1480 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[74][13] 1481 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[73][6] 1456 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[44][0] 909 25
set_location PF_COREUART_0_0/PF_COREUART_0_0/make_CLOCK_GEN/genblk1.baud_cntr_lm_0[4] 1231 27
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[110][9] 2070 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/lut_0/T_1_00_31_0_.m72 1198 36
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[29][6] 1402 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.poBuf/genblk1.memP/PolarFire_uram.uram_0/OR2_rD[27] 1549 27
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/cmplx_0/genblk1.cmplx18_0/half_0/genblk1.dly_c/genblk1.delayLine[0][8] 1393 46
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[116][12] 2114 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[62][10] 1245 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[30][2] 667 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[4][10] 440 25
set_location PF_COREUART_0_0/PF_COREUART_0_0/make_RX/rx_byte[6] 1278 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/rdFFTtimer_0/stage_timer/N_82_i 1295 42
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/inPr_dly_0/genblk1.delayLine[2][1] 1334 43
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[29][3] 1387 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/outBuf_rA_r[7] 1398 34
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[84][7] 1627 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/lut_0/T_1_00_31_0_.m109 1193 39
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/postBflySw_0/outP[31] 1590 34
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/lut_0/T_1_00_0_31_0_.m160 1241 39
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/preBflySw_0/muxQ_w[15] 1452 39
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[78][3] 1521 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[80][1] 1557 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[53][15] 1132 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[42][14] 938 19
set_location PF_DSP_FLOW_DEMO_TOP_0/UART_IF_0/WDATA_0_7_RNIGF4F 1211 15
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[37][5] 1096 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/inPi_w[0] 1482 39
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[45][5] 814 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[76][15] 1517 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[18][2] 429 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[100][7] 1929 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/genblk1.outBuff_0/wA_r[2] 1367 28
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/genblk1.outBuff_0/outBuf_0/PolarFire_uram.uram_0/OR2_rD[8] 1393 6
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/slowClock_0/divider_RNO[1] 1253 45
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[54][3] 527 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/lut_0/T_1_00_0_31_0_.m15 1173 39
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[33][5] 1230 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[109][14] 2006 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[94][8] 1833 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/twidLUT_1/twidLUT_0/PolarFire_uram.uram_0/OR2_rD[6] 1206 33
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/lut_0/T_1_0_Or2_11 1242 36
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[35][11] 783 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.piBuf/genblk1.memP/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R1C1/BLK_EN_inst 1476 34
set_location PF_DSP_FLOW_DEMO_TOP_0/FILTERCONTROL_FSM_0/fsm_ns_4_0_.m35_i_0_o2 1239 15
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/cmplx_0/genblk1.cmplx18_0/half_1/genblk1.dly_c/genblk1.delayLine[0][14] 1429 43
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[24][10] 559 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/lut_0/T_1_00_0_31_0_.m106 1221 33
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/preOutBuf_wEn 1285 37
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/inPi_dly_0/genblk1.delayLine[1][7] 1566 40
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[107][6] 2055 13
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[109][9] 2069 13
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[79][0] 1539 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[40][10] 1004 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/datai_re_r[1] 1425 28
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[55][13] 552 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/inBuf_ldA_0/un1_startLoad 1353 36
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.poBuf/genblk1.memP/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R0C1/R_ADDR_3_inst 1479 28
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[41][5] 955 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/TAP_CHAIN[63].genblk1.muladd_0/FIR_DP_reg[21] 1721 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/outBufA_0/outBuf_rA_0/Q_lm_0[2] 1382 36
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[39][6] 843 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[107][5] 2033 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.piBuf/genblk1.wA_r[5] 1356 34
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/smFft_rdy_2_sqmuxa_i 1305 36
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[25][14] 1539 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/datai_re_r[2] 1420 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[43][1] 893 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[14][15] 510 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/inQr_w[10] 1321 45
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[14][13] 514 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/rdFFTtimer_0/rA_timer/tc_r 1284 40
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[27][13] 659 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/rdFFTtimer_0/rA_timer/tc_3_0_a2_1 1288 39
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[79][9] 1565 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/genblk1.outBuff_0/outD[29] 1515 28
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[102][13] 1948 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/genblk1.outBuff_0/wEn_r 972 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/inPr_dly_0/genblk1.delayLine[3][5] 1362 40
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[9][10] 368 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[50][15] 1049 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[64][13] 976 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[21][12] 553 28
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[125][4] 1564 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/rTimer_dly2/genblk1.delayLine[0][3] 1280 37
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[110][14] 2021 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/postBflySw_0/muxQ_w[8] 1405 36
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[64][0] 1002 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[45][8] 820 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/inQr_w[8] 1326 45
set_location PF_DSP_FLOW_DEMO_TOP_0/UART_IF_0/rfsm_nss_i_0[0] 1281 15
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[74][2] 1474 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/genblk1.outBuff_0/outPQ[27] 1523 27
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[46][11] 788 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[7][8] 1841 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/preBflySw_0/outP[16] 1461 34
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/postBflySw_0/leftQ_r[16] 1477 43
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/postBflySw_0/leftQ_r[28] 1527 37
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[65][6] 1311 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[52][10] 1077 25
set_location PF_COREUART_0_0/PF_COREUART_0_0/make_CLOCK_GEN/genblk1.baud_cntr_lm_0[6] 1249 27
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[16][15] 522 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[0][12] 988 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FILTERCONTROL_FSM_0/fsm_RNI3LN51[3] 1199 15
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/preBflySw_0/rightP_r[8] 1326 40
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[41][8] 947 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[66][12] 1339 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.piBuf/genblk1.memQ/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R1C0/R_ADDR_2_inst 1355 28
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[67][15] 1335 25
set_location PF_DSP_FLOW_DEMO_TOP_0/UART_IF_0/DATA_OUT_11_0_2_0[3] 1403 15
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.poBuf/genblk1.memQ/PolarFire_uram.uram_0/OR2_rD[13] 1442 36
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/postBflySw_0/muxQ_w[27] 1526 36
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[47][0] 742 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[80][13] 1576 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.piBuf/genblk1.memQ/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R1C1/R_ADDR_4_inst 1447 28
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.piBuf/genblk1.memP/PolarFire_uram.uram_0/OR2_rD[12] 1471 33
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[83][11] 1612 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[53][12] 588 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[55][2] 1120 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[58][2] 665 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/cmplx_0/rndHr_0/outp[10] 1382 43
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[43][0] 885 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.piBuf/wQ_w[11] 1434 33
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/inBuf_ldA_0/ldCount/Q_lm_0[6] 1364 36
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.piBuf/genblk1.memQ/PolarFire_uram.uram_0/OR2_rD[30] 1554 36
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/rdFFTtimer_0/rA_timer/Q[3] 1297 40
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[33][13] 794 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/preBflySw_0/muxQ_w[13] 1446 36
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[9][13] 2035 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[48][11] 1002 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/lut_0/T_1_00_31_0_.m23_i 1197 36
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[90][6] 1767 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[99][14] 1911 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/lut_0/T_1_00_0_31_0_.m248_2_1_1 1218 36
set_location PF_COREUART_0_0/PF_COREUART_0_0/make_TX/xmit_state[5] 1217 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/preBflySw_0/outQ[5] 1306 34
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[40][12] 867 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/genblk1.outBuff_0/outBuf_0/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R0C0/R_ADDR_0_inst 1408 7
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[40][4] 847 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/genblk1.outBuff_0/outBuf_0/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R1C0/BLK_EN_inst 1397 10
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[24][1] 1556 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.poBuf/wP_w[19] 1467 27
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[101][3] 1936 19
set_location PF_COREUART_0_0/PF_COREUART_0_0/make_RX/receive_shift.rx_bit_cnt_4[3] 1327 15
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/inPr_dly_0/genblk1.delayLine[1][5] 1347 40
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/twidLUT_1/twidLUT_0/PolarFire_uram.uram_0/OR2_rD[9] 1205 33
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/rdFFTtimer_0/stage_timer/Q_RNO[3] 1286 33
set_location PF_COREUART_0_0/PF_COREUART_0_0/make_RX/rx_state_ns_1_0_.m16_1_1 1326 12
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.poBuf/genblk1.memP/PolarFire_uram.uram_0/OR2_rD[1] 1275 27
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[68][9] 1366 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/twid_rA_0/stage_tick2[1] 1261 37
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[54][14] 559 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/preBflySw_0/outP[30] 1553 37
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/cmplx_0/genblk1.cmplx18_0/half_0/genblk1.dly_c/genblk1.delayLine[0][0] 1382 46
set_location PF_DSP_FLOW_DEMO_TOP_0/UART_IF_0/R_ADDR_lm_0[8] 1468 15
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[72][14] 1450 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/inPr_dly_0/genblk1.delayLine[2][9] 1338 40
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/genblk1.outBuff_0/outBuf_1/PolarFire_uram.uram_0/OR2_rD[5] 1428 6
set_location PF_DSP_FLOW_DEMO_TOP_0/UART_IF_0/R_ADDR[1] 1481 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/TAP_CHAIN[63].genblk1.muladd_0/FIR_DP_reg[22] 1487 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[108][13] 2010 28
set_location PF_DSP_FLOW_DEMO_TOP_0/UART_IF_0/SEL 1237 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/genblk1.outBuff_0/inQ_r[15] 1425 34
set_location PF_DSP_FLOW_DEMO_TOP_0/UART_IF_0/rfsm_srsts_i_a2_8[5] 1082 15
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[82][13] 1613 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/inBuf_wA_0/mask1_r[3] 1314 34
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[52][6] 1042 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[64][4] 1258 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/lut_0/T_1_00_31_0_.m211 1233 36
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/inBuf_rA_0/bflyA[2] 1274 43
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/rw_dly_lastStage/genblk1.delayLine[4]_3 1317 42
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/inBuf_wA_0/un1_offsetPQ_w_4 1333 33
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[56][12] 1145 16
set_location PF_DSP_FLOW_DEMO_TOP_0/UART_IF_0/DATA_OUT[3] 1396 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/preBflySw_0/outP[28] 1539 40
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.poBuf/genblk1.wEn_Q_r 1494 34
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[57][15] 1155 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.poBuf/wA_w[2] 1370 33
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[121][1] 2099 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[50][6] 636 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[44][11] 920 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[75][0] 1491 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[1][2] 464 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/genblk1.outBuff_0/outBuf_0/PolarFire_uram.uram_0/OR2_rD[27] 1619 27
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/inBuf_wA_0/mask1_shft_stage_8_i 1316 33
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[60][1] 1206 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[119][11] 2128 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[101][12] 1934 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[77][12] 1526 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.poBuf/genblk1.memQ/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R0C0/R_ADDR_1_inst 1299 34
set_location PF_DSP_FLOW_DEMO_TOP_0/FILTERCONTROL_FSM_0/COEF_RADDR[2] 1071 16
set_location PF_DSP_FLOW_DEMO_TOP_0/UART_IF_0/DATA_WADDR[4] 1057 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[35][6] 770 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.piBuf/genblk1.memQ/PolarFire_uram.uram_0/OR2_rD[3] 1286 27
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[45][14] 801 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[35][10] 781 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[27][7] 1468 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/postBflySw_0/muxP_w[3] 1401 39
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/twidLUT_1/twidLUT_0/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R1C0/R_ADDR_0_inst 1193 28
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[48][3] 700 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[103][3] 1972 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/rdFFTtimer_0/preRdValid_2_sqmuxa_1_i_a2_4 1287 39
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[6][3] 2095 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[6][10] 381 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[23][7] 1611 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[123][12] 2003 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[67][5] 1347 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[75][9] 1491 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/postBflySw_0/muxP_w[5] 1399 39
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/cmplx_0/rndHr_0/outp[1] 1373 43
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.piBuf/wQ_w[24] 1521 33
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/lut_0/T_1_00_31_0_.m147 1243 33
set_location PF_DSP_FLOW_DEMO_TOP_0/UART_IF_0/rfsm_srsts_0[6] 1200 12
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[90][11] 1739 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[12][14] 476 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[50][15] 658 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[101][10] 1948 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/lut_0/T_1_00_0_31_0_.N_89_i 1173 42
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[60][14] 506 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.poBuf/wP_w[21] 1473 27
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.piBuf/genblk1.memQ/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R0C0/BLK_EN_inst 1347 28
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[98][1] 1867 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/lut_0/T_1_00_31_0_.m6_i 1222 42
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[24][10] 1581 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[21][4] 467 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/genblk1.outBuff_0/outBuf_1/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R0C0/BLK_EN_inst 1433 7
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/postBflySw_0/muxP_w[31] 1542 36
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[61][13] 541 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[61][9] 503 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/lut_0/T_1_00_31_0_.m153_1_0 1237 33
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[37][14] 1085 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[29][9] 1401 25
set_location PF_DSP_FLOW_DEMO_TOP_0/UART_IF_0/rfsm_RNI9CI41[13] 1161 15
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/inPi_dly_0/genblk1.delayLine[2][15] 1521 37
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[123][1] 2066 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[28][12] 1443 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.poBuf/genblk1.memQ/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R1C0/BLK_EN_inst 1302 28
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.piBuf/wQ_w[28] 1524 33
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[38][13] 843 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[58][4] 1174 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[55][2] 503 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[17][12] 542 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[84][4] 1603 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[3][7] 2135 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[73][12] 1487 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/genblk1.outBuff_0/wA_r[0] 1390 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/smFft_rdy_0_sqmuxa_1 1301 36
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/cmplx_0/genblk1.cmplx18_0/half_0/genblk1.dly_d/genblk1.delayLine[0][12] 1369 40
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[91][4] 1781 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[6][5] 2104 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/outBuf_rA_r[5] 1380 34
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[20][4] 1702 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[60][12] 497 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[1][7] 478 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/genblk1.outBuff_0/outPQ[29] 1515 27
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/inQr_w[2] 1311 45
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[49][8] 1011 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.piBuf/wP_w[29] 1595 33
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[58][13] 512 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.piBuf/genblk1.memQ/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R0C1/R_ADDR_4_inst 1412 34
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[31][4] 689 16
set_location PF_COREUART_0_0/PF_COREUART_0_0/make_TX/tx_byte[5] 1358 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/twid_rA_0/timer_tick[0] 1278 37
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.piBuf/genblk1.memQ/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R1C0/R_ADDR_5_inst 1352 28
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[42][6] 873 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[28][15] 1444 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/postBflySw_0/outP[0] 1414 28
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[47][7] 754 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[42][7] 897 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[51][2] 590 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/twidLUT_1/twidLUT_0/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R1C1/R_ADDR_1_inst 1216 28
set_location PF_DSP_FLOW_DEMO_TOP_0/FILTERCONTROL_FSM_0/FIR_WR_ADDR[6] 1179 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/inPi_dly_0/genblk1.delayLine[0][13] 1557 37
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[43][7] 888 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[12][6] 2000 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.piBuf/genblk1.memP/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R0C0/R_ADDR_0_inst 1315 28
set_location PF_DSP_FLOW_DEMO_TOP_0/FILTERCONTROL_FSM_0/COEF_RADDR[3] 1072 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/rdFFTtimer_0/stage_timer/Q_n3_i_o2_RNI3TLE 1292 33
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/outP[16] 1500 37
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/genblk1.outBuff_0/outD[13] 1398 28
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/inBuf_rA_0/offsetPQ_r2[1] 1263 40
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[104][12] 2010 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[18][9] 487 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.poBuf/genblk1.memQ/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R1C2/BLK_EN_inst 1558 28
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[112][7] 2133 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/preBflySw_0/leftQ_r[18] 1411 34
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/inQr_w[7] 1330 45
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[116][1] 2137 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[17][14] 1828 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[59][7] 466 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[27][0] 616 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[1][12] 1935 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/rdFFTtimer_0/stage_timer/Q[1] 1289 34
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[71][6] 1432 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[1][0] 2008 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.piBuf/genblk1.wEn_P_r 1496 34
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/autoScale_0/bflyMonitor 1345 43
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[58][5] 461 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.poBuf/wQ_w[24] 1535 33
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[0]_1_sqmuxa_i_rep1 1146 18
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/genblk1.outBuff_0/outBuf_0/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R0C2/R_ADDR_3_inst 1618 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[76][13] 1516 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[1][2] 1982 19
set_location PF_DSP_FLOW_DEMO_TOP_0/UART_IF_0/rx_en_RNO_0 1208 15
set_location PF_DSP_FLOW_DEMO_TOP_0/UART_IF_0/DATA_WADDR[8] 1061 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[2][8] 521 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[26][13] 1515 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[13][12] 505 28
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/lut_0/T_1_00_31_0_.m137 1197 42
set_location PF_DSP_FLOW_DEMO_TOP_0/UART_IF_0/WDATA[0] 1183 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/genblk1.outBuff_0/outBuf_1/PolarFire_uram.uram_0/OR2_rD[16] 1375 27
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/inPr_dly_0/genblk1.delayLine[3][0] 1371 43
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/cmplx_0/rndHr_0/outp[5] 1377 43
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/genblk1.outBuff_0/inQ_r[1] 1416 28
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/outP[15] 1423 43
set_location PF_DSP_FLOW_DEMO_TOP_0/UART_IF_0/rfsm_nss_i_0_a2_0_4[0] 1484 15
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/outP[13] 1417 43
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[8][15] 480 13
set_location PF_DSP_FLOW_DEMO_TOP_0/FILTERCONTROL_FSM_0/FIR_WR_ENABLE 1236 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/preBflySw_0/muxP_w[28] 1545 39
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[107][10] 2054 13
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[58][9] 1159 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[36][5] 1134 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[5][10] 377 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[45][3] 803 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/twidLUT_1/twidLUT_0/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R0C0/BLK_EN_inst 1228 34
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[112][4] 2082 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/twidLUT_1/rA_r[1] 1241 37
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.piBuf/wA_w[6] 1499 33
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.poBuf/wQ_w[28] 1528 33
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/preBflySw_0/leftQ_r[19] 1430 37
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.piBuf/wQ_w[25] 1538 33
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/twid_wA_0/twid_wEn 1248 43
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/genblk1.outBuff_0/outBuf_1/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R1C2/R_ADDR_5_inst 1504 28
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[77][4] 1503 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/preBflySw_0/muxP_w[24] 1561 39
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.poBuf/wP_w[17] 1468 27
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/lut_0/T_1_00_0_31_0_.m65_1 1231 39
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[29][5] 665 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.poBuf/genblk1.memP/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R0C0/R_ADDR_4_inst 1286 28
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/lut_0/T_1_0_Or2_21 1209 36
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/inBuf_wA_0/un1_offsetPQ_w_9 1334 33
set_location PF_DSP_FLOW_DEMO_TOP_0/UART_IF_0/DATA_OUT_11_0_2_0[7] 1411 15
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/lut_0/T_1_0_Or2_13 1240 39
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[104][10] 1987 16
set_location PF_COREUART_0_0/PF_COREUART_0_0/make_TX/tx_byte[2] 1367 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[41][3] 950 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[26][10] 1508 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/preBflySw_0/rightP_r[0] 1342 28
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[24][2] 561 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[71][11] 1431 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[41][1] 857 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/genblk1.outBuff_0/outBuf_1/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R1C2/R_ADDR_4_inst 1503 28
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/postBflySw_0/muxQ_w[7] 1415 36
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[32][1] 1257 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/rdFFTtimer_0/rA_timer/tc_3_0_a2_1_RNIL7RC 1298 39
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[112][3] 2085 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/outBufA_0/rdCtl_reg 1381 40
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[16][13] 532 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[92][11] 1785 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[44][10] 853 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/preInBuf_wEn_1_sqmuxa_0_a2 1285 36
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[38][10] 1054 19
set_location PF_COREUART_0_0/PF_COREUART_0_0/make_TX/xmit_bit_sel_RNO[3] 1218 15
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[121][7] 2114 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[38][14] 842 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/postBflySw_0/outQ[2] 1412 37
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/outBuf_wEn_r 983 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/genblk1.outBuff_0/inQ_r[12] 1391 34
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[108][11] 2059 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[80][10] 1580 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[115][15] 2057 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[61][4] 447 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[12][1] 380 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[111][11] 2103 13
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[29][11] 649 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[14][0] 1899 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[48][12] 721 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[80][8] 1578 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/preBflySw_0/outQ[18] 1484 34
set_location PF_DSP_FLOW_DEMO_TOP_0/UART_IF_0/rfsm_RNO[5] 1191 15
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/inPr_dly_0/genblk1.delayLine[1][0] 1340 43
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/inPi_dly_0/genblk1.delayLine[2][3] 1482 37
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/smFft_rdy 1301 37
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/inPi_dly_0/genblk1.delayLine[3][3] 1478 37
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.poBuf/wP_w[9] 1386 24
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[93][14] 1813 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[104][6] 1998 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[45][8] 928 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/postBflySw_0/outQ[31] 1532 37
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[24][14] 628 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[48][15] 725 25
set_location PF_COREUART_0_0/PF_COREUART_0_0/make_CLOCK_GEN/make_xmit_clock.xmit_cntr_3_1.CO0 1374 15
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/genblk1.outBuff_0/outD[3] 1419 7
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[104][5] 1977 19
set_location reset_sync_0/reset_sync_0/dff_8 1711 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[0][11] 700 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/lut_0/T_1_00_0_31_0_.m146_2_0 1185 39
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[63][10] 1276 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[22][15] 1637 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[80][0] 1555 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[126][0] 1278 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[50][13] 627 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/lut_0/T_1_00_31_0_.m60 1232 36
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[46][0] 747 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/inBuf_rA_0/un1_offsetPQ_w_4 1271 42
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[56][0] 1135 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[37][2] 1079 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[49][4] 666 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/genblk1.outBuff_0/outBuf_0/PolarFire_uram.uram_0/OR2_rD[9] 1397 6
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[11][11] 358 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[102][14] 1949 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[18][10] 1784 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[33][2] 1229 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/outP[15] 1454 39
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[10][5] 386 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.poBuf/genblk1.memQ/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R0C0/R_ADDR_5_inst 1293 28
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[54][3] 1098 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/outP[23] 1562 36
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/rdFFTtimer_0/bit_dly_3/genblk1.delayLine[1]_3 1288 36
set_location PF_COREUART_0_0/PF_COREUART_0_0/make_CLOCK_GEN/genblk1.baud_cntr_one 1232 28
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[123][7] 2150 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/lut_0/T_1_00_0_31_0_.m59_2_0_1 1242 42
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.poBuf/wQ_w[25] 1537 33
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.piBuf/wP_w[12] 1431 27
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[6][15] 2068 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[55][5] 460 16
set_location PF_COREUART_0_0/PF_COREUART_0_0/make_CLOCK_GEN/genblk1.baud_cntr_RNIK0141[10] 1251 27
set_location PF_COREUART_0_0/PF_COREUART_0_0/make_CLOCK_GEN/genblk1.baud_cntr_RNI54T51[12] 1257 27
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[84][3] 1619 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[7][9] 2080 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/inBuf_ldA_0/ldCount/Q_lm_0[0] 1367 36
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[111][9] 2126 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[74][1] 1473 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[46][13] 787 19
set_location PF_DSP_FLOW_DEMO_TOP_0/UART_IF_0/rfsm[12] 1232 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[1][14] 513 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[34][15] 808 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/postBflySw_0/leftQ_r[27] 1528 43
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[34][13] 807 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[0][8] 885 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/postBflySw_0/muxP_w[0] 1409 36
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[51][5] 598 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.piBuf/genblk1.memP/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R1C2/R_ADDR_1_inst 1600 37
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.poBuf/genblk1.memQ/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R1C0/R_ADDR_4_inst 1301 28
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.piBuf/genblk1.memQ/PolarFire_uram.uram_0/OR2_rD[13] 1405 33
set_location PF_COREUART_0_0/PF_COREUART_0_0/make_RX/rx_byte[5] 1290 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/genblk1.outBuff_0/inP_r[28] 1603 37
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[44][3] 908 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[38][9] 793 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.piBuf/wP_w[27] 1601 33
set_location PF_COREUART_0_0/PF_COREUART_0_0/make_RX/receive_shift.rx_bit_cnt_4[1] 1323 15
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[70][8] 1400 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/genblk1.outBuff_0/outBuf_1/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R1C0/R_ADDR_1_inst 1435 10
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/lut_0/T_1_00_31_0_.N_233_i 1230 39
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[34][8] 753 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[122][4] 2164 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/inBuf_rA_0/mask2_r[4] 1263 43
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/inPi_dly_0/genblk1.delayLine[2][2] 1480 40
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[87][10] 1709 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/genblk1.outBuff_0/inQ_r[13] 1393 34
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/twidLUT_1/twidLUT_0/PolarFire_uram.uram_0/OR2_rD[16] 1236 36
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/genblk1.outBuff_0/outBuf_1/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R0C0/R_ADDR_0_inst 1407 7
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[101][7] 1947 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/inPi_dly_0/genblk1.delayLine[3][2] 1486 40
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.poBuf/genblk1.memP/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R0C2/R_ADDR_3_inst 1538 28
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[40][13] 868 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[5][2] 418 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/preBflySw_0/muxQ_w[28] 1542 39
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/postBflySw_0/muxP_w[16] 1467 36
set_location PF_DSP_FLOW_DEMO_TOP_0/UART_IF_0/DATA_OUT[4] 1424 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[22][13] 1636 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/twid_rA_0/tA[4] 1264 37
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/outBufA_0/outBuf_rA_0/Q[5] 1393 40
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[43][11] 916 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[36][15] 861 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[25][5] 559 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/genblk1.outBuff_0/outBuf_0/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R1C1/R_ADDR_3_inst 1407 28
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/twid_rA_0/twid_rA_0.tA_w_7_RNO 1276 36
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[53][10] 1109 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/postBflySw_0/rightP_r[1] 1414 40
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/postBflySw_0/outQ[1] 1411 37
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.piBuf/genblk1.memP/PolarFire_uram.uram_0/OR2_rD[14] 1478 36
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[68][3] 1352 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/preBflySw_0/muxQ_w[24] 1570 39
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/genblk1.outBuff_0/inQ_r[31] 1525 34
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[68][7] 1363 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[46][10] 790 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.piBuf/genblk1.memQ/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R1C0/BLK_EN_inst 1354 28
set_location PF_DSP_FLOW_DEMO_TOP_0/UART_IF_0/WEN_RNO_1 1300 18
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[39][4] 1016 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[26][3] 592 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[29][5] 1386 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.poBuf/wA_w[4] 1378 33
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/preBflySw_0/muxQ_w[30] 1550 36
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[26][7] 1507 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.poBuf/genblk1.memP/PolarFire_uram.uram_0/OR2_rD[17] 1456 33
set_location PF_DSP_FLOW_DEMO_TOP_0/UART_IF_0/WDATA[12] 1226 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[113][9] 2157 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/inBuf_rA_0/mask1_r[5] 1260 43
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[55][10] 526 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/lut_0/T_1_00_31_0_.m250 1196 36
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/outBufA_0/outBuf_rA_0/Q[7] 1385 40
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/outP[21] 1505 37
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/lut_0/T_1_00_31_0_.m173 1184 36
set_location PF_COREUART_0_0/PF_COREUART_0_0/make_RX/rcv_cnt.receive_count_3_i_o2[2] 1322 12
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/outP[21] 1473 33
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/preBflySw_0/rightP_r[16] 1458 34
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[110][2] 2087 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[28][2] 1417 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/cmplx_0/genblk1.cmplx18_0/half_1/genblk1.dly_c/genblk1.delayLine[0][13] 1430 46
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/preBflySw_0/muxP_w[15] 1459 39
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[27][12] 1472 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/genblk1.outBuff_0/outBuf_1/PolarFire_uram.uram_0/OR2_rD[27] 1516 27
set_location PF_DSP_FLOW_DEMO_TOP_0/UART_IF_0/DATA_WADDR[7] 1060 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/postBflySw_0/muxQ_w[1] 1411 36
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[42][13] 893 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.poBuf/genblk1.memP/PolarFire_uram.uram_0/OR2_rD[30] 1549 36
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.piBuf/genblk1.memQ/PolarFire_uram.uram_0/OR2_rD[20] 1417 36
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[103][7] 1995 16
set_location PF_ccc_0_0/PF_ccc_0_0/clkint_0/U0_RGB1 576 39
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[64][2] 1256 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.piBuf/genblk1.memQ/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R1C2/BLK_EN_inst 1530 28
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/genblk1.outBuff_0/inQ_r[6] 1421 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/inPr_dly_0/genblk1.delayLine[0][3] 1317 40
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[106][1] 1997 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[42][2] 884 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[7][8] 351 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.poBuf/genblk1.memQ/PolarFire_uram.uram_0/OR2_rD[28] 1559 36
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/cmplx_0/genblk1.cmplx18_0/half_0/genblk1.dly_d/genblk1.delayLine[0][14] 1372 40
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/genblk1.outBuff_0/outBuf_0/PolarFire_uram.uram_0/OR2_rD[20] 1406 27
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/twidLUT_1/twidLUT_0/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R1C2/R_ADDR_5_inst 1245 34
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/ctrl_dly_0/genblk1.delayLine[1][1] 1353 43
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.piBuf/genblk1.memP/PolarFire_uram.uram_0/OR2_rD[3] 1316 27
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/slowClock_0/divider_RNO[0] 1248 45
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/cmplx_0/rndHr_0/outp[12] 1384 43
set_location PF_DSP_FLOW_DEMO_TOP_0/UART_IF_0/COEF_WADDR[2] 1114 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[33][14] 1241 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.poBuf/wQ_w[8] 1411 24
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/inBuf_wA_0/addrP_w[3] 1315 33
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[17][2] 1802 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[5][7] 375 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[34][12] 1191 19
set_location PF_DSP_FLOW_DEMO_TOP_0/UART_IF_0/rfsm_srsts_0[14] 1277 15
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[42][15] 943 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/postBflySw_0/leftQ_r[30] 1516 43
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/twidLUT_1/twidLUT_0/PolarFire_uram.uram_0/OR2_rD[12] 1232 33
set_location PF_DSP_FLOW_DEMO_TOP_0/UART_IF_0/WDATA[6] 1210 13
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/outP[16] 1457 33
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/rdFFTtimer_0/preRdValid_2_sqmuxa_1_i_0 1286 39
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[22][8] 1626 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[13][2] 1951 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/inBuf_rA_0/mask1_r[1] 1289 43
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/inPi_dly_0/genblk1.delayLine[0][4] 1484 37
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[90][3] 1762 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[31][15] 1279 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/preBflySw_0/muxP_w[22] 1560 36
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/genblk1.outBuff_0/outBuf_0/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R0C1/R_ADDR_1_inst 1386 28
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/wTimer_dly_2/genblk1.delayLine[1][1] 1349 37
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/preBflySw_0/rightP_r[14] 1453 40
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/outP[8] 1412 43
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/cmplx_0/genblk1.cmplx18_0/half_1/genblk1.dly_c/genblk1.delayLine[0][10] 1321 46
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/genblk1.outBuff_0/outBuf_1/PolarFire_uram.uram_0/OR2_rD[31] 1522 27
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[37][9] 1111 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/rdFFTtimer_0/rA_timer/Q_lm_0[3] 1297 39
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/genblk1.outBuff_0/inP_r[2] 1401 10
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[69][5] 1371 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/genblk1.outBuff_0/outBuf_0/PolarFire_uram.uram_0/OR2_rD[26] 1628 27
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/genblk1.outBuff_0/wA_r[3] 1383 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[30][3] 1351 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[92][12] 1805 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[33][9] 1231 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[46][7] 786 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[47][1] 741 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/cmplx_0/rndHi_0/outp[6] 1489 43
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[76][7] 1506 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[54][5] 1097 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[39][6] 1037 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/inPr_dly_0/genblk1.delayLine[2][5] 1352 40
set_location PF_COREUART_0_0/PF_COREUART_0_0/make_TX/txrdy_int_RNI81SD 1261 18
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[43][1] 883 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[60][7] 494 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[32][7] 1258 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[10][5] 1991 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[115][1] 2142 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[115][10] 2160 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[71][15] 1437 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/genblk1.outBuff_0/outBuf_1/PolarFire_uram.uram_0/OR2_rD[8] 1429 6
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/postBflySw_0/outQ[28] 1524 37
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/twidLUT_1/twidLUT_0/PolarFire_uram.uram_0/OR2_rD[26] 1258 36
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/twid_rA_0/timer_tick[2] 1274 37
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/lut_0/T_1_00_0_31_0_.m137 1184 39
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[88][2] 1701 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[114][13] 2071 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[13][14] 1947 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[34][0] 740 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[14][12] 1925 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/lut_0/T_1_00_0_31_0_.m186_2 1183 33
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[98][5] 1866 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[126][8] 1288 25
set_location PF_DSP_FLOW_DEMO_TOP_0/UART_IF_0/DATA_OUT_11[5] 1404 15
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/twidLUT_1/twidLUT_0/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R0C1/R_ADDR_1_inst 1219 28
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[108][6] 2058 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/postBflySw_0/outP[25] 1565 37
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[106][9] 2025 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[59][12] 525 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/lut_0/T_1_0_Or2_4 1234 33
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[31][11] 1328 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[32][0] 1255 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/rw_dly_lastStage/genblk1.delayLine[3]_3 1308 42
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[58][8] 1165 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[11][15] 2009 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[32][14] 724 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[54][0] 558 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/inPr_dly_0/genblk1.delayLine[0][2] 1313 40
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[53][0] 1085 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/twidLUT_1/twidLUT_0/PolarFire_uram.uram_0/OR2_rD[30] 1250 33
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.poBuf/genblk1.memP/PolarFire_uram.uram_0/OR2_rD[4] 1263 33
set_location PF_DSP_FLOW_DEMO_TOP_0/UART_IF_0/DATA_OUT_cnst_i_a3[1] 1415 15
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[108][5] 2039 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/twid_rA_0/timer_tick_RNI2I2R[6] 1266 36
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[78][10] 1546 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[42][13] 919 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/preBflySw_0/outP[20] 1487 37
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.piBuf/genblk1.memQ/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R0C0/R_ADDR_1_inst 1328 37
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/preBflySw_0/pipe1 1348 43
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/preBflySw_0/rightP_r[27] 1556 28
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/rdFFTtimer_0/bit_dly_0/genblk1.delayLine[2] 1360 40
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[76][14] 1514 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/lut_0/T_1_0_Or2_7 1208 36
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[16][4] 400 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/preBflySw_0/muxQ_w[3] 1288 27
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/preBflySw_0/muxP_w[13] 1440 36
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[50][1] 1015 25
set_location PF_DSP_FLOW_DEMO_TOP_0/UART_IF_0/DATA_OUT_11_0_1[4] 1437 15
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/inPi_dly_0/genblk1.delayLine[1][3] 1477 37
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/preBflySw_0/outP[4] 1315 40
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[56][15] 562 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[37][12] 830 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/genblk1.outBuff_0/outPQ[3] 1419 6
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/postBflySw_0/rightP_r[7] 1398 37
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/postBflySw_0/muxQ_w[17] 1472 36
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.poBuf/genblk1.memQ/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R1C1/R_ADDR_1_inst 1460 28
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[46][0] 951 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[76][10] 1505 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/inBuf_rA_0/offsetPQ_r1[3] 1268 40
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[64][8] 1292 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[20][7] 482 28
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[11][15] 498 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[19][1] 1710 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[2][3] 482 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[54][13] 560 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[5][11] 374 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[21][10] 492 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[28][9] 642 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[68][0] 1350 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/lut_0/T_1_00_31_0_.m172 1183 36
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[29][0] 664 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[86][7] 1665 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[11][11] 2024 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/inPr_dly_0/genblk1.delayLine[3][12] 1424 43
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[17][8] 1832 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/lut_0/T_1_0_Or2_23 1207 36
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[25][2] 1520 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.piBuf/genblk1.memQ/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R1C0/R_ADDR_3_inst 1353 28
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/preBflySw_0/outP[5] 1307 34
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/rdFFTtimer_0/stage_timer/Q_RNO[1] 1289 33
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/lut_0/T_1_00_31_0_.m146 1231 36
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/outBuf_wA_r[1] 1361 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/inQi_w[8] 1393 45
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[39][8] 1033 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[13][8] 1966 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/lut_0/T_1_00_0_31_0_.m100 1221 39
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[47][12] 756 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/inBuf_ldA_0/ldCount/Q[6] 1364 37
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/outP[20] 1504 37
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.piBuf/genblk1.memP/PolarFire_uram.uram_0/OR2_rD[27] 1610 27
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/twidLUT_1/twidLUT_0/PolarFire_uram.uram_0/OR2_rD[22] 1256 33
set_location PF_DSP_FLOW_DEMO_TOP_0/FILTERCONTROL_FSM_0/FIR_WR_ADDR[9] 1182 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/genblk1.outBuff_0/outPQ[22] 1508 27
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[85][15] 1657 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[96][8] 1848 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[18][10] 443 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[54][7] 1079 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.poBuf/genblk1.memP/PolarFire_uram.uram_0/OR2_rD[9] 1274 33
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[21][2] 1653 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[44][2] 832 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[34][3] 739 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/inBuf_wEn 1495 34
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[16][14] 502 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/inBuf_rA_0/addrP_w[2] 1291 42
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.piBuf/genblk1.memQ/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R0C2/R_ADDR_4_inst 1564 34
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/preBflySw_0/outP[1] 1324 28
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/inBuf_rA_0/mask2_r[6] 1268 43
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/genblk1.outBuff_0/outBuf_1/PolarFire_uram.uram_0/OR2_rD[29] 1514 27
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[120][10] 2107 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[23][3] 542 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[57][3] 535 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/postBflySw_0/leftQ_r[19] 1480 43
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/inBuf_wA_0/mask1_shft_stage_10 1318 33
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[100][4] 1898 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[79][4] 1538 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[53][3] 538 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[33][12] 793 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[32][1] 699 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[10][3] 2048 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/lut_0/T_1_00_0_31_0_.m200 1220 39
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/genblk1.outBuff_0/outPQ[7] 1398 6
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[16][10] 408 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[125][0] 1563 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[8][0] 410 13
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/inBuf_wA_0/addrP_r2[2] 1320 34
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/preBflySw_0/muxQ_w[22] 1570 36
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[65][5] 1278 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/inPi_dly_0/genblk1.delayLine[1][2] 1478 40
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[34][2] 707 16
set_location PF_COREUART_0_0/PF_COREUART_0_0/make_RX/rx_byte[7] 1295 16
set_location PF_DSP_FLOW_DEMO_TOP_0/UART_IF_0/R_ADDR[2] 1483 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[4][7] 2070 19
set_location PF_COREUART_0_0/PF_COREUART_0_0/make_CLOCK_GEN/genblk1.baud_cntr[12] 1253 28
set_location PF_DSP_FLOW_DEMO_TOP_0/UART_IF_0/R_ADDR[0] 1470 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[22][8] 505 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/preInBuf_wEn 1291 37
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/twid_wA_0/slowTimer/Q[2] 1251 43
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.poBuf/genblk1.memP/PolarFire_uram.uram_0/OR2_rD[2] 1320 27
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/genblk1.outBuff_0/outBuf_0/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R1C0/R_ADDR_5_inst 1396 10
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[76][2] 1499 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/twidLUT_1/twidLUT_0/PolarFire_uram.uram_0/OR2_rD[1] 1209 33
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.piBuf/genblk1.memP/PolarFire_uram.uram_0/OR2_rD[30] 1553 36
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[84][1] 1616 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[36][2] 1132 25
set_location PF_COREUART_0_0/PF_COREUART_0_0/make_TX/xmit_state_RNIN40J[2] 1353 15
set_location PF_COREUART_0_0/PF_COREUART_0_0/make_RX/rx_state_ns_1_0_.m14 1313 12
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/rdFFTtimer_0/rA_timer/tc_r_3_0_a2 1284 39
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/genblk1.outBuff_0/outBuf_0/PolarFire_uram.uram_0/OR2_rD[29] 1606 33
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.piBuf/genblk1.memP/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R1C1/R_ADDR_0_inst 1480 34
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[87][5] 1684 19
set_location PF_DSP_FLOW_DEMO_TOP_0/UART_IF_0/FFT_RE_REN 1440 15
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/inBuf_wA_0/mask1_shft_stage_5_i 1321 33
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/tA_r[4] 1251 37
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[97][9] 1872 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[40][10] 860 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/rdFFTtimer_0/bit_dly_0/genblk1.delayLine[1] 1361 40
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[22][15] 553 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/wTimer_dly_2/genblk1.delayLine[0][3] 1344 37
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[63][0] 521 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[68][6] 1362 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/postBflySw_0/rightP_r[20] 1473 37
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[90][2] 1760 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[20][1] 457 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[3][8] 2056 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FILTERCONTROL_FSM_0/FIR_WR_ADDR[0] 1173 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/lut_0/T_1_00_0_31_0_.m60 1219 39
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/twidLUT_1/twidLUT_0/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R0C2/R_ADDR_1_inst 1250 34
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[36][13] 817 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/outP[27] 1511 37
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/inBuf_rA_0/un1_offsetPQ_w_9 1271 39
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[19][9] 1734 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/genblk1.outBuff_0/outD[9] 1395 7
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/outQ[11] 1399 43
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/autoScale_0/ldMonitor 1344 28
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/preBflySw_0/muxQ_w[16] 1463 33
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[73][7] 1455 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.piBuf/wQ_w[5] 1412 27
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.poBuf/genblk1.memP/PolarFire_uram.uram_0/OR2_rD[22] 1567 36
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[39][15] 1048 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/lut_0/T_1_00_31_0_.m6 1172 39
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/inPr_dly_0/genblk1.delayLine[3][7] 1365 40
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[12][0] 405 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[34][11] 1205 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/lut_0/T_1_00_0_31_0_.m206_2 1241 42
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/genblk1.outBuff_0/outPQ[23] 1534 27
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/genblk1.outBuff_0/outBuf_0/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R0C2/BLK_EN_inst 1612 34
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[58][2] 1173 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/preBflySw_0/muxQ_w[5] 1306 33
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/inQr_w[15] 1439 42
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/genblk1.outBuff_0/inQ_r[24] 1522 34
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[76][11] 1504 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/cmplx_0/genblk1.cmplx18_0/half_0/genblk1.dly_d/genblk1.delayLine[0][11] 1269 34
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/smStartLoad_s 1348 36
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[3][8] 435 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[65][11] 1310 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[117][13] 2141 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/rdFFTtimer_0/rStage_r[2] 1293 34
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.poBuf/genblk1.memQ/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R0C1/R_ADDR_1_inst 1413 34
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[25][0] 592 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[0][3] 1041 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[88][15] 1711 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.poBuf/genblk1.memP/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R1C1/R_ADDR_4_inst 1454 34
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/outP[5] 1300 33
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[50][14] 653 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[52][6] 552 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FILTERCONTROL_FSM_0/fsm_RNILMKI1[4] 1256 15
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/inBuf_wA_0/timer_r[2] 1326 34
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[27][1] 1447 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/preBflySw_0/outQ[8] 1325 40
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/preBflySw_0/outQ[26] 1567 34
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/postBflySw_0/muxQ_w[22] 1535 36
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/genblk1.outBuff_0/inP_r[31] 1596 34
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/preBflySw_0/muxP_w[21] 1418 36
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/outQ[12] 1460 33
set_location PF_DSP_FLOW_DEMO_TOP_0/UART_IF_0/rfsm_RNO[3] 1202 15
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[23][1] 1578 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[31][11] 688 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[66][4] 1317 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[51][13] 597 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[84][12] 1635 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.poBuf/genblk1.memQ/PolarFire_uram.uram_0/OR2_rD[5] 1297 33
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[87][9] 1708 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/twidLUT_1/twidLUT_0/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R1C1/R_ADDR_0_inst 1215 28
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/genblk1.outBuff_0/inQ_r[0] 1423 10
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/TAP_CHAIN[63].genblk1.muladd_0/FIR_DP_reg[25] 1454 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/preBflySw_0/outQ[10] 1340 37
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/autoScale_0/upScale_4 1352 42
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[13][4] 355 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[124][2] 2130 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[19][15] 1763 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/outP[31] 1574 33
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/genblk1.outBuff_0/outBuf_1/PolarFire_uram.uram_0/OR2_rD[23] 1524 27
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[94][6] 1831 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[14][11] 1928 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[105][1] 1983 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[82][6] 1615 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/inPr_dly_0/genblk1.delayLine[2][0] 1369 43
set_location PF_DSP_FLOW_DEMO_TOP_0/FILTERCONTROL_FSM_0/fsm_RNI8H482[2] 1081 15
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[47][10] 1001 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.poBuf/wQ_w[9] 1388 24
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/inPi_w[1] 1483 39
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[50][12] 657 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[44][4] 907 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/inBuf_rA_0/mask2_r[1] 1292 43
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[5][14] 2050 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[18][4] 1797 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[43][0] 892 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/rdFFTtimer_0/rA_timer/Q_lm_0[5] 1294 39
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[20][14] 560 28
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/postBflySw_0/leftQ_r[10] 1411 40
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/lut_0/T_1_00_0_31_0_.m191_i 1196 42
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[75][4] 1490 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[16][11] 423 16
set_location PF_DSP_FLOW_DEMO_TOP_0/UART_IF_0/COEF_WADDR[3] 1131 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[78][0] 1519 19
set_location PF_DSP_FLOW_DEMO_TOP_0/UART_IF_0/rfsm_RNIO8221[3] 1024 15
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/postBflySw_0/outQ[26] 1525 37
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/inPr_dly_0/genblk1.delayLine[1][7] 1324 40
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[83][7] 1611 16
set_location PF_COREUART_0_0/PF_COREUART_0_0/make_TX/xmit_state_RNO[3] 1215 15
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/lut_0/T_1_00_0_31_0_.m106_1_2 1220 33
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[16][2] 1863 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[38][6] 824 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/genblk1.outBuff_0/outD[23] 1534 28
set_location PF_COREUART_0_0/PF_COREUART_0_0/make_TX/xmit_state_ns[2] 1222 15
set_location PF_DSP_FLOW_DEMO_TOP_0/UART_IF_0/R_ADDR[5] 1465 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[92][0] 1794 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[58][4] 600 16
set_location PF_DSP_FLOW_DEMO_TOP_0/UART_IF_0/rfsmce[11] 1195 15
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[93][8] 1816 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[32][7] 714 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[99][10] 1914 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[12][7] 389 13
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[87][11] 1707 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[110][11] 2074 13
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[55][11] 1119 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[78][9] 1545 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[36][9] 1138 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[44][5] 833 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[22][4] 1607 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FILTERCONTROL_FSM_0/fsm_RNIR6412[2] 1218 18
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/preBflySw_0/muxQ_w[19] 1478 33
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[63][13] 1262 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.piBuf/genblk1.memP/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R0C0/R_ADDR_3_inst 1317 28
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/init_rear_0/inp_tick 1345 37
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[7][3] 398 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[12][3] 386 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/postBflySw_0/rightP_r[10] 1392 40
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/postBflySw_0/outQ[22] 1535 37
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/rdFFTtimer_0/rStage_r_RNO[2] 1293 33
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/inBuf_wA_0/mask1_shft_stage_9_i 1309 33
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[46][1] 797 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[103][12] 1994 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.poBuf/genblk1.memQ/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R1C1/R_ADDR_5_inst 1444 28
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.piBuf/genblk1.memP/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R0C1/R_ADDR_0_inst 1493 28
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[23][13] 1612 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/TAP_CHAIN[63].genblk1.muladd_0/FIR_DP_reg[18] 1528 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[64][1] 1254 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.poBuf/genblk1.memP/PolarFire_uram.uram_0/CFG2_BLKZ0[1] 1491 33
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/preBflySw_0/leftQ_r[7] 1339 28
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/inPi_w[9] 1555 39
set_location PF_DSP_FLOW_DEMO_TOP_0/UART_IF_0/rfsm_nss_i_0_a2_0[0] 1448 15
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/genblk1.outBuff_0/outPQ[30] 1517 27
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[86][4] 1652 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[125][8] 1901 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[105][9] 2020 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/outQ[8] 1396 43
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.piBuf/wP_w[6] 1382 33
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[37][10] 1110 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/preBflySw_0/rightP_r[13] 1440 37
set_location PF_DSP_FLOW_DEMO_TOP_0/FILTERCONTROL_FSM_0/fsm_ns_4_0_.m38_i_i_o2_4 1259 15
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[51][0] 1024 25
set_location PF_DSP_FLOW_DEMO_TOP_0/UART_IF_0/WDATA[7] 1207 13
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.piBuf/genblk1.wA_r[3] 1364 34
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/genblk1.outBuff_0/outBuf_1/PolarFire_uram.uram_0/OR2_rD[12] 1367 27
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/inBuf_wA_0/bflyA[4] 1348 34
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[25][14] 663 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[73][2] 1456 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[9][1] 2035 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[121][13] 2122 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[49][9] 683 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[60][3] 944 16
set_location PF_DSP_FLOW_DEMO_TOP_0/UART_IF_0/R_ADDR_lm_0[2] 1483 15
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/outQ[10] 1398 43
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[5][6] 1595 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/lut_0/T_1_00_31_0_.m236 1219 33
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/genblk1.outBuff_0/outBuf_0/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R1C2/R_ADDR_3_inst 1612 28
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[79][14] 1550 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[49][6] 673 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[44][8] 838 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[12][8] 393 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[63][14] 530 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[50][6] 1038 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[122][12] 2041 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[64][12] 975 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/lut_0/T_1_00_31_0_.m160 1239 39
set_location PF_COREUART_0_0/PF_COREUART_0_0/make_CLOCK_GEN/genblk1.baud_cntr[11] 1256 28
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[61][15] 494 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/datai_re_r[4] 1423 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/autoScale_0/bflyMonitor_RNO 1344 42
set_location PF_DSP_FLOW_DEMO_TOP_0/FILTERCONTROL_FSM_0/FFT_WADDR[3] 1251 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.poBuf/genblk1.memP/PolarFire_uram.uram_0/OR2_rD[20] 1470 33
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[58][9] 484 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[22][6] 516 16
set_location PF_DSP_FLOW_DEMO_TOP_0/UART_IF_0/COEF_WADDR[7] 1134 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.poBuf/genblk1.memP/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R0C1/R_ADDR_4_inst 1478 28
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/lut_0/T_1_0_Or2_3 1230 33
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/postBflySw_0/muxQ_w[21] 1461 36
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[58][1] 718 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[17][10] 1830 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[65][10] 1309 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/outP[25] 1552 33
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[53][13] 1094 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/preBflySw_0/muxQ_w[21] 1403 36
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/inPi_w[2] 1476 39
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/rStage_dly2/genblk1.delayLine[0][1] 1284 34
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/preBflySw_0/rightP_r[15] 1459 40
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[5][4] 2107 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.piBuf/wP_w[14] 1460 27
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[9][15] 1970 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/cmplx_0/genblk1.cmplx18_0/half_0/genblk1.dly_d/genblk1.delayLine[0][7] 1271 34
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[16][8] 1842 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.poBuf/genblk1.memP/PolarFire_uram.uram_0/OR2_rD[25] 1546 33
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[111][2] 2137 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[15][4] 1864 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/genblk1.outBuff_0/inP_r[7] 1381 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/inBuf_wA_0/timer_r[6] 1319 34
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/lut_0/T_1_00_0_31_0_.m206_2_1_0 1240 42
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/genblk1.outBuff_0/outBuf_1/PolarFire_uram.uram_0/OR2_rD[9] 1418 6
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[112][1] 2113 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.piBuf/genblk1.memQ/PolarFire_uram.uram_0/OR2_rD[22] 1566 33
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[109][10] 2068 13
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/genblk1.outBuff_0/outBuf_0/PolarFire_uram.uram_0/OR2_rD[1] 1406 6
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/lut_0/T_1_00_0_31_0_.m278 1242 33
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.poBuf/genblk1.memP/PolarFire_uram.uram_0/OR2_rD[28] 1545 33
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/lut_0/T_1_00_31_0_.N_121_i 1195 36
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[19][14] 542 28
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[61][11] 464 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[72][5] 1411 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[11][4] 1983 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[21][3] 491 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.piBuf/wP_w[18] 1470 27
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[26][2] 591 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[55][4] 475 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/inPr_dly_0/genblk1.delayLine[2][11] 1336 37
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[56][3] 520 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[21][13] 552 28
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[68][13] 1345 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/postBflySw_0/outQ[29] 1439 37
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[63][4] 1240 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[21][14] 1674 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/inBuf_rA_0/timer_bit0_r2 1278 43
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/genblk1.outBuff_0/inQ_r[17] 1436 34
set_location PF_DSP_FLOW_DEMO_TOP_0/FILTERCONTROL_FSM_0/FFT_I_VALID_RNO_0 1246 15
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[70][11] 1363 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/lut_0/T_1_0_Or2_5 1206 36
set_location PF_COREUART_0_0/PF_COREUART_0_0/make_RX/receive_count_RNO[1] 1308 12
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/outQ[17] 1501 43
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[38][11] 1041 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[51][4] 595 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.piBuf/genblk1.memP/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R1C2/R_ADDR_4_inst 1599 37
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[95][13] 1851 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[43][13] 892 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/outBufA_0/outBuf_wA[1] 1352 37
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/lut_0/T_1_00_0_31_0_.m79 1208 39
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/outQ[31] 1579 33
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.piBuf/genblk1.memP/PolarFire_uram.uram_0/OR2_rD[26] 1611 33
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[89][13] 1762 25
set_location PF_COREUART_0_0/PF_COREUART_0_0/make_TX/tx_byte[6] 1360 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/datai_re_r[9] 1402 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[40][6] 858 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.piBuf/genblk1.memQ/PolarFire_uram.uram_0/OR2_rD[10] 1339 36
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[113][2] 2148 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[92][7] 1783 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.piBuf/wQ_w[3] 1416 27
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/inBuf_rA_0/mask1_r[0] 1266 40
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[40][7] 857 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[120][3] 2151 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.poBuf/genblk1.memQ/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R0C1/R_ADDR_5_inst 1438 28
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[55][10] 1118 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.poBuf/genblk1.memQ/PolarFire_uram.uram_0/OR2_rD[18] 1410 33
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/rStage_dly2/genblk1.delayLine[0][0] 1291 34
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/twidLUT_1/twidLUT_0/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R0C0/R_ADDR_3_inst 1205 34
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/twidLUT_1/twidLUT_0/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R1C2/R_ADDR_4_inst 1247 34
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[45][15] 956 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[0]_1_sqmuxa_i_fast 1227 18
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[31][15] 711 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/datai_re_r[7] 1381 34
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/outQ[9] 1335 39
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/outQ[22] 1562 33
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/inBuf_wA_0/addrP_w[4] 1310 33
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/inPi_w[12] 1551 36
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.piBuf/wQ_w[23] 1533 33
set_location PF_DSP_FLOW_DEMO_TOP_0/UART_IF_0/OEN 1224 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/lut_0/T_1_00_0_31_0_.N_199_i 1218 39
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[17][0] 1807 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.poBuf/genblk1.memP/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R1C0/R_ADDR_1_inst 1277 28
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.poBuf/wP_w[11] 1434 27
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[13][0] 1950 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/lut_0/T_1_00_31_0_.m80 1217 36
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[12][6] 392 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/rdFFTtimer_0/rA_timer/Q_lm_0[4] 1285 39
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/cmplx_0/genblk1.cmplx18_0/half_0/genblk1.dly_c/genblk1.delayLine[0][4] 1389 46
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[117][6] 2161 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[48][8] 1000 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[99][15] 1910 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[33][15] 1240 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[27][14] 638 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[38][10] 818 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[18][11] 1793 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[25][12] 666 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FILTERCONTROL_FSM_0/FFT_WADDR[0] 1248 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[64][9] 996 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[109][12] 2065 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[71][7] 1430 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[56][3] 1137 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[10][11] 357 19
set_location PF_DSP_FLOW_DEMO_TOP_0/UART_IF_0/DATA_OUT_11_0_2_0[1] 1412 15
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.piBuf/genblk1.memQ/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R1C1/R_ADDR_1_inst 1430 28
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/rdFFTtimer_0/rA_timer/Q[2] 1302 40
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[86][3] 1651 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[36][14] 834 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[124][11] 2156 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[55][9] 525 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/postBflySw_0/outP[10] 1397 40
set_location PF_COREUART_0_0/PF_COREUART_0_0/make_RX/rx_bit_cnt[2] 1328 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[91][14] 1790 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[58][13] 1168 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[100][2] 1900 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/lut_0/T_1_00_0_31_0_.m69 1230 36
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/preBflySw_0/leftQ_r[1] 1304 34
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/outP[26] 1570 33
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[84][8] 1625 19
set_location PF_DSP_FLOW_DEMO_TOP_0/UART_IF_0/rfsm[13] 1197 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/genblk1.outBuff_0/rAmsb_r1 1395 28
set_location PF_DSP_FLOW_DEMO_TOP_0/UART_IF_0/rfsm_RNIMMIB1[13] 1085 15
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/preSwCross_r 1313 43
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[83][4] 1600 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[55][1] 1078 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FILTERCONTROL_FSM_0/COEF_RD_ENABLE_1 1060 18
set_location PF_DSP_FLOW_DEMO_TOP_0/UART_IF_0/rx_en 1209 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[76][1] 1492 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.piBuf/wP_w[15] 1471 27
set_location PF_DSP_FLOW_DEMO_TOP_0/UART_IF_0/DATA_OUT_11_0_1_0[3] 1395 15
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/lut_0/T_1_00_31_0_.N_180_i 1182 33
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[20][11] 1723 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[36][10] 798 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[89][5] 1735 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[54][2] 497 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[122][0] 2154 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[51][9] 602 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/genblk1.outBuff_0/inP_r[18] 1439 28
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[124][14] 2043 19
set_location PF_DSP_FLOW_DEMO_TOP_0/UART_IF_0/DATA_OUT_11_0_2[5] 1434 15
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[46][3] 957 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[99][9] 1911 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[125][12] 1688 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[123][14] 2042 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[51][1] 589 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[36][8] 786 16
set_location PF_COREUART_0_0/PF_COREUART_0_0/make_TX/xmit_bit_sel[2] 1365 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[107][8] 2053 13
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[26][1] 1491 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[27][4] 615 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[3][9] 2088 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[84][0] 1599 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[13][15] 1961 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/cmplx_0/rndHi_0/outp[12] 1495 43
set_location PF_DSP_FLOW_DEMO_TOP_0/UART_IF_0/DATA_OUT_11[1] 1406 15
set_location PF_DSP_FLOW_DEMO_TOP_0/UART_IF_0/rfsm[11] 1189 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[39][13] 1047 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/inBuf_wA_0/offsetPQ_r2[5] 1354 34
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[11][4] 389 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/cmplx_0/rndHi_0/outp[9] 1492 43
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/rA_r[5] 1322 37
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[14][5] 399 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[68][14] 1344 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/wTimer_dly_2/genblk1.delayLine[1][5] 1354 37
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/preBflySw_0/rightP_r[28] 1545 40
set_location PF_COREUART_0_0/PF_COREUART_0_0/make_RX/rx_shift[0] 1289 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/lut_0/T_1_0_Or2_8 1244 36
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[42][5] 882 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[3][3] 431 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/outQ[7] 1339 27
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.piBuf/genblk1.memP/PolarFire_uram.uram_0/OR2_rD[20] 1487 33
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[42][9] 895 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.poBuf/genblk1.memQ/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R0C2/BLK_EN_inst 1589 34
set_location PF_DSP_FLOW_DEMO_TOP_0/UART_IF_0/COEF_WEN 1025 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[41][0] 856 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[97][4] 1568 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/genblk1.outBuff_0/outBuf_1/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R1C1/BLK_EN_inst 1396 28
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.poBuf/wQ_w[23] 1525 33
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/rdFFTtimer_0/rLastStage_r 1289 37
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/inBuf_rA_0/offsetPQ_r2[0] 1283 43
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[5][10] 2087 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[10][1] 378 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[101][4] 1935 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[37][4] 772 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[41][14] 954 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/twidLUT_1/twidLUT_0/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R0C1/R_ADDR_0_inst 1234 34
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.piBuf/genblk1.memP/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R1C0/R_ADDR_2_inst 1312 28
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[28][5] 634 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.piBuf/genblk1.memQ/PolarFire_uram.uram_0/OR2_rD[24] 1568 36
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[81][7] 1587 19
set_location PF_DSP_FLOW_DEMO_TOP_0/UART_IF_0/DATA_OUT_11_0_1[3] 1402 15
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/autoScale_0/edge_detect_0/outp 1345 42
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[117][8] 2149 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/inBuf_rA_0/addrP_w[0] 1279 42
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[64][11] 974 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/lut_0/T_1_00_31_0_.m168_i 1171 39
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[48][15] 1015 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/preInBuf_wEn_2_sqmuxa_i_0 1286 36
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/genblk1.outBuff_0/outBuf_1/PolarFire_uram.uram_0/OR2_rD[21] 1376 27
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/rw_dly_lastStage/genblk1.delayLine[9]_3 1318 42
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[74][8] 1471 25
set_location PF_COREUART_0_0/PF_COREUART_0_0/make_RX/stop_strobe 1324 13
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[72][11] 1448 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.piBuf/genblk1.memP/PolarFire_uram.uram_0/OR2_rD[17] 1462 33
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/inBuf_ldA_0/ldCount/Q_lm_0[4] 1366 36
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[91][8] 1767 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[32][5] 698 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[61][8] 480 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.piBuf/wQ_w[26] 1512 33
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[19][13] 1757 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/twid_wA_0/rstAfterInit_3 1259 42
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/postBflySw_0/outP[23] 1518 37
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.piBuf/wP_w[21] 1465 27
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[2][14] 506 13
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[89][12] 1758 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[66][2] 1310 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/lut_0/T_1_00_31_0_.m2_i 1170 39
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[18][7] 1781 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[89][9] 1731 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[44][12] 911 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[28][0] 1392 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[88][12] 1719 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/cmplx_0/genblk1.cmplx18_0/half_0/genblk1.dly_c/genblk1.delayLine[0][1] 1388 46
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[77][6] 1528 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[109][6] 2067 13
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/genblk1.outBuff_0/inQ_r[10] 1405 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[44][3] 844 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[94][10] 1829 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[32][3] 1251 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/inBuf_rA_0/mask2_r[5] 1266 43
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/inBuf_wA_0/timer_r[5] 1326 37
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.piBuf/genblk1.memQ/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R1C2/R_ADDR_0_inst 1530 34
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[23][2] 541 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[109][5] 2076 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[30][5] 1319 19
set_location PF_DSP_FLOW_DEMO_TOP_0/UART_IF_0/rfsm_srsts_i_a3_0[2] 1028 15
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[73][14] 1486 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/genblk1.outBuff_0/outPQ[8] 1394 6
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/postBflySw_0/muxP_w[26] 1544 36
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/twid_rA_0/timer_tick_RNI1QDV[5] 1270 36
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[62][7] 523 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[57][14] 531 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[12][5] 1976 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/preBflySw_0/leftQ_r[28] 1547 40
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[103][4] 1971 16
set_location PF_COREUART_0_0/PF_COREUART_0_0/make_CLOCK_GEN/genblk1.baud_cntr_lm_0[12] 1253 27
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[58][14] 1162 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[64][4] 997 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[9][0] 412 13
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[64][15] 1270 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[64][13] 1279 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/postBflySw_0/outQ[24] 1533 37
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[97][13] 1874 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[71][2] 1407 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/inPr_w[1] 1332 42
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[4][8] 2085 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[9][0] 2078 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[56][5] 1138 25
set_location PF_COREUART_0_0/PF_COREUART_0_0/make_CLOCK_GEN/genblk1.baud_cntr_lm_0[5] 1254 27
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[91][12] 1789 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[61][5] 506 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[102][1] 1949 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.poBuf/genblk1.memQ/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R0C2/R_ADDR_1_inst 1586 28
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/postBflySw_0/outQ[10] 1399 37
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/cmplx_0/genblk1.cmplx18_0/half_0/genblk1.dly_c/genblk1.delayLine[0][9] 1392 46
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[9][2] 2057 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[12][11] 351 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.piBuf/genblk1.memQ/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R0C1/R_ADDR_1_inst 1406 34
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/postBflySw_0/outQ[27] 1526 37
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[83][15] 1623 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[59][8] 461 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/inPr_w[6] 1344 39
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[47][11] 990 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/genblk1.outBuff_0/outBuf_1/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R0C1/BLK_EN_inst 1356 28
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[36][11] 790 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[40][11] 1006 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[66][15] 1338 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[85][5] 1636 19
set_location PF_COREUART_0_0/PF_COREUART_0_0/make_RX/receive_count[0] 1314 13
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/cmplx_0/genblk1.cmplx18_0/half_0/genblk1.dly_d/genblk1.delayLine[0][3] 1264 34
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[47][1] 964 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[36][0] 764 19
set_location PF_COREUART_0_0/PF_COREUART_0_0/make_CLOCK_GEN/make_xmit_clock.xmit_cntr_3_1.SUM[2] 1376 15
set_location PF_COREUART_0_0/PF_COREUART_0_0/genblk1.RXRDY 1273 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[95][9] 1838 16
set_location PF_COREUART_0_0/PF_COREUART_0_0/make_CLOCK_GEN/xmit_cntr[1] 1369 16
set_location PF_COREUART_0_0/PF_COREUART_0_0/make_TX/xmit_state_ns_a3_0_a2[1] 1212 15
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/genblk1.outBuff_0/outBuf_0/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R0C0/R_ADDR_1_inst 1431 7
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/preBflySw_0/leftQ_r[29] 1549 34
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[13][14] 512 28
set_location PF_DSP_FLOW_DEMO_TOP_0/UART_IF_0/DATA_OUT_11_0_2_0[0] 1419 15
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/postBflySw_0/leftQ_r[4] 1410 40
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[94][3] 1806 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/tA_r[2] 1283 37
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[126][5] 1274 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[4][15] 2073 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[0][10] 835 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[28][6] 1427 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.poBuf/wQ_w[26] 1527 33
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[53][3] 1084 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/cmplx_0/genblk1.cmplx18_0/half_0/genblk1.dly_c/genblk1.delayLine[0][10] 1394 46
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[28][3] 1421 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.poBuf/genblk1.memP/PolarFire_uram.uram_0/OR2_rD[12] 1465 33
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/genblk1.outBuff_0/outBuf_0/PolarFire_uram.uram_0/OR2_rD[11] 1402 27
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/preInBuf_wEn_2_sqmuxa_i_a2_0 1291 36
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/lut_0/T_1_00_0_31_0_.m81 1205 36
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.piBuf/wA_w[4] 1363 33
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[83][3] 1599 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/lut_0/T_1_00_31_0_.N_14_i 1221 42
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/genblk1.outBuff_0/outBuf_1/PolarFire_uram.uram_0/CFG2_BLKZ0[1] 978 24
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/rdFFTtimer_0/bit_dly_4/genblk1.delayLine[1]_3 1389 39
set_location PF_DSP_FLOW_DEMO_TOP_0/UART_IF_0/rfsm_srsts_i_a3[8] 1253 18
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[57][0] 660 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.poBuf/genblk1.wA_r[3] 1373 34
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[111][15] 2031 28
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[80][15] 1575 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[40][0] 956 25
set_location PF_COREUART_0_0/PF_COREUART_0_0/make_CLOCK_GEN/genblk1.baud_cntr[10] 1250 28
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/preBflySw_0/muxP_w[16] 1458 33
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[28][11] 641 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[53][0] 550 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[73][1] 1455 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/inBuf_wA_0/offsetPQ_r2[3] 1352 34
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[110][12] 2073 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[54][5] 473 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[66][8] 1327 19
set_location PF_DSP_FLOW_DEMO_TOP_0/UART_IF_0/DATA_OUT_11[6] 1409 15
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[54][15] 1129 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/inPr_dly_0/genblk1.delayLine[2][7] 1329 40
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[54][13] 1092 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[122][8] 2119 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[102][9] 1965 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/preBflySw_0/rightP_r[7] 1332 28
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[109][13] 2017 25
set_location PF_COREUART_0_0/PF_COREUART_0_0/make_CLOCK_GEN/genblk1.baud_clock_int 1228 28
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[20][12] 556 25
set_location PF_DSP_FLOW_DEMO_TOP_0/UART_IF_0/rfsm_srsts_0_a3_0_3_0_3[6] 1033 15
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[43][3] 891 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[82][10] 1614 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[40][2] 850 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/twidLUT_1/twidLUT_0/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R0C2/R_ADDR_0_inst 1248 34
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[33][8] 724 19
set_location PF_COREUART_0_0/PF_COREUART_0_0/make_TX/tx_RNO 1230 15
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/lut_0/T_1_00_31_0_.m254 1194 36
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/lut_0/T_1_00_31_0_.m128 1195 42
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[61][4] 1215 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/inPi_w[6] 1400 45
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/genblk1.outBuff_0/outPQ[16] 1459 27
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/genblk1.outBuff_0/outBuf_1/PolarFire_uram.uram_0/OR2_rD[25] 1525 27
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[5][3] 1811 19
set_location PF_DSP_FLOW_DEMO_TOP_0/UART_IF_0/DATA_OUT_11_0_1_0[5] 1439 15
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[15][7] 1878 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.piBuf/genblk1.memP/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R0C2/R_ADDR_0_inst 1601 28
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[124][6] 2098 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[25][0] 1518 19
set_location PF_COREUART_0_0/PF_COREUART_0_0/make_CLOCK_GEN/genblk1.baud_cntr[0] 1233 28
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/lut_0/T_1_00_0_31_0_.m186_2_1_0 1181 33
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[56][15] 1144 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/lut_0/T_1_00_31_0_.m141_1_0 1239 36
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[85][9] 1648 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[56][7] 1137 19
set_location PF_COREUART_0_0/PF_COREUART_0_0/make_RX/rx_state[0] 1321 13
set_location PF_COREUART_0_0/PF_COREUART_0_0/make_RX/rx_shift[1] 1288 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.poBuf/genblk1.memP/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R1C2/R_ADDR_0_inst 1582 34
set_location PF_DSP_FLOW_DEMO_TOP_0/UART_IF_0/OEN_RNO_0 1226 15
set_location PF_COREUART_0_0/PF_COREUART_0_0/make_RX/receive_count[2] 1312 13
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/lut_0/T_1_00_31_0_.m128_i 1229 36
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[36][3] 759 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[12][3] 1975 19
set_location PF_DSP_FLOW_DEMO_TOP_0/UART_IF_0/WDATA[2] 1201 13
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[125][13] 1669 19
set_location PF_ccc_0_0/PF_ccc_0_0/clkint_0 1152 162
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[11][7] 2015 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[117][5] 2176 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[21][0] 1650 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.piBuf/genblk1.memP/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R1C1/R_ADDR_3_inst 1486 34
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[54][1] 1103 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[58][10] 610 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[126][11] 1291 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/genblk1.outBuff_0/inP_r[3] 1392 34
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[3][11] 498 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/genblk1.outBuff_0/outPQ[28] 1518 27
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[72][3] 1420 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[5][15] 459 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/postBflySw_0/muxQ_w[12] 1463 36
set_location PF_DSP_FLOW_DEMO_TOP_0/FILTERCONTROL_FSM_0/fsm_ns_4_0_.N_77_i 1077 15
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[24][11] 557 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/wTimer_0/Q[0] 1309 37
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[12][2] 367 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[24][7] 556 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[47][2] 737 19
set_location PF_DSP_FLOW_DEMO_TOP_0/UART_IF_0/rfsm[2] 1030 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/genblk1.outBuff_0/outBuf_0/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R0C2/R_ADDR_0_inst 1611 34
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/lut_0/T_1_00_31_0_.m247 1193 36
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.poBuf/genblk1.memP/PolarFire_uram.uram_0/OR2_rD[24] 1564 36
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[36][2] 765 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[43][2] 881 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/twidLUT_1/twidLUT_0/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R1C0/R_ADDR_5_inst 1192 28
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[16][0] 1839 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[120][13] 2101 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/inQr_w[3] 1314 45
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/twidLUT_1/twidLUT_0/PolarFire_uram.uram_0/OR2_rD[10] 1222 33
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[5][5] 2169 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/outP[3] 1290 27
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[86][1] 1649 19
set_location PF_COREUART_0_0/PF_COREUART_0_0/make_CLOCK_GEN/genblk1.baud_cntr_lm_0[10] 1250 27
set_location reset_sync_0/reset_sync_0/un1_D 1738 3
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[62][14] 1231 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[20][7] 1720 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[72][12] 1442 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/inPr_dly_0/genblk1.delayLine[3][3] 1318 40
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[63][2] 1239 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[100][10] 1927 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.poBuf/genblk1.memQ/PolarFire_uram.uram_0/OR2_rD[8] 1296 33
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[68][5] 1348 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/genblk1.outBuff_0/outBuf_0/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R1C0/R_ADDR_4_inst 1395 10
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/outBuf_wEn_frEdge 1292 37
set_location PF_DSP_FLOW_DEMO_TOP_0/UART_IF_0/rfsm_0_sqmuxa_1_0_a2 1025 15
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/wTimer_dly_2/genblk1.delayLine[0][6] 1318 37
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.poBuf/genblk1.memP/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R0C2/R_ADDR_4_inst 1552 34
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[39][14] 860 19
set_location PF_DSP_FLOW_DEMO_TOP_0/UART_IF_0/DATA_OUT_11_RNO[5] 1435 15
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/wTimer_dly_2/genblk1.delayLine[1][0] 1350 37
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/genblk1.outBuff_0/outBuf_1/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R0C1/R_ADDR_1_inst 1375 28
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/inPr_w[0] 1335 42
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/outBufA_0/outBuf_wA[5] 1384 37
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[81][4] 1564 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/preBflySw_0/muxP_w[19] 1482 33
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.piBuf/genblk1.memQ/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R0C2/BLK_EN_inst 1565 34
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[86][12] 1673 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/outP[4] 1408 43
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/genblk1.outBuff_0/outBuf_0/PolarFire_uram.uram_0/OR2_rD[22] 1598 33
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/postBflySw_0/outP[30] 1593 34
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/cmplx_0/genblk1.cmplx18_0/half_1/genblk1.dly_c/genblk1.delayLine[0][15] 1439 43
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[87][15] 1694 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[49][13] 1022 19
set_location PF_COREUART_0_0/PF_COREUART_0_0/make_CLOCK_GEN/xmit_clock 1375 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[25][6] 1544 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.piBuf/genblk1.memQ/PolarFire_uram.uram_0/OR2_rD[26] 1569 33
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/inBuf_rA_0/addrP_r2[5] 1261 43
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.poBuf/genblk1.memQ/PolarFire_uram.uram_0/OR2_rD[29] 1553 33
set_location PF_DSP_FLOW_DEMO_TOP_0/UART_IF_0/DATA_OUT_11[3] 1396 15
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/postBflySw_0/muxP_w[15] 1432 39
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[67][12] 1334 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[2][6] 1893 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[25][3] 1517 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/outP[10] 1332 36
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/genblk1.outBuff_0/outBuf_1/PolarFire_uram.uram_0/OR2_rD[28] 1521 27
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[107][14] 2006 28
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/lut_0/T_1_00_31_0_.N_223_i 1172 42
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/twid_rA_0/tA[2] 1262 37
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[53][5] 1083 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[110][0] 2082 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[21][6] 1664 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/lut_0/T_1_00_31_0_.m11_2 1184 42
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/rdFFTtimer_0/stage_timer/Q[4] 1288 34
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[122][15] 2029 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[114][6] 2165 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/lut_0/T_1_00_31_0_.m130 1194 42
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[21][3] 1648 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.poBuf/wP_w[1] 1389 24
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.piBuf/genblk1.memP/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R0C0/R_ADDR_1_inst 1327 37
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[4][0] 420 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[12][12] 503 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/inPr_dly_0/genblk1.delayLine[1][15] 1458 40
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[6][0] 401 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/inPr_w[4] 1348 39
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/genblk1.outBuff_0/outBuf_0/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R0C0/BLK_EN_inst 1430 7
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[33][0] 736 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[2][4] 2061 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[40][7] 1007 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.poBuf/genblk1.memP/PolarFire_uram.uram_0/OR2_rD[10] 1272 33
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/outBufA_0/outBuf_rA_0/Q[0] 1387 40
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/inPr_dly_0/genblk1.delayLine[3][2] 1310 40
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/inPr_dly_0/genblk1.delayLine[1][3] 1312 40
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/twidLUT_1/twidLUT_0/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R0C2/BLK_EN_inst 1252 34
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[52][14] 1086 19
set_location PF_COREUART_0_0/PF_COREUART_0_0/make_RX/rcv_sm.rx_state19_NE_i 1321 15
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[63][15] 498 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/preBflySw_0/muxQ_w[2] 1331 27
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/genblk1.outBuff_0/outBuf_0/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R1C0/R_ADDR_2_inst 1394 10
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[94][2] 1805 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[24][1] 560 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[28][0] 444 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[63][12] 1261 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.poBuf/genblk1.memQ/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R0C2/R_ADDR_5_inst 1585 28
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/rTimer_dly2/genblk1.delayLine[0][2] 1281 34
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[30][11] 462 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[7][1] 2030 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/rStage_dly2/genblk1.delayLine[0][2] 1273 34
set_location PF_COREUART_0_0/PF_COREUART_0_0/make_RX/rx_state[1] 1323 13
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.poBuf/genblk1.memP/PolarFire_uram.uram_0/OR2_rD[15] 1453 33
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[1][10] 1726 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[104][8] 1997 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[30][1] 423 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.poBuf/genblk1.memQ/PolarFire_uram.uram_0/OR2_rD[6] 1303 27
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/preBflySw_0/outP[27] 1549 40
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[96][6] 1849 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[62][9] 1230 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/preBflySw_0/rightP_r[1] 1329 28
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[4][15] 427 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.poBuf/wQ_w[30] 1536 33
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[29][4] 663 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.piBuf/genblk1.memQ/PolarFire_uram.uram_0/OR2_rD[12] 1416 33
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/twidLUT_1/twidLUT_0/PolarFire_uram.uram_0/OR2_rD[20] 1257 33
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[121][3] 2181 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[57][12] 1154 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[20][8] 493 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[46][4] 953 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/preBflySw_0/leftQ_r[6] 1327 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[63][8] 1275 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/inBuf_wA_0/mask2_r_RNO[0] 1336 33
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.piBuf/wP_w[1] 1380 24
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.poBuf/genblk1.memP/PolarFire_uram.uram_0/OR2_rD[18] 1485 33
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.piBuf/genblk1.memP/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R0C1/R_ADDR_3_inst 1492 28
set_location PF_DSP_FLOW_DEMO_TOP_0/UART_IF_0/R_ADDR[9] 1482 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.poBuf/genblk1.memP/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R1C1/BLK_EN_inst 1455 34
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/inBuf_rA_0/un1_offsetPQ_w_6 1265 39
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/postBflySw_0/muxQ_w[11] 1458 36
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/preBflySw_0/rightP_r[29] 1548 34
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/outP[7] 1333 27
set_location PF_DSP_FLOW_DEMO_TOP_0/UART_IF_0/un1_DATA_OUT_0_sqmuxa_i_a3_0 1229 18
set_location PF_COREUART_0_0/PF_COREUART_0_0/make_RX/rx_byte[0] 1272 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/inBuf_rA_0/mask1_shft_stage_10 1260 42
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[21][2] 476 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/datai_re_r[12] 1442 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.piBuf/genblk1.memQ/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R1C2/R_ADDR_2_inst 1529 28
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[28][9] 1425 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/inBuf_wA_0/timer_bit0_r2 1353 34
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[99][4] 1886 19
set_location PF_DSP_FLOW_DEMO_TOP_0/UART_IF_0/RAM_REN 1441 16
set_location PF_DSP_FLOW_DEMO_TOP_0/UART_IF_0/DATA_OUT_11_0_1_0[4] 1426 15
set_location PF_DSP_FLOW_DEMO_TOP_0/UART_IF_0/FFT_IM_REN 1441 15
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[2][13] 435 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[39][4] 846 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[78][4] 1516 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[53][14] 626 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[24][2] 1554 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[54][12] 589 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[53][7] 1071 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[114][8] 2130 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/inQr_w[11] 1424 45
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[66][13] 1337 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/lut_0/T_1_00_0_31_0_.m248_2 1215 36
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[38][14] 1084 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[33][3] 735 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/inPr_dly_0/genblk1.delayLine[1][2] 1309 40
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[51][15] 656 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/postBflySw_0/rightP_r[23] 1517 37
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/twidLUT_1/twidLUT_0/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R0C0/R_ADDR_2_inst 1201 34
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.piBuf/genblk1.memP/PolarFire_uram.uram_0/OR2_rD[16] 1475 33
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[101][2] 1934 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[8][6] 369 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[66][1] 1315 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/genblk1.outBuff_0/outBuf_0/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R1C1/R_ADDR_0_inst 1394 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[99][11] 1910 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[8][11] 1959 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/twidLUT_1/rA_r[4] 1263 34
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[35][15] 1166 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[123][3] 2084 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[62][3] 505 13
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.piBuf/wP_w[7] 1388 33
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[10][0] 412 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[49][12] 1021 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.piBuf/genblk1.memP/PolarFire_uram.uram_0/OR2_rD[23] 1608 33
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[53][12] 1093 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/genblk1.outBuff_0/outBuf_1/PolarFire_uram.uram_0/OR2_rD[1] 1424 6
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[47][5] 736 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/preBflySw_0/muxQ_w[6] 1322 24
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[92][1] 1791 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[79][6] 1564 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[48][12] 1014 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/rw_dly_lastStage/genblk1.delayLine[7]_3 1309 42
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[19][6] 1733 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[33][2] 706 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[43][5] 880 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[58][7] 463 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[107][0] 2043 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[8][9] 366 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/genblk1.outBuff_0/outBuf_1/PolarFire_uram.uram_0/OR2_rD[30] 1512 27
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[94][14] 1827 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[125][5] 1562 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/rdFFTtimer_0/bit_dly_2/genblk1.delayLine[1]_3 1295 36
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/autoScale_0/un1_ldRiskOV 1381 24
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[83][1] 1598 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.poBuf/genblk1.memP/PolarFire_uram.uram_0/OR2_rD[0] 1285 27
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[8][6] 2122 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/inPi_dly_0/genblk1.delayLine[3][12] 1518 43
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.piBuf/wP_w[30] 1593 33
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[51][3] 1023 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[52][4] 1051 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/genblk1.outBuff_0/outPQ[6] 1420 6
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/inBuf_ldA_0/ldCount/tc_7 1365 36
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/lut_0/T_1_00_0_31_0_.m59_2_0 1239 42
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[51][11] 610 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[61][11] 1216 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[18][14] 1804 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[81][3] 1563 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/preBflySw_0/leftQ_r[2] 1330 28
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[4][9] 2093 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/wTimer_0/Q[5] 1314 37
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/outQ[3] 1391 43
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.piBuf/genblk1.memQ/PolarFire_uram.uram_0/CFG2_BLKZ0[0] 1488 33
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[71][1] 1406 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[56][0] 485 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[15][15] 1864 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.poBuf/genblk1.memQ/PolarFire_uram.uram_0/OR2_rD[7] 1296 27
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[103][2] 1970 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[30][2] 1347 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[109][15] 2024 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[8][5] 388 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[101][13] 1933 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[80][6] 1582 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[56][13] 1143 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[41][3] 889 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[47][8] 752 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[43][15] 907 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.poBuf/genblk1.memQ/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R1C0/R_ADDR_3_inst 1300 28
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[22][10] 1624 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/rdFFTtimer_0/startFFT_dly_0/genblk1.delayLine[1] 1294 37
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[8][4] 2102 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[12][9] 393 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/genblk1.outBuff_0/wA_r[4] 1387 28
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[31][8] 687 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[43][8] 874 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[33][11] 1239 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[9][12] 2039 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[49][1] 995 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[39][14] 1023 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[22][12] 1634 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/preBflySw_0/muxQ_w[0] 1337 27
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[125][11] 1900 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[102][12] 1951 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/inQi_w[4] 1389 45
set_location PF_COREUART_0_0/PF_COREUART_0_0/make_CLOCK_GEN/genblk1.baud_cntr_lm_0[7] 1258 27
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[25][4] 591 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[108][15] 2007 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/inBuf_wA_0/bflyA[5] 1349 34
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[32][11] 713 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.poBuf/genblk1.wA_r[6] 1497 34
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[118][6] 2168 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[90][0] 1713 19
set_location PF_DSP_FLOW_DEMO_TOP_0/UART_IF_0/rfsm_RNO[7] 1249 18
set_location PF_DSP_FLOW_DEMO_TOP_0/UART_IF_0/rfsm_srsts_i_a3_0[12] 1233 15
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/postBflySw_0/leftQ_r[2] 1409 40
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/ctrl_dly_0/genblk1.delayLine[4][1] 1346 43
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[25][9] 1543 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.piBuf/genblk1.memP/PolarFire_uram.uram_0/OR2_rD[10] 1328 36
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[39][1] 1014 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[54][6] 1103 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[30][7] 680 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/lut_0/T_1_0_Or2_12 1240 33
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[10][7] 348 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[20][13] 554 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/genblk1.outBuff_0/outBuf_0/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R0C1/R_ADDR_5_inst 1390 28
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/inQr_w[14] 1429 42
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[23][11] 533 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/outBufA_0/outBuf_rA_0/Q_lm_0[1] 1380 36
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[95][4] 1690 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[40][15] 867 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[10][3] 376 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[52][9] 1073 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.piBuf/genblk1.memQ/PolarFire_uram.uram_0/OR2_rD[14] 1413 33
set_location PF_DSP_FLOW_DEMO_TOP_0/UART_IF_0/R_ADDR[4] 1485 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[51][11] 1040 25
set_location PF_DSP_FLOW_DEMO_TOP_0/UART_IF_0/DATA_OUT_11_0_1_0[6] 1438 15
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[35][4] 747 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[33][14] 792 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[21][9] 1663 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/postBflySw_0/rightP_r[13] 1431 37
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/lut_0/T_1_00_0_31_0_.m256_2_1_1 1192 39
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[46][2] 738 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[13][11] 1964 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.piBuf/genblk1.memQ/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R1C2/R_ADDR_5_inst 1535 28
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.piBuf/genblk1.memQ/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R0C2/R_ADDR_1_inst 1569 34
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[19][14] 1756 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/preBflySw_0/outP[2] 1333 43
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/inBuf_ldA_0/ldCount/Q[3] 1363 37
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/preBflySw_0/outP[23] 1568 37
set_location PF_COREUART_0_0/PF_COREUART_0_0/make_TX/xmit_state_ns_0[0] 1213 15
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[42][10] 893 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[93][6] 1815 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/genblk1.outBuff_0/outBuf_0/PolarFire_uram.uram_0/OR2_rD[6] 1404 6
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/inBuf_ldA_0/ldCount/Q[4] 1366 37
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.poBuf/genblk1.memQ/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R1C0/R_ADDR_2_inst 1299 28
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[79][10] 1563 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[61][2] 1214 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/rdFFTtimer_0/startFFT_dly_0/genblk1.delayLine[1]_3 1294 36
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[108][8] 2057 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/preBflySw_0/outQ[17] 1416 40
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[43][4] 890 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[48][4] 696 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/preBflySw_0/muxP_w[20] 1480 36
set_location PF_DSP_FLOW_DEMO_TOP_0/UART_IF_0/DATA_OUT_11_0_2[4] 1418 15
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/outQ[19] 1430 36
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/rdFFTtimer_0/preRdValid_RNO 1289 39
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[55][7] 505 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.piBuf/genblk1.memQ/PolarFire_uram.uram_0/OR2_rD[1] 1342 33
set_location PF_COREUART_0_0/PF_COREUART_0_0/tx_hold_reg[1] 1378 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/outBuf_rA_r[6] 1386 37
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.poBuf/genblk1.memP/PolarFire_uram.uram_0/OR2_rD[23] 1565 36
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[75][6] 1490 25
set_location PF_DSP_FLOW_DEMO_TOP_0/UART_IF_0/un1_RAM_REN_0_sqmuxa_2_0_o3_RNIVIPF 1453 15
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/genblk1.outBuff_0/outBuf_1/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R0C2/R_ADDR_0_inst 1512 34
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[114][5] 2105 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[22][13] 557 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/twid_rA_0/tA[5] 1265 37
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[10][8] 377 25
set_location PF_COREUART_0_0/PF_COREUART_0_0/make_RX/rx_byte[3] 1279 16
set_location PF_DSP_FLOW_DEMO_TOP_0/UART_IF_0/rfsm_srsts_i_a2_7[5] 1064 15
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/postBflySw_0/outP[5] 1395 34
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[83][10] 1610 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FILTERCONTROL_FSM_0/fsm_tr4_0_a4_0_a3 1076 15
set_location reset_sync_0/reset_sync_0/dff_2 1710 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[51][7] 601 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/outBufA_0/outBuf_wA[6] 1319 37
set_location PF_COREUART_0_0/PF_COREUART_0_0/make_RX/rx_state_ns_1_0_.m10 1316 12
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[0][15] 831 16
set_location PF_DSP_FLOW_DEMO_TOP_0/UART_IF_0/COEF_WADDR[5] 1117 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[20][6] 477 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[51][5] 1038 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/lut_0/T_1_00_31_0_.m167_2 1182 36
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/inBuf_wA_0/timer_r[0] 1322 34
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[120][15] 2071 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/preBflySw_0/rightP_r[9] 1332 40
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.poBuf/wP_w[2] 1398 33
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[10][2] 2040 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[118][8] 2165 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/outP[8] 1324 39
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[63][1] 1238 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[86][8] 1662 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[124][9] 2154 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/ctrl_dly_0/genblk1.delayLine[2][0] 1467 34
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[19][10] 459 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/outP[5] 1409 43
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[44][6] 923 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/genblk1.outBuff_0/outBuf_0/PolarFire_uram.uram_0/OR2_rD[7] 1400 6
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[44][7] 918 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[31][0] 688 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[30][9] 1361 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[59][15] 502 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[42][10] 917 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/twid_wA_0/slowTimer/Q[0] 1249 43
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[54][11] 534 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/lut_0/T_1_00_31_0_.m23 1235 39
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/lut_0/T_1_00_0_31_0_.m146_2_1 1183 39
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/rdFFTtimer_0/rA_timer/tc 1290 40
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[63][9] 528 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[110][7] 2140 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[42][12] 924 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[45][1] 916 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[106][6] 2022 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[8][1] 412 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[40][1] 994 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[61][6] 512 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/lut_0/T_1_00_0_31_0_.m112 1218 33
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[46][12] 953 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[70][5] 1385 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.poBuf/genblk1.wA_r[0] 1371 34
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[106][5] 2037 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[8][4] 406 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[86][0] 1647 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[47][15] 985 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[104][11] 1996 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[38][4] 1050 25
set_location PF_DSP_FLOW_DEMO_TOP_0/UART_IF_0/rfsm[14] 1277 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[28][5] 1425 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/cmplx_0/genblk1.cmplx18_0/half_1/genblk1.dly_c/genblk1.delayLine[0][5] 1315 46
set_location reset_sync_0/reset_sync_0/dff_9 1709 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FILTERCONTROL_FSM_0/fsm_RNIMANU[3] 1194 15
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.piBuf/wQ_w[20] 1417 33
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/autoScale_0/bflyMonitor_RNO_0 1346 42
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[8][14] 395 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/genblk1.outBuff_0/outBuf_0/PolarFire_uram.uram_0/OR2_rD[2] 1412 6
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[57][2] 602 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[16][5] 429 13
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[7][0] 2098 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/sync_rw_1/genblk1.delayLine[0] 1301 40
set_location PF_DSP_FLOW_DEMO_TOP_0/FILTERCONTROL_FSM_0/fsm_i[0] 1245 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/twid_wA_0/ngrst2rst_0/pulsei 1254 45
set_location PF_DSP_FLOW_DEMO_TOP_0/FILTERCONTROL_FSM_0/FFT_WADDR[5] 1253 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[53][2] 553 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[7][2] 2072 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[104][14] 1962 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/postBflySw_0/outQ[30] 1536 40
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/rTimer_dly2/genblk1.delayLine[0][1] 1300 43
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[3][12] 2014 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/inBuf_wA_0/bflyA[1] 1345 34
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[32][9] 712 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[61][8] 1215 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[105][12] 2036 28
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/inBuf_rA_0/addrP_r2[0] 1279 43
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[103][14] 1958 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[2][3] 2030 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/rdFFTtimer_0/rA_timer/tc_3_0_a2_0 1306 42
set_location PF_DSP_FLOW_DEMO_TOP_0/UART_IF_0/WEN_RNO_0 1303 18
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/outQ[29] 1513 43
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/inBuf_wA_0/un1_addrP_w[6] 1308 33
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/twidLUT_1/twidLUT_0/PolarFire_uram.uram_0/CFG2_BLKX0[0] 1252 33
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[57][0] 1155 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/preBflySw_0/rightP_r[4] 1316 40
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[90][7] 1732 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[110][4] 2044 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[61][15] 1244 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.piBuf/wP_w[13] 1437 27
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[4][13] 2011 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/postBflySw_0/outP[3] 1402 34
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[91][10] 1766 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/inBuf_rA_0/bflyA[3] 1275 43
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.poBuf/wP_w[4] 1412 24
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/lut_0/T_1_00_0_31_0_.m148 1191 39
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[76][8] 1503 25
set_location PF_COREUART_0_0/PF_COREUART_0_0/make_TX/tx 1355 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/preBflySw_0/leftQ_r[16] 1459 34
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/genblk1.outBuff_0/inQ_r[5] 1428 10
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[62][3] 1228 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[45][4] 812 19
set_location PF_DSP_FLOW_DEMO_TOP_0/UART_IF_0/rfsm_srsts_0_a3_0[1] 1282 15
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/inBuf_ldA_0/ldCount/tc_7_1 1360 36
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[51][7] 1036 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[62][7] 1202 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[32][5] 1281 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/twid_rA_0/timer_tick_RNI2O222[6] 1263 36
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[31][3] 687 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[107][3] 2042 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[75][13] 1503 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[32][12] 723 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[10][6] 353 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[14][4] 1901 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[110][3] 2125 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/rA_r[6] 1281 40
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[29][8] 1400 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[68][10] 1338 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/preBflySw_0/muxQ_w[20] 1462 36
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[5][13] 2011 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/inPr_w[11] 1333 36
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/inPr_w[5] 1345 39
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[41][4] 949 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[10][8] 2020 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/inBuf_rA_0/addrP_w[3] 1287 42
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/outP[26] 1510 37
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/postBflySw_0/muxP_w[19] 1465 36
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[2][5] 2017 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/datai_re_r[6] 1408 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[38][6] 1046 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[66][14] 1336 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/inBuf_wA_0/mask2_r[4] 1316 34
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/slowClock_0/divider_inferred_clock_RNISVF8[2] 1249 45
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/lut_0/T_1_00_31_0_.m260 1220 42
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/inBuf_rA_0/addrP_r2[6] 1264 43
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[14][1] 385 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[31][2] 686 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/genblk1.outBuff_0/inQ_r[30] 1537 34
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[54][4] 475 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[46][5] 763 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[21][10] 1661 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.poBuf/genblk1.memP/PolarFire_uram.uram_0/OR2_rD[14] 1458 39
set_location reset_sync_0/reset_sync_0/dff_14 1456 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/lut_0/T_1_00_0_31_0_.m229_3 1219 42
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.poBuf/genblk1.memQ/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R1C2/R_ADDR_4_inst 1550 28
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.piBuf/genblk1.wA_r[0] 1357 34
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[47][3] 735 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/twidLUT_1/twidLUT_0/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R1C0/R_ADDR_4_inst 1191 28
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[39][7] 1072 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[66][10] 1322 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.poBuf/wQ_w[20] 1426 33
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/lut_0/T_1_00_31_0_.m15 1181 36
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[81][1] 1562 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/postBflySw_0/muxP_w[1] 1414 39
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[43][3] 879 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/twid_rA_0/stage_tick[2] 1274 34
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/postBflySw_0/leftQ_r[24] 1527 43
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[111][0] 2084 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/preBflySw_0/outQ[13] 1446 37
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/postBflySw_0/rightP_r[30] 1543 37
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[79][15] 1549 25
set_location PF_DSP_FLOW_DEMO_TOP_0/UART_IF_0/rfsm_srsts_i_a3_0_1[2] 1029 15
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/rdFFTtimer_0/bit_dly_4/genblk1.delayLine[0]_3 1305 39
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[57][10] 481 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/outQ[1] 1389 43
set_location PF_DSP_FLOW_DEMO_TOP_0/UART_IF_0/DATA_OUT[6] 1409 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[50][3] 630 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/cmplx_0/genblk1.cmplx18_0/half_0/genblk1.dly_c/genblk1.delayLine[0][6] 1399 46
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/smBuf_full_2_sqmuxa_i 1345 36
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/genblk1.outBuff_0/outBuf_1/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R1C1/R_ADDR_0_inst 1377 34
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/inQi_w[13] 1418 45
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/lut_0/T_1_0_Or2_30 1195 33
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[6][7] 2081 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[51][15] 1059 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/postBflySw_0/rightP_r[22] 1538 37
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/outP[25] 1509 37
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[27][3] 464 13
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[39][0] 1013 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/outP[23] 1507 37
set_location reset_sync_0/reset_sync_0/dff_15 1229 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/inBuf_wA_0/mask1_r[5] 1318 34
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.piBuf/genblk1.memP/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R1C1/R_ADDR_1_inst 1481 34
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/genblk1.outBuff_0/outD[4] 1423 7
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[71][14] 1436 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[15][13] 537 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[63][4] 643 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/rdFFTtimer_0/stage_timer/tc_3_0_a2_2 1284 33
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/inPr_dly_0/genblk1.delayLine[2][3] 1314 40
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.piBuf/wQ_w[9] 1387 24
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/outP[3] 1407 43
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/inPi_dly_0/genblk1.delayLine[2][4] 1505 40
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/inPi_dly_0/genblk1.delayLine[0][15] 1559 37
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[35][4] 1172 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.piBuf/genblk1.memQ/PolarFire_uram.uram_0/OR2_rD[16] 1425 33
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[25][5] 1515 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/lut_0/T_1_00_0_31_0_.m109 1217 33
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[118][5] 2178 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.poBuf/genblk1.memQ/PolarFire_uram.uram_0/OR2_rD[19] 1437 36
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[92][15] 1803 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FILTERCONTROL_FSM_0/COEF_I_VALID 1228 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/inPi_dly_0/genblk1.delayLine[3][4] 1504 40
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/rdFFTtimer_0/rA_timer/Q[4] 1285 40
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[40][5] 842 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/genblk1.outBuff_0/outD[5] 1410 7
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[1]_1_sqmuxa_0_a4_i_rep1 1567 18
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[42][0] 906 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[40][9] 856 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[96][3] 1797 16
set_location PF_COREUART_0_0/PF_COREUART_0_0/tx_hold_reg[2] 1373 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[46][8] 785 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/postBflySw_0/muxP_w[7] 1398 36
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[20][10] 486 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[88][5] 1700 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[58][10] 1157 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[18][1] 1761 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.piBuf/wP_w[3] 1393 33
set_location PF_COREUART_0_0/PF_COREUART_0_0/make_RX/receive_count[1] 1308 13
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[104][0] 1974 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[98][9] 1877 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[31][4] 1314 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[82][2] 1577 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/rTimer_dly2/genblk1.delayLine[1][6] 1303 43
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.piBuf/genblk1.memP/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R0C2/R_ADDR_3_inst 1600 28
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/outQ[29] 1549 33
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[21][5] 1646 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[34][15] 1083 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[22][11] 1623 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[60][0] 573 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[56][14] 1142 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[122][10] 2120 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[1]_1_sqmuxa_0_a4_i_fast_RNIIM1I 1159 18
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[1]_1_sqmuxa_0_a4_i_fast_RNIIM1I_2 1851 24
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[113][0] 2106 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[92][5] 1792 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/inQi_w[7] 1401 45
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[38][8] 1053 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[83][8] 1609 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[7][11] 2117 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/postBflySw_0/muxP_w[13] 1431 36
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.piBuf/wP_w[16] 1472 27
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[19][15] 532 28
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[120][4] 1919 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/inBuf_wA_0/mask1_r[1] 1328 34
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/lut_0/T_1_00_31_0_.m45 1171 42
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[52][8] 1070 25
set_location PF_DSP_FLOW_DEMO_TOP_0/UART_IF_0/DATA_WADDR[9] 1062 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[54][9] 526 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/inPi_dly_0/genblk1.delayLine[0][12] 1551 37
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/rA_r[1] 1274 40
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[30][5] 664 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[56][10] 1136 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/lut_0/T_1_00_0_31_0_.m177 1180 33
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[54][1] 573 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.poBuf/wA_w[5] 1375 33
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/outP[20] 1479 36
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/lut_0/T_1_00_31_0_.m217 1207 39
set_location PF_COREUART_0_0/PF_COREUART_0_0/make_RX/rx_state_0_sqmuxa_0_a4 1319 12
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/genblk1.outBuff_0/outBuf_1/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R1C0/R_ADDR_3_inst 1437 7
set_location PF_DSP_FLOW_DEMO_TOP_0/UART_IF_0/rfsm_nss_i_0_a2_0_3[0] 1456 15
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[11][14] 472 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[37][13] 1097 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/rdFFTtimer_0/stage_timer/Q[0] 1294 34
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/lut_0/T_1_0_Or2_22 1208 42
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[8][3] 2089 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[122][5] 2152 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/lut_0/T_1_00_31_0_.m60_i 1182 39
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/outBuf_wA_r[3] 1384 34
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[83][0] 1597 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[57][5] 778 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[77][7] 1527 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/inPi_dly_0/genblk1.delayLine[0][14] 1548 37
set_location PF_ccc_0_0/PF_ccc_0_0/pll_inst_0_DELAY 2467 4
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[126][15] 1303 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/inPr_dly_0/genblk1.delayLine[2][2] 1319 40
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[53][5] 538 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/inPi_dly_0/genblk1.delayLine[2][14] 1547 37
set_location PF_DSP_FLOW_DEMO_TOP_0/UART_IF_0/DATA_OUT_11_0_1_0[1] 1413 15
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/inPr_dly_0/genblk1.delayLine[0][11] 1333 37
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[13][5] 403 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[91][6] 1822 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[2][11] 2101 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[14][15] 1929 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/genblk1.outBuff_0/outBuf_0/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R1C2/R_ADDR_0_inst 1611 28
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/inBuf_wA_0/bflyA[6] 1350 34
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/inPi_dly_0/genblk1.delayLine[3][13] 1519 37
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[29][10] 1397 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[35][6] 1156 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/twidLUT_1/twidLUT_0/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R1C1/R_ADDR_5_inst 1214 28
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[22][9] 521 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[41][4] 854 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[62][0] 1227 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[20][1] 1699 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[56][1] 1131 25
set_location PF_init_monitor_0_0/PF_init_monitor_0_0/I_BEN_6 1750 1
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/preBflySw_0/outP[18] 1484 40
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[2][12] 2013 19
set_location PF_DSP_FLOW_DEMO_TOP_0/UART_IF_0/rfsm[5] 1191 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[2][2] 459 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[58][11] 493 13
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/rdFFTtimer_0/stage_timer/Q_n0_i_a2 1294 33
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/preBflySw_0/outP[0] 1335 28
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[88][9] 1721 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/lut_0/T_1_00_0_31_0_.m264_2_1 1193 42
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[74][10] 1467 25
set_location PF_ccc_0_0/PF_ccc_0_0/pll_inst_0 2460 5
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[8][12] 492 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[63][11] 1120 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/genblk1.outBuff_0/outBuf_0/PolarFire_uram.uram_0/OR2_rD[14] 1396 27
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/preOutBuf_wEn_1_sqmuxa_0_a2 1292 36
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[22][7] 1622 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[41][10] 945 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.piBuf/genblk1.memP/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R0C0/R_ADDR_4_inst 1314 28
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[26][7] 593 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[90][14] 1755 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[31][6] 1330 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[27][10] 640 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[66][11] 1324 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[17][13] 1826 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/inBuf_ldA_0/ldCount/Q[0] 1367 37
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/inQi_w[3] 1387 45
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[8][5] 2102 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/inBuf_rA_0/timer_r[1] 1288 43
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.piBuf/wP_w[9] 1393 24
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[64][8] 1005 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[105][13] 1993 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/lut_0/T_1_00_31_0_.N_23_i 1179 33
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[73][8] 1454 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[44][2] 905 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[17][4] 451 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/postBflySw_0/rightP_r[12] 1468 37
set_location PF_COREUART_0_0/PF_COREUART_0_0/make_RX/rx_state_s0_0_a2 1309 12
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/lut_0/T_1_0_Gate1_15 1189 33
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[31][12] 1340 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[106][11] 2021 19
set_location PF_DSP_FLOW_DEMO_TOP_0/UART_IF_0/DATA_OUT_11_0_1_0[0] 1421 15
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[77][13] 1525 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/inBuf_wA_0/offsetPQ_r1[4] 1338 34
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[123][13] 1985 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/postBflySw_0/muxQ_w[30] 1536 39
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[18][9] 1780 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[71][12] 1441 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[47][0] 963 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[61][1] 1213 25
set_location PF_COREUART_0_0/PF_COREUART_0_0/make_CLOCK_GEN/make_xmit_clock.xmit_clock5 1375 15
set_location reset_sync_0/reset_sync_0/dff_5 1708 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[1][6] 2089 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/inBuf_wA_0/addrP_r2[3] 1315 34
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[53][15] 660 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.piBuf/genblk1.memP/PolarFire_uram.uram_0/OR2_rD[1] 1325 27
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/genblk1.outBuff_0/outPQ[25] 1532 27
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[9][6] 364 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.piBuf/genblk1.memP/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R0C1/R_ADDR_1_inst 1491 28
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[87][7] 1706 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[100][13] 1955 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/lut_0/T_1_00_31_0_.m51_i 1192 42
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/inPr_dly_0/genblk1.delayLine[0][4] 1348 40
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[36][14] 1141 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.piBuf/genblk1.memP/PolarFire_uram.uram_0/OR2_rD[13] 1441 36
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.poBuf/wP_w[5] 1400 33
set_location PF_COREUART_0_0/PF_COREUART_0_0/make_RX/receive_shift.rx_shift_11_fast[7] 1294 15
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[105][6] 2023 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[15][1] 1861 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/genblk1.outBuff_0/inQ_r[28] 1514 34
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/genblk1.outBuff_0/inP_r[26] 1610 34
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[14][10] 387 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[105][5] 2038 25
set_location PF_DSP_FLOW_DEMO_TOP_0/UART_IF_0/rfsm_srsts_0_a3_0_3_0_4[6] 1037 15
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[126][14] 1308 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[97][8] 1852 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[2][7] 441 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/inBuf_rA_0/timer_r[4] 1282 43
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[64][5] 1000 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.piBuf/genblk1.memQ/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R1C2/R_ADDR_3_inst 1536 34
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[9][9] 365 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/inBuf_rA_0/addrP_r2[2] 1291 43
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[42][11] 916 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[35][8] 1155 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[42][7] 915 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[11][1] 2008 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[11][12] 2001 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[95][14] 1850 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[116][10] 2142 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/inBuf_wA_0/mask2_r[6] 1311 34
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[1][4] 2070 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[43][10] 915 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[3][14] 2042 19
set_location PF_DSP_FLOW_DEMO_TOP_0/UART_IF_0/FIR_OUT_REN 1447 15
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/twidLUT_1/twidLUT_0/PolarFire_uram.uram_0/OR2_rD[4] 1203 33
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[62][6] 1223 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/preBflySw_0/outQ[9] 1339 40
set_location PF_DSP_FLOW_DEMO_TOP_0/FILTERCONTROL_FSM_0/fsm[4] 1240 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[17][13] 547 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[56][11] 1135 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[113][15] 2055 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[56][2] 512 13
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[59][6] 698 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[31][8] 1325 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/twid_rA_0/twid_rA_0.tA_w_8_RNO_0 1274 36
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/genblk1.outBuff_0/outBuf_1/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R0C0/R_ADDR_1_inst 1429 7
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[11][12] 493 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[85][11] 1647 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/smFft_run_2_sqmuxa_i 1307 36
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/outQ[16] 1476 43
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[59][13] 537 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/outQ[18] 1411 33
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[16][14] 1838 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/inPr_dly_0/genblk1.delayLine[2][15] 1457 40
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/rdFFTtimer_0/rStage_r_RNO[0] 1295 33
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/genblk1.outBuff_0/outPQ[10] 1402 6
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/lut_0/T_1_00_31_0_.m126 1181 39
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[9][5] 384 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[102][15] 1945 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[96][2] 1843 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[26][1] 588 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[93][3] 1792 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[77][2] 1502 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[32][14] 1268 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[52][2] 1049 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[70][3] 1384 19
set_location PF_COREUART_0_0/PF_COREUART_0_0/make_TX/tx_byte[7] 1359 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[49][10] 677 19
set_location PF_COREUART_0_0/PF_COREUART_0_0/make_CLOCK_GEN/genblk1.baud_cntr[1] 1229 28
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[10][2] 410 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[108][0] 2062 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/twid_rA_0/tA[3] 1267 37
set_location PF_COREUART_0_0/PF_COREUART_0_0/make_RX/un1_samples7_1_0 1328 12
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/inBuf_wA_0/addrP_r2[6] 1308 34
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[30][10] 1359 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[113][11] 2146 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/outBufA_0/bit_dly_2/genblk1.delayLine[0]_3 1388 39
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[39][10] 842 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/postBflySw_0/muxP_w[25] 1536 36
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.piBuf/wP_w[0] 1423 27
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[117][9] 2159 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.piBuf/genblk1.memP/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R0C0/BLK_EN_inst 1350 28
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/genblk1.outBuff_0/outBuf_0/PolarFire_uram.uram_0/OR2_rD[3] 1411 6
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[0][2] 985 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/twid_rA_0/twid_rA_0.tA_w_7 1264 36
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/smBuf_full 1297 37
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.poBuf/genblk1.memP/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R1C0/R_ADDR_5_inst 1276 28
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[1][0] 472 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/outQ[15] 1432 43
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/outQ[13] 1401 43
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/sync_rAwA_w_0_a2_1 1301 39
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/inPi_dly_0/genblk1.delayLine[1][4] 1481 37
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/TAP_CHAIN[63].genblk1.muladd_0/FIR_DP_reg[27] 1447 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[3][1] 2128 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[6][14] 2044 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[69][14] 1163 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/twid_rA_0/timer_tick[3] 1273 37
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/wStage_r_5[1] 1278 33
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.piBuf/genblk1.memQ/PolarFire_uram.uram_0/OR2_rD[4] 1344 36
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/twid_rA_0/timer_tick_RNI06071[4] 1269 36
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[29][4] 1364 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[107][7] 2052 13
set_location PF_COREUART_0_0/PF_COREUART_0_0/make_RX/last_bit[0] 1321 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[12][14] 1972 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/genblk1.outBuff_0/outBuf_1/PolarFire_uram.uram_0/OR2_rD[20] 1366 27
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/cmplx_0/genblk1.cmplx18_0/half_1/genblk1.dly_c/genblk1.delayLine[0][2] 1311 46
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[15][9] 1876 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[91][13] 1788 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.poBuf/wQ_w[4] 1405 24
set_location PF_DSP_FLOW_DEMO_TOP_0/UART_IF_0/rfsm_srsts_i_a3_0_5[10] 1446 15
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[59][0] 1179 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/preBflySw_0/outQ[7] 1336 28
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[36][11] 1134 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[46][3] 758 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[14][7] 1926 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[25][12] 1538 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/genblk1.outBuff_0/inP_r[30] 1600 34
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/genblk1.outBuff_0/outBuf_0/PolarFire_uram.uram_0/OR2_rD[4] 1413 6
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[24][0] 1553 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.piBuf/genblk1.memQ/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R0C0/R_ADDR_0_inst 1318 28
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[72][0] 1415 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[83][13] 1622 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/inBuf_ldA_0/ldValid 1354 36
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/cmplx_0/genblk1.cmplx18_0/half_1/genblk1.dly_c/genblk1.delayLine[0][8] 1326 46
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/inBuf_wA_0/bflyA[2] 1346 34
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[53][1] 1082 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[34][1] 734 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[126][2] 1273 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[10][10] 2047 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[11][9] 1999 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/genblk1.outBuff_0/outD[30] 1517 28
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[32][6] 711 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[48][9] 710 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[104][3] 1973 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[27][2] 1449 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/inBuf_rA_0/mask1_r[4] 1262 43
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/outP[31] 1515 37
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[24][8] 537 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.poBuf/genblk1.memP/PolarFire_uram.uram_0/OR2_rD[13] 1454 33
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/postBflySw_0/outP[18] 1474 34
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[23][2] 1576 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[23][7] 532 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[48][6] 709 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[67][4] 1346 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/preBflySw_0/outP[6] 1328 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[111][7] 2131 16
set_location PF_COREUART_0_0/PF_COREUART_0_0/make_RX/rx_state_ns_1_0_.m16_2 1321 12
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[72][9] 1446 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/preBflySw_0/leftQ_r[14] 1461 40
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/postBflySw_0/rightP_r[2] 1424 37
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[0][7] 1049 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/outP[6] 1323 24
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.poBuf/wQ_w[12] 1433 33
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[25][15] 647 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/twid_wA_0/ngrst2rst_0/sync_ngrst_0/genblk1.delayLine[2] 1250 46
set_location PF_DSP_FLOW_DEMO_TOP_0/FILTERCONTROL_FSM_0/fsm[2] 1074 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[119][6] 2132 16
set_location PF_COREUART_0_0/PF_COREUART_0_0/make_CLOCK_GEN/genblk1.baud_cntr[7] 1258 28
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.poBuf/genblk1.memQ/PolarFire_uram.uram_0/OR2_rD[27] 1557 27
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[32][2] 1253 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FILTERCONTROL_FSM_0/FIR_WR_ADDR[3] 1176 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.piBuf/genblk1.memQ/PolarFire_uram.uram_0/OR2_rD[9] 1335 33
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[122][11] 2124 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[7][2] 420 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.poBuf/genblk1.memQ/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R0C1/BLK_EN_inst 1429 28
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[16][11] 1840 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/inBuf_wA_0/mask2_r[1] 1329 34
set_location reset_sync_0/reset_sync_0/dff_10 1707 16
set_location PF_DSP_FLOW_DEMO_TOP_0/UART_IF_0/R_ADDR_lm_0[6] 1466 15
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[97][14] 1919 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.poBuf/genblk1.memP/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R1C0/R_ADDR_2_inst 1275 28
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[59][14] 1190 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[95][12] 1849 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[124][1] 2075 25
set_location PF_DSP_FLOW_DEMO_TOP_0/UART_IF_0/rfsm_nss_i_0_0[0] 1276 15
set_location PF_COREUART_0_0/PF_COREUART_0_0/make_TX/xmit_state[2] 1222 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[81][8] 1586 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[60][11] 1183 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[10][0] 2041 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/genblk1.outBuff_0/outBuf_1/PolarFire_uram.uram_0/OR2_rD[6] 1422 6
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.poBuf/genblk1.memQ/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R1C0/R_ADDR_0_inst 1298 28
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/wStage_r_2_sqmuxa_i 1307 33
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/TAP_CHAIN[63].genblk1.muladd_0/FIR_DP_reg[15] 1527 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/preBflySw_0/muxP_w[27] 1556 27
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/genblk1.outBuff_0/outPQ[31] 1519 27
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[60][9] 1182 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[111][4] 2078 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[29][3] 662 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[14][0] 423 13
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[6][13] 2072 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/twidLUT_1/twidLUT_0/PolarFire_uram.uram_0/OR2_rD[2] 1202 33
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/lut_0/T_1_00_0_31_0_.m152 1247 33
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/outP[30] 1552 36
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[85][10] 1646 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[24][6] 1577 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.piBuf/genblk1.memQ/PolarFire_uram.uram_0/OR2_rD[2] 1338 27
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/wTimer_dly_2/genblk1.delayLine[0][4] 1321 37
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[113][7] 2154 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[9][1] 384 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[4][6] 429 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[107][12] 2023 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[81][0] 1561 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[7][14] 403 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[109][8] 2066 13
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/twid_wA_0/slowTimer/Q[1] 1250 43
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[24][3] 1552 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/rdFFTtimer_0/stage_timer/Q[2] 1290 34
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[6][6] 396 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[9][4] 408 13
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[125][14] 1892 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[56][5] 596 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[123][10] 2149 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[11][5] 390 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/twid_rA_0/twid_rA_0.tA_w_5 1262 36
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[111][3] 2079 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/cmplx_0/genblk1.cmplx18_0/half_0/genblk1.dly_c/genblk1.delayLine[0][15] 1420 46
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[87][4] 1683 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/twidLUT_1/rA_r[3] 1255 34
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[35][14] 1165 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[4][9] 424 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/inPi_w[10] 1548 39
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/rTimer_dly2/genblk1.delayLine[1][3] 1272 37
set_location reset_sync_0/reset_sync_0/dff_12 1723 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/preBflySw_0/muxQ_w[18] 1484 33
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[35][13] 827 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/lut_0/T_1_0_Or2_14 1194 33
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[56][6] 1133 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[6][9] 375 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[7][7] 385 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[28][4] 631 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/inPr_dly_0/genblk1.delayLine[0][15] 1463 40
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/inBuf_wA_0/addrP_r2[0] 1324 34
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[105][11] 2019 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/preBflySw_0/muxP_w[1] 1329 27
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/preBflySw_0/muxQ_w[14] 1460 39
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/genblk1.outBuff_0/inQ_r[3] 1420 10
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/inBuf_rA_0/bflyA[0] 1272 43
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[93][2] 1791 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[23][1] 540 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/genblk1.outBuff_0/outBuf_1/PolarFire_uram.uram_0/OR2_rD[7] 1403 6
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.poBuf/genblk1.memP/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R0C0/R_ADDR_0_inst 1294 28
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[88][13] 1709 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/genblk1.outBuff_0/outBuf_0/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R0C1/R_ADDR_4_inst 1383 28
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/inPr_w[13] 1444 36
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[84][6] 1621 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[55][0] 1119 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[64][15] 973 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/inPr_w[9] 1333 39
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[50][11] 1036 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[119][8] 2141 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[71][8] 1421 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[45][12] 810 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[113][4] 2171 19
set_location PF_COREUART_0_0/PF_COREUART_0_0/make_RX/stop_strobe_1_sqmuxa_0_a4 1324 12
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/twidLUT_1/twidLUT_0/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R0C1/R_ADDR_5_inst 1235 34
set_location PF_DSP_FLOW_DEMO_TOP_0/UART_IF_0/DATA_OUT_11_RNO[6] 1428 15
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/lut_0/T_1_00_0_31_0_.m264_2_1_0 1169 39
set_location PF_DSP_FLOW_DEMO_TOP_0/UART_IF_0/un1_RAM_REN_0_sqmuxa_1_i_o2 1224 12
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[98][4] 1567 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/genblk1.outBuff_0/outBuf_1/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R1C2/R_ADDR_0_inst 1502 28
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/twid_rA_0/tA[1] 1260 37
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[6][12] 434 13
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[45][9] 821 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/inPi_dly_0/genblk1.delayLine[2][13] 1520 37
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[90][1] 1769 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/postBflySw_0/muxP_w[6] 1397 36
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[4][5] 415 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/rdFFTtimer_0/stage_timer/tc_3_0_a2 1287 33
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[38][4] 778 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/cmplx_0/genblk1.cmplx18_0/half_1/genblk1.dly_c/genblk1.delayLine[0][0] 1313 46
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[79][7] 1562 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[39][15] 862 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/inBuf_ldA_0/ldCount/Q_lm_0[5] 1359 36
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/postBflySw_0/outP[21] 1463 28
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[45][6] 822 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[6][5] 407 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/outQ[28] 1547 39
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[28][15] 651 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/smPong_2_sqmuxa_i_i 1297 36
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/inPr_dly_0/genblk1.delayLine[2][13] 1449 37
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[15][14] 1863 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/genblk1.outBuff_0/outBuf_1/PolarFire_uram.uram_0/OR2_rD[2] 1426 6
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[4][11] 397 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/inBuf_rA_0/addrP_w[4] 1270 42
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[94][0] 1804 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[113][3] 2123 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[0][14] 990 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[41][9] 946 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/postBflySw_0/outQ[18] 1469 37
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[118][10] 2136 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[79][11] 1561 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/twidLUT_1/rA_r[5] 1261 34
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/inBuf_wA_0/offsetPQ_r1[0] 1333 34
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/postBflySw_0/rightP_r[3] 1401 40
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/postBflySw_0/muxQ_w[26] 1525 36
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[50][4] 1012 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/genblk1.outBuff_0/outBuf_0/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R0C0/R_ADDR_5_inst 1393 7
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/outP[30] 1514 37
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[31][14] 710 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[34][7] 751 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[14][7] 399 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[24][12] 631 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[41][6] 936 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/inBuf_rA_0/offsetPQ_r2[5] 1281 43
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/genblk1.outBuff_0/outD[11] 1403 28
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[12][2] 1972 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/autoScale_0/un1_startFFT 1351 42
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/inPi_dly_0/genblk1.delayLine[0][11] 1554 40
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[1][13] 1934 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[9][14] 410 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/outBufA_0/outBuf_rA_0/Q_lm_0[6] 1402 39
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/twid_rA_0/twid_rA_0.tA_w_8 1265 36
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/genblk1.outBuff_0/outBuf_0/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R1C1/BLK_EN_inst 1411 28
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/inBuf_rA_0/addrP_r2[4] 1270 43
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/lut_0/T_1_00_0_31_0_.N_220_i 1206 39
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[61][2] 496 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[14][3] 422 13
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/postBflySw_0/muxP_w[2] 1424 36
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/lut_0/T_1_00_31_0_.m12_i 1226 42
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/inQi_w[0] 1382 45
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[78][6] 1542 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[74][14] 1479 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/lut_0/T_1_00_31_0_.m32 1178 33
set_location PF_DSP_FLOW_DEMO_TOP_0/UART_IF_0/DATA_WADDR[6] 1059 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[9][14] 1979 25
set_location PF_DSP_FLOW_DEMO_TOP_0/UART_IF_0/rx_en_RNO_2 1206 15
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/TAP_CHAIN[63].genblk1.muladd_0/FIR_DP_reg[23] 1671 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[32][9] 1271 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FILTERCONTROL_FSM_0/COEF_RD_ENABLE_0_i_0_0 1074 18
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[10][9] 371 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[42][1] 904 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.poBuf/wQ_w[0] 1419 27
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[19][4] 451 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/wStage_r[2] 1276 34
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/genblk1.outBuff_0/outBuf_0/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R0C1/R_ADDR_2_inst 1382 28
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/postBflySw_0/outQ[25] 1534 37
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[121][4] 2162 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/rdFFTtimer_0/preRdValid_0_sqmuxa_i_a2 1287 36
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[46][6] 942 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[27][2] 613 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/lut_0/T_1_00_0_31_0_.m206_2_1 1240 36
set_location reset_sync_0/reset_sync_0/dff_6 1706 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/rdFFTtimer_0/preRdValid_2_sqmuxa_1_i_a2_2_0 1295 39
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[46][7] 941 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[62][11] 1226 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[6][8] 2080 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[26][12] 1513 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/postBflySw_0/leftQ_r[7] 1408 40
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[108][3] 2046 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/outP[19] 1503 37
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/preBflySw_0/muxQ_w[27] 1548 27
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[25][3] 590 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[42][8] 892 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[49][0] 999 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/postBflySw_0/muxP_w[14] 1475 36
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/lut_0/T_1_00_0_31_0_.m47 1207 42
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/inBuf_rA_0/un1_addrP_w[6] 1264 42
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[6][12] 2036 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[19][11] 445 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/postBflySw_0/outP[6] 1383 34
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/preBflySw_0/leftQ_r[11] 1444 34
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[100][15] 1922 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[61][12] 496 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.piBuf/genblk1.memP/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R1C0/BLK_EN_inst 1311 28
set_location PF_DSP_FLOW_DEMO_TOP_0/UART_IF_0/WDATA[1] 1194 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[1][12] 483 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[91][3] 1780 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[14][8] 399 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[89][7] 1729 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[27][11] 639 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/rdFFTtimer_0/stage_timer/tc 1287 34
set_location PF_COREUART_0_0/PF_COREUART_0_0/make_CLOCK_GEN/xmit_cntr[3] 1368 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/inBuf_wA_0/mask1_r[0] 1327 34
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/postBflySw_0/outQ[5] 1408 37
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[124][7] 2139 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[63][14] 1260 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[50][9] 1035 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[48][1] 991 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.piBuf/wQ_w[12] 1431 33
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[1][3] 2005 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[14][14] 509 28
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/preBflySw_0/outP[10] 1341 37
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[99][8] 1909 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[24][6] 554 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FILTERCONTROL_FSM_0/FFT_WADDR[4] 1252 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[88][14] 1708 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[5][0] 387 25
set_location PF_DSP_FLOW_DEMO_TOP_0/UART_IF_0/DATA_OUT_11_RNO[0] 1420 15
set_location PF_COREUART_0_0/PF_COREUART_0_0/make_TX/xmit_bit_sel[1] 1362 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.poBuf/genblk1.memQ/PolarFire_uram.uram_0/OR2_rD[3] 1293 27
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/genblk1.outBuff_0/outBuf_1/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R1C0/R_ADDR_2_inst 1436 7
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[98][11] 1858 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[123][4] 2129 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[102][6] 1963 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.piBuf/genblk1.memP/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R1C2/BLK_EN_inst 1598 37
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/wTimer_dly_2/genblk1.delayLine[1][3] 1353 37
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[34][10] 750 19
set_location reset_sync_0/reset_sync_0/dff_13 1717 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[110][1] 2081 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[90][12] 1754 25
set_location PF_COREUART_0_0/PF_COREUART_0_0/make_RX/receive_count[3] 1317 13
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[3][0] 2031 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/slowClock_0/divider_RNO[2] 1255 45
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/genblk1.outBuff_0/outBuf_0/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R0C1/BLK_EN_inst 1381 28
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[102][5] 1948 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/rTimer_dly2/genblk1.delayLine[0][0] 1296 43
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/lut_0/T_1_00_0_31_0_.m229 1218 42
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/outQ[30] 1556 36
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/un1_bflyRiskOV_w_3 1420 42
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/postBflySw_0/outP[16] 1465 34
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[34][10] 1176 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.poBuf/genblk1.memP/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R1C2/R_ADDR_1_inst 1576 34
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.piBuf/wQ_w[29] 1539 33
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.piBuf/genblk1.memP/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R1C1/R_ADDR_4_inst 1483 34
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[45][11] 927 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[117][15] 2103 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[3][2] 1990 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[57][3] 1154 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/outBufA_0/outBuf_rA_0/Q_lm_0[3] 1388 36
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[12][8] 1995 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[50][0] 629 19
set_location PF_DSP_FLOW_DEMO_TOP_0/UART_IF_0/rfsm_srsts_i_a2_6[5] 1044 15
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/outQ[8] 1327 39
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/genblk1.outBuff_0/outBuf_1/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R1C2/BLK_EN_inst 1501 28
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[74][5] 1475 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[87][3] 1682 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[52][11] 1069 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/twidLUT_1/twidLUT_0/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R0C2/R_ADDR_5_inst 1248 28
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/cmplx_0/rndHr_0/outp[11] 1383 43
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/preBflySw_0/outP[22] 1396 46
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[75][7] 1489 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[38][12] 1091 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[79][2] 1537 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.piBuf/genblk1.memQ/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R0C1/BLK_EN_inst 1409 34
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.piBuf/genblk1.memP/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R0C2/R_ADDR_1_inst 1599 28
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[3][2] 421 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[39][3] 1011 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[1][5] 2004 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[125][2] 1561 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.piBuf/genblk1.memQ/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R0C0/R_ADDR_2_inst 1357 28
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[37][13] 829 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/inPi_dly_0/genblk1.delayLine[0][6] 1400 46
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[4][1] 422 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[77][1] 1501 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[22][5] 499 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/ctrl_dly_0/genblk1.delayLine[1][0] 1469 34
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[51][1] 1021 25
set_location PF_COREUART_0_0/PF_COREUART_0_0/make_RX/rx_state_ns_1_0_.m8 1330 12
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[53][6] 1090 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/twidLUT_1/twidLUT_0/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R1C1/R_ADDR_4_inst 1221 28
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/genblk1.outBuff_0/outBuf_0/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R0C2/R_ADDR_1_inst 1619 34
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/twid_wA_0/ngrst2rst_0/sync_ngrst_0/genblk1.delayLine[0] 1256 46
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[31][12] 709 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[3][15] 440 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[119][5] 1786 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[6][1] 396 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/postBflySw_0/outP[12] 1458 28
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/outQ[14] 1461 39
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[19][5] 1757 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[4][4] 471 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[47][3] 962 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/preBflySw_0/outP[31] 1549 37
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/preBflySw_0/outP[25] 1556 40
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[38][15] 1082 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[62][14] 510 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[114][9] 2159 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[58][14] 514 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[24][9] 1576 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[21][7] 483 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[26][2] 1482 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/lut_0/T_1_00_0_31_0_.m175 1180 36
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[37][8] 794 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[6][4] 401 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/postBflySw_0/leftQ_r[23] 1506 40
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/genblk1.outBuff_0/inP_r[29] 1603 34
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[53][14] 1100 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/genblk1.outBuff_0/inQ_r[14] 1438 34
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[16][1] 465 13
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[52][3] 546 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/cmplx_0/rndHr_0/outp[2] 1374 43
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/inPi_dly_0/genblk1.delayLine[1][12] 1555 37
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[58][8] 652 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[17][4] 1803 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.piBuf/genblk1.memP/PolarFire_uram.uram_0/OR2_rD[4] 1326 33
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[94][11] 1828 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[117][11] 2143 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[14][10] 1925 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/lut_0/T_1_00_31_0_.m274 1246 33
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[13][4] 1947 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[55][15] 546 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[94][7] 1827 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[84][15] 1633 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[84][13] 1632 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[60][10] 804 16
set_location PF_COREUART_0_0/PF_COREUART_0_0/make_CLOCK_GEN/genblk1.baud_cntr_RNIB4LR3[0] 1234 27
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/inBuf_rA_0/offsetPQ_r2[3] 1280 43
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/outQ[0] 1340 27
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[27][11] 1470 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.piBuf/genblk1.memP/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R1C0/R_ADDR_5_inst 1310 28
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/preBflySw_0/muxQ_w[12] 1472 33
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[104][7] 1994 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[15][4] 370 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[18][12] 1802 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/preBflySw_0/rightP_r[21] 1418 37
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/lut_0/T_1_0_Or2_1 1193 33
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[5][13] 442 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[126][13] 1302 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/genblk1.outBuff_0/inP_r[21] 1450 28
set_location PF_DSP_FLOW_DEMO_TOP_0/UART_IF_0/DATA_OUT_11_0_2_0[4] 1425 15
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[57][4] 694 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.poBuf/wP_w[22] 1585 33
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.piBuf/wP_w[10] 1402 24
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[46][12] 791 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[40][2] 986 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[9][11] 2063 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/inPr_dly_0/genblk1.delayLine[0][12] 1450 37
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[53][4] 504 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[14][6] 411 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[36][13] 1140 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[45][0] 915 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/rdFFTtimer_0/preRdValid_2_sqmuxa_1_i_o2 1300 36
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/lut_0/T_1_00_0_31_0_.m102 1217 39
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[86][15] 1672 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/un1_bflyRiskOV_w 1422 42
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[43][13] 902 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[124][15] 1981 13
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[18][15] 1801 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[54][7] 500 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[3][7] 415 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[27][15] 1483 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[62][0] 517 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/lut_0/T_1_00_31_0_.m7 1229 39
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[85][7] 1645 16
set_location PF_COREUART_0_0/PF_COREUART_0_0/make_CLOCK_GEN/xmit_pulse 1350 15
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/preBflySw_0/outQ[0] 1337 28
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.poBuf/wQ_w[29] 1547 33
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/outBuf_wA_r[2] 1358 28
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/outP[6] 1410 43
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.piBuf/genblk1.memP/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R1C2/R_ADDR_2_inst 1597 37
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[30][9] 678 19
set_location PF_COREUART_0_0/PF_COREUART_0_0/make_RX/rcv_sm.rx_state19_NE_0 1320 15
set_location PF_DSP_FLOW_DEMO_TOP_0/UART_IF_0/DATA_OUT_11_0_1[0] 1417 15
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[69][4] 1370 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[29][13] 685 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[67][2] 1345 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[95][8] 1837 16
set_location PF_COREUART_0_0/PF_COREUART_0_0/make_TX/tx_byte[4] 1361 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/postBflySw_0/leftQ_r[18] 1503 40
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.piBuf/genblk1.memP/PolarFire_uram.uram_0/OR2_rD[9] 1330 33
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[25][11] 1523 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/postBflySw_0/muxP_w[29] 1436 36
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/twidLUT_1/twidLUT_0/PolarFire_uram.uram_0/OR2_rD[7] 1201 33
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/postBflySw_0/outP[9] 1395 37
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[120][0] 2192 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/outBufA_0/outBuf_rA_0/Q_RNIJFJM2[1] 1400 36
set_location PF_DSP_FLOW_DEMO_TOP_0/UART_IF_0/un1_RAM_REN_0_sqmuxa_1_i_a2_1_RNIO51K 1210 15
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/inBuf_wA_0/mask2_r[5] 1309 34
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[53][11] 533 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[43][6] 914 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/lut_0/T_1_0_Or2_6 1206 42
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/genblk1.outBuff_0/inP_r[4] 1400 10
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[59][14] 509 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[7][12] 474 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[36][10] 1132 19
set_location PF_COREUART_0_0/PF_COREUART_0_0/make_RX/rx_state_ns_1_0_.m18 1323 12
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[43][7] 913 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/preBflySw_0/muxQ_w[4] 1311 39
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[60][3] 1205 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[8][15] 1988 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[16][13] 1837 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[60][7] 1180 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[64][6] 1003 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[1][11] 497 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/preBflySw_0/rightP_r[17] 1426 40
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[62][12] 1207 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/lut_0/T_1_00_0_31_0_.m146_2_0_1 1180 39
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[9][10] 2066 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/inPi_dly_0/genblk1.delayLine[0][8] 1563 40
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/lut_0/T_1_0_Or2_24 1246 36
set_location PF_DSP_FLOW_DEMO_TOP_0/UART_IF_0/rfsm_srsts_i_a3[7] 1248 18
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/cmplx_0/rndHr_0/outp[4] 1376 43
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[8][10] 2064 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/postBflySw_0/outQ[16] 1471 40
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[91][2] 1779 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[21][1] 468 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[102][10] 1962 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[22][1] 1596 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[19][3] 1756 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.piBuf/genblk1.memP/PolarFire_uram.uram_0/OR2_rD[2] 1324 27
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.piBuf/genblk1.memP/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R0C1/R_ADDR_4_inst 1490 28
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.poBuf/genblk1.memP/PolarFire_uram.uram_0/CFG2_BLKZ0[0] 1489 33
set_location PF_COREUART_0_0/PF_COREUART_0_0/make_CLOCK_GEN/xmit_cntr[2] 1376 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[57][5] 1153 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[126][12] 1298 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[57][9] 484 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[4][1] 2134 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/preBflySw_0/outP[29] 1552 37
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[44][5] 903 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/postBflySw_0/outP[19] 1475 34
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[71][10] 1428 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[75][2] 1489 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/outQ[17] 1407 33
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[44][9] 914 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[53][9] 517 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[57][1] 802 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/preBflySw_0/rightP_r[5] 1303 34
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/lut_0/T_1_00_0_31_0_.m272_1 1228 36
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[45][10] 926 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[53][1] 532 19
set_location PF_DSP_FLOW_DEMO_TOP_0/UART_IF_0/un1_RAM_REN_0_sqmuxa_2_0_o3 1452 15
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.piBuf/genblk1.memQ/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R1C1/R_ADDR_0_inst 1397 34
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[37][0] 771 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/postBflySw_0/outQ[12] 1463 37
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/inBuf_ldA_0/loadOver_w 1346 36
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[61][1] 633 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[16][10] 1856 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[55][8] 482 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.piBuf/genblk1.memQ/PolarFire_uram.uram_0/OR2_rD[27] 1550 27
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.piBuf/genblk1.memQ/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R0C0/R_ADDR_5_inst 1342 34
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[32][15] 1264 19
set_location PF_COREUART_0_0/PF_COREUART_0_0/make_TX/txrdy_int_1_sqmuxa_i 1293 15
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/lut_0/T_1_00_31_0_.m264 1179 39
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[89][4] 1715 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[106][15] 1957 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[34][5] 733 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[111][14] 2030 28
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/postBflySw_0/rightP_r[24] 1539 37
set_location PF_DSP_FLOW_DEMO_TOP_0/UART_IF_0/rfsm_RNO[8] 1252 18
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[47][11] 749 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/inBuf_rA_0/mask2_r[2] 1285 43
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[51][8] 604 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/lut_0/T_1_00_31_0_.m209 1227 36
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[46][2] 917 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.piBuf/wQ_w[27] 1514 33
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[117][2] 2173 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/postBflySw_0/muxP_w[23] 1517 36
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/outQ[4] 1392 43
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/genblk1.outBuff_0/outBuf_0/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R1C1/R_ADDR_1_inst 1406 28
set_location PF_COREUART_0_0/PF_COREUART_0_0/make_TX/xmit_cnt.xmit_bit_sel_3_a3_0_a2[0] 1363 15
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[82][14] 1611 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[126][6] 1289 25
set_location PF_DSP_FLOW_DEMO_TOP_0/UART_IF_0/un1_RAM_REN_0_sqmuxa_1_i_a2_1 1204 15
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[48][13] 1013 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[52][12] 1081 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[44][4] 841 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/inBuf_ldA_0/ldCount/Q_lm_0[1] 1361 36
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/preBflySw_0/outQ[12] 1472 34
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[11][10] 388 13
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/inBuf_wA_0/un1_offsetPQ_w_6 1337 33
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[120][14] 2075 13
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[67][8] 1332 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/twid_rA_0/tA[0] 1268 37
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.poBuf/wP_w[30] 1596 33
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/rdFFTtimer_0/rA_timer/Q[7] 1306 40
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[63][8] 527 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[47][15] 734 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[80][2] 1551 16
set_location PF_DSP_FLOW_DEMO_TOP_0/UART_IF_0/RAM_REN_0_sqmuxa_0_a2 1220 15
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[12][15] 2008 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[13][1] 394 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/preBflySw_0/outQ[15] 1452 40
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.poBuf/genblk1.memQ/PolarFire_uram.uram_0/OR2_rD[30] 1555 36
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/genblk1.outBuff_0/outBuf_1/PolarFire_uram.uram_0/OR2_rD[3] 1421 6
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[100][1] 1902 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[90][5] 1755 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/genblk1.outBuff_0/inP_r[16] 1405 28
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/genblk1.outBuff_0/outBuf_0/PolarFire_uram.uram_0/OR2_rD[17] 1407 27
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[118][9] 2148 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[87][12] 1693 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/rdFFTtimer_0/rA_timer/Q_lm_0[1] 1307 39
set_location PF_COREUART_0_0/PF_COREUART_0_0/make_CLOCK_GEN/genblk1.baud_cntr_lm_0[2] 1224 27
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[103][13] 1950 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[65][4] 1293 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[50][8] 1034 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[109][0] 2086 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[62][5] 1226 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[32][13] 1266 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/outQ[24] 1508 43
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[72][15] 1438 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[57][7] 1151 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[45][11] 819 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/preBflySw_0/outQ[28] 1542 40
set_location PF_DSP_FLOW_DEMO_TOP_0/UART_IF_0/DATA_OUT[1] 1406 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[29][12] 684 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[37][3] 775 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/smStartFFT 1296 36
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.poBuf/genblk1.memQ/PolarFire_uram.uram_0/OR2_rD[17] 1406 33
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/TAP_CHAIN[63].genblk1.muladd_0/FIR_DP_reg[20] 1526 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[28][12] 650 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/outQ[24] 1562 39
set_location PF_DSP_FLOW_DEMO_TOP_0/UART_IF_0/rfsm_nss_i_0_a3_2[0] 1273 15
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[108][7] 2054 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/preBflySw_0/outQ[6] 1322 25
set_location PF_COREUART_0_0/PF_COREUART_0_0/make_RX/receive_count_RNO[3] 1317 12
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[40][5] 990 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[108][12] 2025 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/wStage_r[0] 1279 34
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/genblk1.outBuff_0/outBuf_1/PolarFire_uram.uram_0/OR2_rD[4] 1427 6
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/rdFFTtimer_0/stage_timer/Q[3] 1286 34
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/preBflySw_0/leftQ_r[26] 1571 34
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/twid_wA_0/slowTimer/Q[5] 1254 43
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[63][5] 507 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[106][14] 1988 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.poBuf/wQ_w[14] 1437 33
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[37][2] 769 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/genblk1.outBuff_0/inQ_r[8] 1415 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/rdFFTtimer_0/bit_dly_5/genblk1.delayLine[0]_3 1357 39
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[6][9] 2060 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[20][9] 518 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[29][2] 661 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[119][14] 2079 13
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[60][0] 1204 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.poBuf/wQ_w[27] 1544 33
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[87][1] 1680 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/lut_0/T_1_00_0_31_0_.m160_1 1238 39
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[34][4] 1203 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[37][12] 1089 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[24][5] 1550 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/postBflySw_0/outQ[19] 1452 37
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[12][13] 1964 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/inQi_w[12] 1416 45
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.poBuf/genblk1.memP/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R1C1/R_ADDR_0_inst 1456 34
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/lut_0/T_1_00_31_0_.m51 1205 39
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[120][8] 2140 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[100][9] 1924 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/inPi_w[5] 1395 45
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[83][12] 1621 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[12][15] 508 19
set_location PF_COREUART_0_0/PF_COREUART_0_0/make_CLOCK_GEN/xmit_cntr[0] 1227 28
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/sync_rw_1/genblk1.delayLine[1] 1290 37
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/preBflySw_0/muxQ_w[11] 1447 33
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[29][11] 1398 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[23][15] 614 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.poBuf/wQ_w[18] 1435 36
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[116][6] 2174 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[40][8] 997 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.piBuf/genblk1.memQ/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R0C1/R_ADDR_0_inst 1409 28
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[51][6] 1035 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/postBflySw_0/rightP_r[14] 1475 37
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[112][13] 2051 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/lut_0/T_1_0_Or2_19 1235 33
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[85][4] 1635 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[22][0] 502 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[39][11] 841 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[90][13] 1753 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/preBflySw_0/muxP_w[18] 1477 33
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/lut_0/T_1_00_0_31_0_.m264_2 1168 39
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[48][14] 1012 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[23][10] 1613 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[93][11] 1814 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[70][14] 1262 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/outQ[28] 1512 43
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[17][12] 1825 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/cmplx_0/rndHi_0/outp[8] 1491 43
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[16][4] 1857 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/preBflySw_0/muxP_w[14] 1453 39
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/twidLUT_1/twidLUT_0/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R0C0/R_ADDR_1_inst 1209 34
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/twidLUT_1/twidLUT_0/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R0C1/R_ADDR_4_inst 1223 28
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/preBflySw_0/outQ[19] 1478 34
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[74][3] 1469 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/genblk1.outBuff_0/outPQ[2] 1417 6
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[34][14] 805 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[20][15] 536 28
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[18][6] 1779 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[86][13] 1671 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/postBflySw_0/outP[14] 1455 28
set_location PF_COREUART_0_0/PF_COREUART_0_0/make_RX/rcv_cnt.receive_count_3_i_a2[3] 1310 12
set_location PF_DSP_FLOW_DEMO_TOP_0/UART_IF_0/DATA_OUT[5] 1404 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.poBuf/genblk1.wEn_P_r 1493 34
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[59][3] 1178 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[36][1] 766 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[14][2] 380 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[106][8] 2021 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.piBuf/genblk1.memQ/PolarFire_uram.uram_0/OR2_rD[25] 1559 33
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/twid_rA_0/timer_tick[4] 1269 37
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/preBflySw_0/rightP_r[20] 1480 37
set_location PF_DSP_FLOW_DEMO_TOP_0/UART_IF_0/COEF_WADDR[4] 1032 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/lut_0/T_1_0_Or2_0 1179 36
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[89][3] 1737 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[107][4] 2041 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[34][6] 1184 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.poBuf/genblk1.memQ/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R0C0/R_ADDR_4_inst 1300 34
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[56][4] 629 16
set_location PF_COREUART_0_0/PF_COREUART_0_0/make_RX/samples[0] 1313 13
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[22][10] 487 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[26][8] 603 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/preBflySw_0/rightP_r[22] 1560 37
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/inPr_dly_0/genblk1.delayLine[3][10] 1383 40
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/postBflySw_0/outP[17] 1468 28
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/lut_0/T_1_0_Or2_2 1205 42
set_location PF_COREUART_0_0/PF_COREUART_0_0/make_CLOCK_GEN/genblk1.baud_cntr[5] 1254 28
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[72][4] 1418 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/rA_r[4] 1273 40
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[64][10] 972 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[17][7] 1826 19
set_location PF_COREUART_0_0/PF_COREUART_0_0/make_CLOCK_GEN/make_xmit_clock.xmit_cntr_3_1.SUM[1] 1369 15
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/outBufA_0/outBuf_rA_0/Q[6] 1402 40
set_location PF_COREUART_0_0/PF_COREUART_0_0/make_CLOCK_GEN/genblk1.baud_cntr[6] 1249 28
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[27][0] 1448 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[79][1] 1536 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[4][10] 2007 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[60][6] 1178 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[13][7] 1961 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/lut_0/T_1_00_31_0_.m75 1191 42
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/outQ[27] 1554 27
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[23][0] 1575 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[25][13] 1537 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[92][13] 1800 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[43][2] 889 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/outBuf_wA_r[5] 1407 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[12][0] 1971 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[49][3] 998 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[108][14] 2004 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/genblk1.outBuff_0/inP_r[25] 1609 34
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/preBflySw_0/leftQ_r[15] 1448 34
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[97][6] 1894 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[39][8] 840 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[10][14] 411 25
set_location PF_DSP_FLOW_DEMO_TOP_0/UART_IF_0/rfsm[6] 1200 13
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/inPi_dly_0/genblk1.delayLine[3][15] 1516 37
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/cmplx_0/genblk1.cmplx18_0/half_0/genblk1.dly_c/genblk1.delayLine[0][14] 1436 46
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[47][4] 961 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[122][2] 2127 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[81][11] 1585 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.poBuf/wQ_w[15] 1422 33
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/genblk1.outBuff_0/outBuf_1/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R1C0/R_ADDR_5_inst 1434 7
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[75][14] 1502 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/outBuf_wEn 979 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[116][8] 2138 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/genblk1.outBuff_0/outBuf_1/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R0C1/R_ADDR_3_inst 1369 28
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[50][2] 1010 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[44][15] 937 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[44][13] 904 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[118][13] 2126 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/postBflySw_0/muxQ_w[16] 1471 39
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.poBuf/genblk1.memQ/PolarFire_uram.uram_0/OR2_rD[26] 1561 33
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[41][6] 867 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[7][15] 1980 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/inBuf_rA_0/mask1_shft_stage_5_i 1285 42
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/inPr_dly_0/genblk1.delayLine[3][4] 1373 40
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[41][7] 870 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/genblk1.outBuff_0/outPQ[14] 1392 27
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/inBuf_rA_0/un1_offsetPQ_w_5 1264 39
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[54][15] 541 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[25][2] 589 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/cmplx_0/rndHi_0/outp[7] 1490 43
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/genblk1.outBuff_0/outBuf_1/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R1C0/R_ADDR_4_inst 1439 7
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[69][10] 1366 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[111][1] 2107 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[16][0] 432 13
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[102][11] 1960 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/lut_0/T_1_00_31_0_.m63 1233 42
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/rTimer_dly2/genblk1.delayLine[0][5] 1299 43
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[38][1] 1048 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[14][1] 1897 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/tA_r[3] 1249 37
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[46][15] 952 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[111][12] 2069 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[49][11] 675 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/outBufA_0/bit_dly_0/genblk1.delayLine[0] 1386 40
set_location PF_DSP_FLOW_DEMO_TOP_0/UART_IF_0/rfsm_srsts_i_0[10] 1304 18
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.poBuf/genblk1.memP/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R0C1/R_ADDR_0_inst 1477 28
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[4][0] 2038 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/outBufA_0/outBuf_rA_0/tc 1382 40
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/wTimer_0/Q[2] 1311 37
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[56][9] 491 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[34][8] 1179 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[67][1] 1344 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/outBufA_0/outBuf_rA_0/Q_lm_0[7] 1385 39
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[23][12] 1610 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[57][13] 534 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/postBflySw_0/rightP_r[9] 1395 40
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[60][9] 495 19
set_location PF_COREUART_0_0/PF_COREUART_0_0/make_RX/rcv_cnt.receive_count_3_i_a4[3] 1311 12
set_location PF_DSP_FLOW_DEMO_TOP_0/UART_IF_0/rfsm_RNI5J291[3] 1026 15
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[4][2] 2009 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/lut_0/T_1_00_31_0_.m87 1217 42
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[56][1] 705 19
set_location PF_DSP_FLOW_DEMO_TOP_0/UART_IF_0/DATA_OUT_11[2] 1401 15
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[26][12] 664 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/inPr_dly_0/genblk1.delayLine[0][10] 1342 37
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[27][6] 1464 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.poBuf/wQ_w[3] 1422 27
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.poBuf/genblk1.memP/PolarFire_uram.uram_0/OR2_rD[26] 1564 33
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[69][2] 1369 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/genblk1.outBuff_0/outD[21] 1408 28
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[27][15] 668 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.piBuf/genblk1.memQ/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R1C1/R_ADDR_2_inst 1429 37
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[23][6] 1608 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[27][3] 1424 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[15][14] 500 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/datai_re_r[3] 1416 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/postBflySw_0/leftQ_r[17] 1479 43
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[111][10] 2109 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[43][10] 891 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[23][3] 1574 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[70][0] 1382 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/outBuf_rA_r[4] 1390 37
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/inPr_dly_0/genblk1.delayLine[1][11] 1337 37
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[105][14] 1987 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[103][10] 1994 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[50][2] 626 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[64][9] 1290 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[30][6] 674 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[86][6] 1660 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[15][6] 1874 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/rdFFTtimer_0/rA_timer/Q_lm_0[2] 1302 39
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/postBflySw_0/outQ[23] 1529 37
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.piBuf/wQ_w[14] 1432 33
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[113][1] 2088 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/preBflySw_0/outP[21] 1420 40
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/inPr_dly_0/genblk1.delayLine[1][4] 1349 40
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/tA_r[0] 1268 34
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[24][14] 1574 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[9][6] 2028 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/cmplx_0/rndHi_0/outp[0] 1483 43
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/smFft_run_1_sqmuxa 1306 36
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/genblk1.outBuff_0/outD[15] 1393 28
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[125][6] 1899 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[71][13] 1435 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[55][3] 1118 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/lut_0/T_1_00_0_31_0_.m65_2 1231 42
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/postBflySw_0/outQ[14] 1456 37
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[1][6] 461 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[70][9] 1395 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/preBflySw_0/outQ[30] 1550 37
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/inBuf_rA_0/mask1_r[2] 1284 43
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/twidLUT_1/twidLUT_0/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R0C2/R_ADDR_4_inst 1270 34
set_location PF_COREUART_0_0/PF_COREUART_0_0/make_RX/rcv_cnt.receive_count_3_i_a2_1_0[0] 1318 12
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[59][10] 1167 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[11][6] 2018 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[85][3] 1634 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[59][5] 1177 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[109][3] 2078 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[58][0] 1171 25
set_location PF_COREUART_0_0/PF_COREUART_0_0/make_RX/rx_bit_cnt[3] 1327 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[125][15] 2111 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[96][0] 1668 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[7][11] 349 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/postBflySw_0/outQ[17] 1472 37
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[75][1] 1488 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[121][11] 2113 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[1][15] 1933 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[51][12] 635 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[1][9] 462 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/lut_0/T_1_00_31_0_.m119 1204 39
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/postBflySw_0/leftQ_r[22] 1526 43
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.piBuf/wQ_w[18] 1419 33
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[45][13] 830 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[36][7] 784 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[16][7] 414 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[5][7] 2087 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[11][1] 375 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[39][0] 843 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/lut_0/T_1_00_0_31_0_.m65_2_1 1230 42
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.piBuf/genblk1.memP/PolarFire_uram.uram_0/CFG2_BLKZ0[1] 1495 33
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[45][3] 939 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/outP[9] 1413 43
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[9][4] 2058 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/genblk1.outBuff_0/outD[6] 1420 7
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[114][12] 2061 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/lut_0/T_1_00_31_0_.m96 1204 42
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[35][8] 780 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/lut_0/T_1_00_31_0_.m119_1_0 1203 39
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[16][3] 447 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.poBuf/genblk1.memQ/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R1C2/R_ADDR_3_inst 1557 28
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/rdFFTtimer_0/rA_timer/Q[1] 1307 40
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/inPr_dly_0/genblk1.delayLine[1][10] 1339 37
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.piBuf/wQ_w[30] 1546 36
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/genblk1.outBuff_0/outBuf_0/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R0C0/R_ADDR_4_inst 1405 7
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/lut_0/T_1_00_0_31_0_.m245 1216 33
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/inPr_dly_0/genblk1.delayLine[1][12] 1431 43
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[56][14] 550 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.piBuf/genblk1.memP/PolarFire_uram.uram_0/OR2_rD[25] 1613 33
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.poBuf/wP_w[0] 1425 27
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/rdFFTtimer_0/bit_dly_5/genblk1.delayLine[0] 1357 40
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[14][9] 1923 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/cmplx_0/rndHi_0/outp[3] 1486 43
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[3][10] 432 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[114][2] 2151 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/lut_0/T_1_00_0_31_0_.m186_2_1 1177 33
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[121][0] 2152 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/genblk1.outBuff_0/outBuf_1/PolarFire_uram.uram_0/OR2_rD[24] 1528 27
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[33][1] 730 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/rw_dly_lastStage/genblk1.delayLine[1] 1312 43
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/twid_rA_0/timer_tick[1] 1275 37
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[94][1] 1764 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/ctrl_dly_0/genblk1.delayLine[0][1] 1347 43
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/postBflySw_0/outQ[9] 1412 40
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[62][15] 500 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[20][15] 1707 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[11][13] 492 25
set_location PF_DSP_FLOW_DEMO_TOP_0/UART_IF_0/DATA_OUT_11_0_2[1] 1414 15
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[77][14] 1524 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[1][5] 421 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[75][12] 1501 16
set_location PF_COREUART_0_0/PF_COREUART_0_0/make_RX/rx_shift[3] 1287 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/preBflySw_0/muxP_w[12] 1468 33
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[23][8] 531 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.poBuf/genblk1.memP/PolarFire_uram.uram_0/OR2_rD[5] 1299 33
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[42][14] 891 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/outP[0] 1404 43
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[40][3] 993 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[35][1] 1139 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.piBuf/genblk1.memQ/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R0C0/R_ADDR_3_inst 1351 28
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.piBuf/genblk1.memP/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R0C2/R_ADDR_4_inst 1598 28
set_location PF_DSP_FLOW_DEMO_TOP_0/FILTERCONTROL_FSM_0/fsm_ns_4_0_.m38_i_i_o2 1258 15
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/smStartLoad 1348 37
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/preBflySw_0/outP[3] 1307 28
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[69][8] 1399 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/twid_rA_0/twid_rA_0.tA_w_9_RNO 1278 36
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/genblk1.outBuff_0/outBuf_1/PolarFire_uram.uram_0/OR2_rD[17] 1414 27
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/genblk1.outBuff_0/outD[18] 1400 28
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/lut_0/T_1_00_0_31_0_.m229_2 1216 42
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[117][10] 2147 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[65][13] 1310 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FILTERCONTROL_FSM_0/FIR_WR_ADDR[4] 1177 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[54][4] 1095 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[116][5] 2143 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[16][8] 424 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/outBufA_0/outBuf_wA[0] 1355 37
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/rw_dly_lastStage/genblk1.delayLine[2]_3 1314 42
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/genblk1.outBuff_0/outBuf_0/PolarFire_uram.uram_0/OR2_rD[10] 1399 6
set_location PF_COREUART_0_0/PF_COREUART_0_0/make_RX/rx_shift[5] 1286 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[31][1] 1313 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/preBflySw_0/leftQ_r[4] 1308 40
set_location PF_DSP_FLOW_DEMO_TOP_0/UART_IF_0/rfsmce[1] 1280 15
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/inBuf_wA_0/un1_offsetPQ_w_5 1332 33
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.poBuf/genblk1.memP/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R1C0/R_ADDR_3_inst 1274 28
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.poBuf/wP_w[24] 1581 33
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[28][3] 628 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[43][12] 890 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[60][4] 645 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/twidLUT_1/twidLUT_0/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R1C2/R_ADDR_3_inst 1251 34
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[90][10] 1763 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/postBflySw_0/leftQ_r[21] 1481 43
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[47][12] 984 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[31][10] 686 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[28][13] 1446 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/lut_0/T_1_00_31_0_.m38 1214 39
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[65][2] 1266 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[26][6] 593 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/TAP_CHAIN[63].genblk1.muladd_0/FIR_DP_reg[24] 1486 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[114][10] 2118 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[59][7] 1166 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[115][6] 2176 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/genblk1.outBuff_0/inP_r[22] 1556 34
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[52][14] 633 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/genblk1.outBuff_0/outBuf_0/PolarFire_uram.uram_0/OR2_rD[25] 1613 27
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.poBuf/genblk1.memQ/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R1C2/R_ADDR_2_inst 1551 28
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[8][8] 352 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/wTimer_dly_2/genblk1.delayLine[1][6] 1317 37
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/genblk1.outBuff_0/outD[17] 1413 28
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[39][3] 829 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[123][0] 2111 19
set_location PF_COREUART_0_0/PF_COREUART_0_0/make_RX/rx_byte[4] 1274 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/twidLUT_1/twidLUT_0/PolarFire_uram.uram_0/OR2_rD[14] 1249 33
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/genblk1.outBuff_0/outBuf_0/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R0C0/R_ADDR_2_inst 1411 7
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/cmplx_0/rndHi_0/outp[13] 1496 43
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[14][9] 390 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.poBuf/wQ_w[31] 1532 33
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[52][0] 543 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.piBuf/wQ_w[15] 1423 33
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/genblk1.outBuff_0/outBuf_0/PolarFire_uram.uram_0/OR2_rD[16] 1453 27
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.piBuf/genblk1.memQ/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R0C1/R_ADDR_2_inst 1408 34
set_location PF_COREUART_0_0/PF_COREUART_0_0/make_RX/samples[2] 1347 13
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/init_rear_0/outp 1351 36
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[126][9] 1292 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[17][14] 540 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[69][15] 1410 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/preBflySw_0/leftQ_r[10] 1338 37
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[62][13] 545 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[15][12] 479 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[13][0] 416 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.poBuf/wP_w[28] 1603 36
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[50][10] 640 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.piBuf/genblk1.memQ/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R1C1/R_ADDR_5_inst 1417 37
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[118][11] 2139 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[28][8] 1444 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/lut_0/T_1_0_Or2_29 1237 39
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/preBflySw_0/rightP_r[18] 1477 34
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[39][5] 1009 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[44][14] 866 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FILTERCONTROL_FSM_0/fsm_ns_4_0_.m12_0_0_a3 1238 15
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[81][15] 1586 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/smPong 1299 37
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.piBuf/genblk1.memQ/PolarFire_uram.uram_0/OR2_rD[0] 1343 27
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/genblk1.outBuff_0/outBuf_0/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R1C2/R_ADDR_1_inst 1610 28
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[61][14] 1217 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[39][2] 851 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/genblk1.outBuff_0/outD[12] 1399 28
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.poBuf/genblk1.memQ/PolarFire_uram.uram_0/OR2_rD[20] 1438 33
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[76][5] 1493 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[33][13] 1237 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/preBflySw_0/leftQ_r[3] 1287 28
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[55][5] 1117 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/preBflySw_0/muxQ_w[7] 1336 27
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/outQ[13] 1448 36
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[89][1] 1765 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[87][8] 1705 19
set_location PF_DSP_FLOW_DEMO_TOP_0/UART_IF_0/rfsm_nss_i_0_a2_1_0[0] 1279 15
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.poBuf/genblk1.memQ/PolarFire_uram.uram_0/CFG2_BLKZ0[1] 1551 27
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[105][8] 2024 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/postBflySw_0/muxP_w[24] 1539 36
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/preBflySw_0/leftQ_r[24] 1562 40
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/preBflySw_0/leftQ_r[5] 1305 34
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[55][13] 1116 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[54][9] 1108 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[38][7] 1068 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[88][10] 1711 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[43][12] 901 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/autoScale_0/ldMonitor_RNO 1360 27
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[56][11] 636 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[78][7] 1540 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[35][0] 746 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.piBuf/genblk1.memQ/PolarFire_uram.uram_0/OR2_rD[17] 1404 33
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[6][11] 2118 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[50][5] 627 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/wTimer_0/Q[4] 1313 37
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[112][14] 2034 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/genblk1.outBuff_0/inP_r[19] 1397 28
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[101][1] 1933 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[86][14] 1670 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/outBufA_0/outBuf_wA[3] 1389 37
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/lut_0/T_1_00_0_31_0_.m237_i 1214 36
set_location PF_COREUART_0_0/PF_COREUART_0_0/tx_hold_reg[5] 1374 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[87][0] 1687 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[83][6] 1608 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[16][7] 1838 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/preBflySw_0/outQ[20] 1462 37
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[38][0] 1047 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[26][0] 1497 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.poBuf/wP_w[7] 1387 33
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[41][2] 853 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[42][2] 902 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[96][7] 1860 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[97][10] 1873 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/rdFFTtimer_0/bit_dly_3/genblk1.delayLine[1] 1288 37
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[5][14] 504 13
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[86][10] 1659 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/preBflySw_0/outQ[11] 1447 34
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[17][5] 430 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/inBuf_wA_0/timer_r[3] 1330 34
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[32][15] 722 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[40][8] 855 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[27][9] 1469 25
set_location PF_COREUART_0_0/PF_COREUART_0_0/make_RX/rx_byte[2] 1275 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/twidLUT_1/twidLUT_0/PolarFire_uram.uram_0/OR2_rD[3] 1207 33
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[13][13] 1944 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[40][15] 1011 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[59][15] 1185 16
set_location PF_DSP_FLOW_DEMO_TOP_0/UART_IF_0/COEF_WADDR[1] 1113 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/genblk1.outBuff_0/inP_r[23] 1585 34
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/genblk1.outBuff_0/inP_r[11] 1433 28
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[115][8] 2124 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/inPi_w[14] 1548 36
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[23][9] 1601 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/rStage_dly2/genblk1.delayLine[1][1] 1275 34
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/inPi_dly_0/genblk1.delayLine[0][1] 1483 40
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.piBuf/wP_w[31] 1603 33
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[44][9] 854 16
set_location PF_COREUART_0_0/PF_COREUART_0_0/make_TX/txrdy_int 1293 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/inQi_w[1] 1388 45
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[93][0] 1790 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/postBflySw_0/muxP_w[18] 1466 36
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/inBuf_ldA_0/ldCount/tc 1365 37
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[16][6] 453 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[3][11] 2108 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/outQ[22] 1506 43
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[65][8] 1308 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[44][6] 825 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[1][1] 458 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/rdFFTtimer_0/rA_timer/Q_lm_0[7] 1306 39
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[46][13] 978 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[51][14] 1058 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FILTERCONTROL_FSM_0/FIR_WR_ADDR_RNIB1S52[1] 1242 15
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[49][0] 663 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[33][7] 723 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[18][4] 457 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[13][7] 407 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[125][10] 1898 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.poBuf/wP_w[25] 1582 33
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[64][2] 998 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/datai_re_r[10] 1426 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[104][4] 1970 19
set_location PF_DSP_FLOW_DEMO_TOP_0/UART_IF_0/DATA_OUT_11_0_2[6] 1430 15
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[1][4] 470 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[77][8] 1526 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.poBuf/genblk1.memQ/PolarFire_uram.uram_0/CFG2_BLKX0[0] 1350 27
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[13][3] 418 13
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/twidLUT_1/twidLUT_0/PolarFire_uram.uram_0/OR2_rD[24] 1247 36
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[124][13] 1982 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[103][1] 1969 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/inBuf_wA_0/addrP_w[1] 1323 33
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[48][0] 987 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/lut_0/T_1_00_0_31_0_.m196_2_1 1203 42
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[106][13] 1992 25
set_location PF_DSP_FLOW_DEMO_TOP_0/UART_IF_0/DATA_OUT_11_0_2[2] 1398 15
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/genblk1.outBuff_0/outBuf_1/PolarFire_uram.uram_0/OR2_rD[19] 1370 27
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[48][13] 707 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[121][8] 2112 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/outQ[11] 1444 33
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/cmplx_0/genblk1.cmplx18_0/half_0/genblk1.dly_d/genblk1.delayLine[0][5] 1312 46
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[101][9] 1946 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[64][10] 1289 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.piBuf/genblk1.memQ/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R0C2/R_ADDR_0_inst 1570 34
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.piBuf/wP_w[19] 1464 27
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[55][7] 1117 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[88][7] 1719 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[57][7] 508 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[107][2] 2040 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[35][3] 745 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/inBuf_rA_0/timer_r[2] 1275 40
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[20][13] 1706 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FILTERCONTROL_FSM_0/FIR_WR_ADDR[8] 1181 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[53][7] 527 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[118][2] 2190 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[99][6] 1908 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[104][15] 1952 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/lut_0/T_1_00_31_0_.m189_1 1183 42
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/datai_re_r[8] 1411 25
set_location PF_DSP_FLOW_DEMO_TOP_0/UART_IF_0/DATA_WEN 1190 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/inQi_w[9] 1392 45
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/inBuf_rA_0/mask1_shft_stage_8 1286 42
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[25][8] 1539 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[49][4] 997 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[98][8] 1853 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/cmplx_0/genblk1.cmplx18_0/half_1/genblk1.dly_c/genblk1.delayLine[0][4] 1309 46
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[26][6] 1502 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[82][5] 1573 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[31][14] 1282 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/cmplx_0/rndHi_0/outp[1] 1484 43
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[41][11] 871 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[67][13] 1333 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[23][10] 530 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/lut_0/T_1_00_31_0_.m264_1_1 1178 39
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[26][3] 1488 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[78][11] 1538 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[92][9] 1778 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/inBuf_rA_0/offsetPQ_r1[4] 1267 43
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/genblk1.outBuff_0/outBuf_0/PolarFire_uram.uram_0/OR2_rD[19] 1415 27
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[61][12] 1201 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/cmplx_0/rndHr_0/outp[13] 1385 43
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[20][5] 489 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[13][8] 394 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/lut_0/T_1_00_31_0_.m175 1188 33
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/rStage_dly2/genblk1.delayLine[1][0] 1282 34
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/lut_0/T_1_00_0_31_0_.m245_1_1 1215 33
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.piBuf/genblk1.memQ/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R0C1/R_ADDR_5_inst 1414 34
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[55][14] 545 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[35][2] 744 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/lut_0/T_1_00_31_0_.m193 1238 42
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[21][8] 1658 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[70][12] 1375 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[46][5] 959 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[30][14] 699 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[5][6] 426 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[46][9] 940 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[85][1] 1633 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[34][9] 748 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[35][7] 1154 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/genblk1.outBuff_0/outBuf_0/PolarFire_uram.uram_0/OR2_rD[23] 1609 27
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/outP[7] 1411 43
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[23][6] 529 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[63][6] 707 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/postBflySw_0/muxP_w[10] 1392 39
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/postBflySw_0/muxQ_w[25] 1534 36
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[123][8] 2100 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[103][9] 1993 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[106][0] 2011 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.poBuf/genblk1.memQ/PolarFire_uram.uram_0/OR2_rD[24] 1560 33
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[29][7] 1403 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.piBuf/genblk1.memQ/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R1C0/R_ADDR_4_inst 1345 28
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/preBflySw_0/outP[17] 1477 40
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/postBflySw_0/leftQ_r[25] 1525 43
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[78][2] 1514 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[119][9] 2125 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/preBflySw_0/muxP_w[11] 1449 33
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[5][9] 356 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[31][7] 1321 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[69][1] 1368 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[35][0] 1136 25
set_location PF_DSP_FLOW_DEMO_TOP_0/UART_IF_0/rfsm_srsts_i_0[5] 1196 15
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[54][10] 1107 19
set_location PF_COREUART_0_0/PF_COREUART_0_0/make_RX/rx_bit_cnt_0_sqmuxa_0_a4 1327 12
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[11][14] 1969 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[106][12] 2034 28
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[64][3] 1250 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.poBuf/genblk1.memQ/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R1C1/R_ADDR_4_inst 1443 28
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[36][5] 757 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[97][3] 1862 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/inQi_w[10] 1394 45
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[64][7] 1221 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[86][11] 1657 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/outP[14] 1418 43
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/inQi_w[2] 1383 45
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.piBuf/genblk1.memP/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R0C2/BLK_EN_inst 1597 28
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/lut_0/T_1_00_31_0_.N_26_i 1176 33
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/smFft_rdy_0_sqmuxa 1298 36
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[31][0] 1255 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[74][11] 1465 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[18][11] 454 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[109][7] 2065 13
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/lut_0/T_1_00_31_0_.m11_1 1182 42
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[73][5] 1454 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/datai_re_r[13] 1445 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/genblk1.outBuff_0/outBuf_1/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R0C2/R_ADDR_1_inst 1515 34
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/inBuf_wA_0/mask1_shft_stage_10_i 1311 33
set_location PF_COREUART_0_0/PF_COREUART_0_0/make_CLOCK_GEN/make_xmit_clock.xmit_cntr_3_1.SUM[0] 1227 27
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[10][12] 476 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[57][13] 1153 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/outBuf_rA_r[0] 1399 34
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[82][9] 1610 19
set_location PF_DSP_FLOW_DEMO_TOP_0/UART_IF_0/DATA_OUT_11_0_1[6] 1433 15
set_location PF_COREUART_0_0/PF_COREUART_0_0/make_CLOCK_GEN/genblk1.baud_cntr[9] 1252 28
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[25][10] 1537 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/inPi_dly_0/genblk1.delayLine[0][9] 1555 40
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[31][1] 685 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[5][5] 398 19
set_location PF_DSP_FLOW_DEMO_TOP_0/UART_IF_0/DATA_OUT_11_RNO[1] 1405 15
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[51][12] 1057 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/preBflySw_0/leftQ_r[21] 1415 34
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/inBuf_ldA_0/load_done 1346 37
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.piBuf/genblk1.memQ/PolarFire_uram.uram_0/OR2_rD[15] 1420 33
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[30][11] 1358 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.poBuf/wEn_Q 1494 33
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[35][14] 837 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/rTimerTC_tick 1286 37
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[21][8] 481 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/postBflySw_0/rightP_r[21] 1459 37
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/un5_outQ_axb_0_i_0 1368 42
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/lut_0/T_1_00_0_31_0_.m111_1_2 1214 33
set_location PF_DSP_FLOW_DEMO_TOP_0/UART_IF_0/rfsm_0_sqmuxa_4_0_a2 1192 15
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[47][4] 732 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/rdFFTtimer_0/bit_dly_2/genblk1.delayLine[0] 1284 37
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.poBuf/genblk1.memP/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R0C2/R_ADDR_0_inst 1533 28
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/rdFFTtimer_0/bit_dly_0/genblk1.delayLine[0] 1359 40
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/genblk1.outBuff_0/outBuf_1/PolarFire_uram.uram_0/OR2_rD[13] 1373 27
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[115][5] 2131 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[49][7] 676 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[9][3] 2074 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[58][6] 465 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/smPong_2_sqmuxa_i_o2 1304 36
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/cmplx_0/rndHi_0/outp[5] 1488 43
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[43][4] 878 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[42][5] 901 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[93][7] 1813 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/rdFFTtimer_0/bit_dly_4/genblk1.delayLine[0] 1305 40
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/outQ[23] 1569 36
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[100][14] 1921 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/cmplx_0/genblk1.cmplx18_0/half_1/genblk1.dly_c/genblk1.delayLine[0][1] 1310 46
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/cmplx_0/genblk1.cmplx18_0/half_0/genblk1.dly_c/genblk1.delayLine[0][7] 1401 46
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/twidLUT_1/twidLUT_0/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R0C0/R_ADDR_0_inst 1210 34
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[122][6] 2121 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/rA_r[2] 1272 40
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[40][13] 1010 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/rdFFTtimer_0/rA_timer/tc_3_0_a2_1_1 1307 42
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.poBuf/wP_w[12] 1429 27
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[2][15] 460 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[95][15] 1848 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[20][2] 1698 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/lut_0/T_1_0_Or2_18 1202 42
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/genblk1.outBuff_0/outBuf_1/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R0C1/R_ADDR_2_inst 1377 28
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[95][6] 1836 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[14][11] 352 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[57][1] 1152 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/outBufA_0/un1_rst_3 1391 39
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[68][4] 1348 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.piBuf/wQ_w[21] 1424 33
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.poBuf/wEn_P 1493 33
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/preBflySw_0/leftQ_r[0] 1340 28
set_location PF_DSP_FLOW_DEMO_TOP_0/UART_IF_0/rfsm_srsts_0[11] 1189 15
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[45][4] 922 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[13][6] 419 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.poBuf/genblk1.memQ/PolarFire_uram.uram_0/OR2_rD[16] 1461 33
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/rdFFTtimer_0/startFFT_dly_0/genblk1.delayLine[0] 1298 37
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[10][11] 2060 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[8][11] 350 19
set_location PF_COREUART_0_0/PF_COREUART_0_0/make_RX/rx_state_ns_1_0_.m16_1 1329 12
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/slowClock_0/divider_inferred_clock_RNISVF8_0[2]/U0_RGB1 1740 39
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[27][7] 623 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[125][9] 1897 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/inBuf_wA_0/offsetPQ_r1[1] 1332 34
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/lut_0/T_1_00_31_0_.m192 1237 42
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[7][10] 2068 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[11][0] 398 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/inBuf_rA_0/timer_r[6] 1260 40
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[84][2] 1597 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/outP[18] 1502 37
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/inPr_dly_0/genblk1.delayLine[2][4] 1354 40
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[9][5] 2054 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[108][4] 2059 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/cmplx_0/genblk1.cmplx18_0/half_1/genblk1.dly_c/genblk1.delayLine[0][9] 1325 46
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[42][8] 913 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/rdFFTtimer_0/rA_timer/Q_lm_0[0] 1294 42
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[94][5] 1801 19
set_location PF_COREUART_0_0/PF_COREUART_0_0/make_TX/xmit_state[0] 1213 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[54][8] 1106 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/wTimer_0/Q[1] 1310 37
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.poBuf/genblk1.wA_r[2] 1370 34
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[1]_1_sqmuxa_0_a4_i_fast_RNIIM1I_0 1046 18
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[29][12] 1396 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/genblk1.outBuff_0/outBuf_0/PolarFire_uram.uram_0/OR2_rD[28] 1602 33
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.piBuf/wP_w[17] 1479 27
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[7][15] 488 13
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[31][13] 708 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[28][4] 1419 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[8][3] 384 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[120][5] 1918 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[54][10] 520 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.poBuf/wP_w[8] 1383 24
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[37][4] 1100 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/rdFFTtimer_0/rA_timer/Q_lm_0[9] 1300 39
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[65][1] 1288 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[27][5] 1451 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/lut_0/T_1_00_31_0_.m189_1_0 1167 39
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.poBuf/genblk1.memP/PolarFire_uram.uram_0/OR2_rD[16] 1455 33
set_location PF_DSP_FLOW_DEMO_TOP_0/UART_IF_0/DATA_OUT_11_0_2[0] 1422 15
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.poBuf/genblk1.memP/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R0C0/R_ADDR_1_inst 1290 28
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[33][4] 1225 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/outBufA_0/bit_dly_2/genblk1.delayLine[0] 1388 40
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[23][5] 1579 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[58][12] 518 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/postBflySw_0/rightP_r[0] 1409 37
set_location PF_DSP_FLOW_DEMO_TOP_0/UART_IF_0/R_ADDR_lm_0[9] 1482 15
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[89][14] 1760 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/outQ[21] 1415 33
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.poBuf/genblk1.memQ/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R0C1/R_ADDR_4_inst 1451 28
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/twid_wA_0/slowTimer/Q[6] 1255 43
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[26][15] 1512 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[81][6] 1584 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/genblk1.outBuff_0/outPQ[11] 1403 27
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/lut_0/T_1_0_Or2_10 1201 42
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[43][5] 888 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[88][4] 1697 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.piBuf/genblk1.memP/PolarFire_uram.uram_0/OR2_rD[0] 1317 27
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[24][9] 553 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[43][9] 912 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[64][0] 1249 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.poBuf/genblk1.memQ/PolarFire_uram.uram_0/OR2_rD[25] 1607 33
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/pre2_sync_rw_0/genblk1.delayLine[0] 1296 40
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/datai_re_r[14] 1455 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/preBflySw_0/rightP_r[19] 1482 34
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[45][10] 815 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[76][3] 1490 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/preBflySw_0/outP[24] 1569 40
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[58][15] 515 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[24][13] 1573 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/genblk1.outBuff_0/outBuf_0/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R1C0/R_ADDR_3_inst 1393 10
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/postBflySw_0/outQ[3] 1419 37
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/postBflySw_0/rightP_r[11] 1470 37
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.poBuf/wQ_w[21] 1440 33
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[41][15] 876 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[109][11] 2064 13
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[64][1] 1001 16
set_location reset_sync_0/reset_sync_0/dff_7 1705 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[112][6] 2116 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.piBuf/genblk1.wA_r[2] 1358 34
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/preBflySw_0/outP[13] 1442 37
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[2][7] 2103 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[16][2] 406 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[26][9] 1501 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[60][5] 1211 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.piBuf/wQ_w[4] 1422 24
set_location PF_DSP_FLOW_DEMO_TOP_0/UART_IF_0/rfsm[4] 1297 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[5][1] 389 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[120][11] 2135 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/rdFFTtimer_0/bit_dly_2/genblk1.delayLine[0]_3_0_a2 1284 36
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[91][0] 1778 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[55][6] 516 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[37][14] 828 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[89][8] 1729 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.piBuf/wP_w[22] 1589 33
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[35][12] 865 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[98][15] 1873 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/lut_0/T_1_00_31_0_.m141 1226 36
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[5][4] 409 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[33][5] 732 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[31][7] 685 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[11][7] 387 13
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[97][2] 1861 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[27][1] 612 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/lut_0/T_1_00_31_0_.m93 1190 36
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[54][8] 518 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/genblk1.outBuff_0/outBuf_1/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R1C1/R_ADDR_1_inst 1402 28
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.piBuf/genblk1.memQ/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R1C1/R_ADDR_3_inst 1405 34
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[39][2] 1008 25
set_location PF_DSP_FLOW_DEMO_TOP_0/UART_IF_0/COEF_WADDR[0] 1037 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[48][10] 996 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[11][3] 372 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[63][13] 542 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[5][8] 2079 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[51][6] 606 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.poBuf/genblk1.memP/PolarFire_uram.uram_0/OR2_rD[29] 1572 33
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/genblk1.outBuff_0/inP_r[15] 1435 28
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[94][12] 1824 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/wStage_r[1] 1278 34
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[56][13] 528 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[37][6] 1105 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[46][14] 940 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[7][6] 2123 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[33][6] 1225 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[89][0] 1712 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.piBuf/genblk1.memP/PolarFire_uram.uram_0/OR2_rD[15] 1482 36
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.piBuf/genblk1.memQ/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R0C2/R_ADDR_2_inst 1563 34
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[102][8] 2112 19
set_location PF_DSP_FLOW_DEMO_TOP_0/UART_IF_0/R_ADDR_lm_0[5] 1465 15
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[56][7] 514 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[19][5] 484 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[46][10] 939 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[80][11] 1575 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[124][3] 2076 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.piBuf/genblk1.memP/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R0C0/R_ADDR_2_inst 1316 28
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/rdFFTtimer_0/rA_timer/Q[6] 1292 40
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/rdFFTtimer_0/rA_timer/tc_3_0_a2 1290 39
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.poBuf/genblk1.memP/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R1C2/R_ADDR_5_inst 1572 34
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[106][3] 2033 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[1]_1_sqmuxa_0_a4_i 1120 15
set_location PF_DSP_FLOW_DEMO_TOP_0/UART_IF_0/DATA_OUT_cnst_a2[5] 1308 18
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/genblk1.outBuff_0/outD[25] 1532 28
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[62][9] 493 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/postBflySw_0/outQ[8] 1405 37
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[11][8] 386 13
set_location PF_COREUART_0_0/PF_COREUART_0_0/make_RX/rx_byte[1] 1280 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/cmplx_0/rndHr_0/outp[6] 1378 43
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[7][4] 2105 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[56][10] 511 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[64][6] 1287 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[117][0] 2158 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/twidLUT_1/twidLUT_0/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R1C2/R_ADDR_2_inst 1237 34
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[49][12] 703 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[9][11] 354 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[25][4] 1513 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[69][11] 1362 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/genblk1.outBuff_0/inQ_r[2] 1422 10
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/inQr_w[1] 1310 45
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[28][2] 635 19
set_location PF_DSP_FLOW_DEMO_TOP_0/UART_IF_0/rfsm_RNI0T751[1] 1188 15
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[97][11] 1855 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[20][0] 469 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/TAP_CHAIN[63].genblk1.muladd_0/FIR_DP_reg[17] 2065 19
set_location PF_COREUART_0_0/PF_COREUART_0_0/make_CLOCK_GEN/genblk1.baud_cntr[2] 1224 28
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[79][8] 1560 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/lut_0/T_1_00_31_0_.N_63_i 1229 42
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/inBuf_rA_0/offsetPQ_r1[0] 1271 43
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[105][0] 2015 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[112][8] 2104 16
set_location PF_COREUART_0_0/PF_COREUART_0_0/make_CLOCK_GEN/make_xmit_clock.xmit_cntr_3_1.SUM[3] 1368 15
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[1]_0_sqmuxa_i_i_a3 982 18
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[21][6] 409 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/genblk1.outBuff_0/outBuf_0/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R0C2/R_ADDR_5_inst 1602 34
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/inBuf_wA_0/mask1_r[4] 1317 34
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[52][2] 597 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[17][1] 1800 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[21][4] 1645 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/genblk1.outBuff_0/outBuf_1/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R0C0/R_ADDR_3_inst 1432 7
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/ctrl_dly_0/genblk1.delayLine[4][0] 1455 37
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/inQr_w[6] 1324 45
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[104][2] 1969 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[64][14] 1265 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/inBuf_rA_0/un1_offsetPQ_w_8 1267 42
set_location PF_DSP_FLOW_DEMO_TOP_0/UART_IF_0/WEN 1261 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[126][1] 1272 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[54][2] 1093 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[13][1] 1946 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[9][8] 360 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.poBuf/wQ_w[13] 1430 33
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/lut_0/T_1_00_31_0_.m14 1178 36
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/postBflySw_0/outQ[0] 1404 37
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[46][15] 789 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/twid_wA_0/twid_wEn_0_sqmuxa 1256 42
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.poBuf/genblk1.memP/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R0C0/BLK_EN_inst 1295 28
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[37][8] 1104 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/inBuf_ldA_0/ldCount/Q[2] 1356 37
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.poBuf/genblk1.memP/PolarFire_uram.uram_0/OR2_rD[8] 1275 36
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/outP[12] 1469 33
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/lut_0/T_1_00_0_31_0_.m233 1200 42
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[33][8] 1224 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/rw_dly_lastStage/genblk1.delayLine[3] 1308 43
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/outP[2] 1406 43
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[66][9] 1323 19
set_location PF_COREUART_0_0/PF_COREUART_0_0/make_TX/xmit_bit_sel_RNO[1] 1362 15
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[70][13] 1381 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[44][13] 865 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/postBflySw_0/leftQ_r[26] 1524 43
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/cmplx_0/genblk1.cmplx18_0/half_0/genblk1.dly_d/genblk1.delayLine[0][2] 1226 34
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/lut_0/T_1_00_0_31_0_.m59_2_1 1229 33
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[73][11] 1453 25
set_location PF_DSP_FLOW_DEMO_TOP_0/UART_IF_0/rfsm_nss_i_0_a2_0_7[0] 1467 15
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[113][12] 2049 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[71][5] 1405 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[70][4] 1381 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/inBuf_rA_0/timer_r[5] 1278 40
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[52][15] 665 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.poBuf/genblk1.memQ/PolarFire_uram.uram_0/OR2_rD[10] 1313 33
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[20][14] 1705 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[8][10] 363 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/twid_rA_0/stage_tick2[2] 1266 37
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/postBflySw_0/leftQ_r[3] 1405 40
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[22][4] 474 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[7][12] 2053 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/rw_dly_lastStage/genblk1.delayLine[8] 1319 43
set_location PF_COREUART_0_0/PF_COREUART_0_0/make_RX/rx_shift[4] 1285 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/sync_rAwA_w_0_a2 1296 39
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/outBufA_0/outBuf_rA_0/Q[1] 1380 37
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/cmplx_0/genblk1.cmplx18_0/half_0/genblk1.dly_d/genblk1.delayLine[0][8] 1247 37
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/outBufA_0/outBuf_wA[4] 1383 37
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[21][13] 1669 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/ctrl_dly_0/genblk1.delayLine[3][1] 1349 43
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[61][14] 507 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[25][11] 566 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/outBufA_0/outBuf_rA_valid 1391 40
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[85][8] 1644 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/genblk1.outBuff_0/outD[28] 1518 28
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.poBuf/genblk1.memP/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R1C2/R_ADDR_2_inst 1580 34
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[19][2] 1754 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/postBflySw_0/leftQ_r[5] 1400 40
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/inPi_dly_0/genblk1.delayLine[1][15] 1522 37
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[58][3] 1175 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[8][7] 2067 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/cmplx_0/genblk1.cmplx18_0/half_0/genblk1.dly_c/genblk1.delayLine[0][3] 1387 46
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[59][11] 1175 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/outBufA_0/outBuf_rA_0/Q[4] 1398 40
set_location reset_sync_0/reset_sync_0/dff_11 1715 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.poBuf/genblk1.memQ/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R1C2/R_ADDR_0_inst 1552 28
set_location PF_COREUART_0_0/PF_COREUART_0_0/make_CLOCK_GEN/genblk1.baud_cntr_RNIARO71[1] 1226 27
set_location PF_COREUART_0_0/PF_COREUART_0_0/make_RX/receive_full_int_1_sqmuxa_i 1326 15
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.poBuf/wQ_w[1] 1424 27
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/preBflySw_0/muxQ_w[10] 1340 36
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[88][3] 1696 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[92][4] 1790 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/genblk1.outBuff_0/inQ_r[26] 1517 34
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/outQ[15] 1448 33
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[39][9] 1043 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[20][12] 1704 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.piBuf/genblk1.memQ/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R0C1/R_ADDR_3_inst 1410 34
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/inQi_w[6] 1399 45
set_location PF_DSP_FLOW_DEMO_TOP_0/UART_IF_0/DATA_OUT[7] 1407 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[74][0] 1465 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[32][4] 697 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[91][7] 1764 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[46][4] 761 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[78][1] 1512 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/inPr_dly_0/genblk1.delayLine[3][14] 1438 43
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[72][13] 1434 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[85][0] 1632 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[49][1] 671 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[73][3] 1453 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[34][6] 727 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/genblk1.outBuff_0/outD[27] 1523 28
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[54][14] 1112 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[99][3] 1885 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[10][13] 455 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[42][3] 900 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.piBuf/genblk1.wEn_Q_r 1498 34
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[105][15] 1956 25
set_location PF_DSP_FLOW_DEMO_TOP_0/UART_IF_0/DATA_OUT_11_0_1[5] 1432 15
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/preBflySw_0/outQ[14] 1460 40
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[48][3] 989 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[13][11] 349 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[101][11] 1945 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[46][11] 930 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[15][5] 421 13
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[13][2] 378 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/preBflySw_0/leftQ_r[13] 1448 37
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[57][6] 1173 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[96][1] 1672 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[38][8] 874 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[74][9] 1473 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/lut_0/T_1_00_0_31_0_.m196_1 1181 42
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[52][13] 592 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/rw_dly_lastStage/genblk1.delayLine[9] 1318 43
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/genblk1.outBuff_0/outPQ[17] 1413 27
set_location PF_DSP_FLOW_DEMO_TOP_0/UART_IF_0/R_ADDR_lm_0[3] 1457 15
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[11][6] 385 13
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/lut_0/T_1_0_Or2_28 1245 33
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/genblk1.outBuff_0/outBuf_0/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R1C2/BLK_EN_inst 1609 28
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/rStage_dly2/genblk1.delayLine[1][2] 1277 34
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[10][4] 2046 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/rTimer_dly2/genblk1.delayLine[1][2] 1283 34
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.piBuf/genblk1.memQ/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R0C2/R_ADDR_5_inst 1560 34
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/genblk1.outBuff_0/outBuf_1/PolarFire_uram.uram_0/OR2_rD[11] 1368 27
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/inPi_dly_0/genblk1.delayLine[1][10] 1508 40
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[1]_1_sqmuxa_0_a4_i_rep2 1259 18
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/twid_wA_0/ngrst2rst_0/sync_ngrst_0/genblk1.delayLine[1] 1249 46
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[82][11] 1609 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[62][4] 479 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[72][6] 1443 25
set_location PF_COREUART_0_0/PF_COREUART_0_0/make_RX/rx_state_s1_0_a4 1331 12
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[17][9] 1825 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/genblk1.outBuff_0/outD[22] 1508 28
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.poBuf/genblk1.memP/PolarFire_uram.uram_0/OR2_rD[6] 1280 27
set_location PF_COREUART_0_0/PF_COREUART_0_0/make_RX/rx_shift[2] 1284 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/inPi_dly_0/genblk1.delayLine[3][11] 1557 40
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[56][4] 1130 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[13][9] 1958 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/inBuf_rA_0/un4_swCross_w[0] 1316 42
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[38][11] 816 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/postBflySw_0/rightP_r[5] 1399 40
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[119][10] 2117 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/cmplx_0/rndHi_0/outp[10] 1493 43
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[50][4] 625 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[75][8] 1488 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/postBflySw_0/muxQ_w[29] 1439 36
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/postBflySw_0/outP[20] 1471 28
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.poBuf/wQ_w[16] 1427 33
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[30][12] 697 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[23][13] 613 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/genblk1.outBuff_0/inP_r[27] 1608 34
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[60][11] 490 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[83][14] 1620 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/inBuf_wA_0/offsetPQ_r1[5] 1334 34
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[12][13] 508 28
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/cmplx_0/genblk1.cmplx18_0/half_0/genblk1.dly_c/genblk1.delayLine[0][11] 1398 46
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/genblk1.outBuff_0/outPQ[26] 1531 27
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/preBflySw_0/muxP_w[8] 1326 39
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[99][13] 1946 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/genblk1.outBuff_0/inP_r[12] 1437 28
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/twidLUT_1/twidLUT_0/PolarFire_uram.uram_0/OR2_rD[31] 1255 36
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[57][12] 511 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[16][9] 443 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/rdFFTtimer_0/rA_timer/Q[9] 1300 40
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/inQr_w[0] 1313 45
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/outQ[5] 1305 33
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/twid_wA_0/ngrst2rst_0/pulse 1254 46
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.piBuf/wA_w[0] 1357 33
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[59][1] 1176 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[36][4] 1133 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[26][5] 1489 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[38][3] 1046 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/inBuf_rA_0/mask1_shft_stage_8_i 1263 42
set_location PF_COREUART_0_0/PF_COREUART_0_0/make_RX/receive_count_RNO[2] 1312 12
set_location PF_DSP_FLOW_DEMO_TOP_0/UART_IF_0/DATA_OUT_11_0_1[1] 1408 15
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[68][2] 1349 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[19][8] 1730 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[112][5] 2083 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/inPr_w[8] 1341 39
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/outBufA_0/outBuf_rA_0/Q[2] 1382 37
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[4][14] 2045 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/inPi_dly_0/genblk1.delayLine[0][5] 1395 46
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[42][1] 877 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[29][7] 648 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.piBuf/wP_w[5] 1394 33
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/genblk1.outBuff_0/outBuf_0/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R1C1/R_ADDR_5_inst 1410 28
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[18][5] 1789 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[40][14] 1009 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[41][5] 852 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/outQ[6] 1327 24
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[41][9] 864 16
set_location PF_DSP_FLOW_DEMO_TOP_0/UART_IF_0/WDATA[13] 1203 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.piBuf/genblk1.memQ/PolarFire_uram.uram_0/OR2_rD[29] 1551 33
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/cmplx_0/genblk1.cmplx18_0/half_0/genblk1.dly_c/genblk1.delayLine[0][13] 1418 46
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/lut_0/T_1_00_31_0_.m43 1170 42
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[34][11] 746 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[52][5] 539 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[41][13] 949 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.poBuf/genblk1.memP/PolarFire_uram.uram_0/OR2_rD[31] 1576 33
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/lut_0/T_1_0_Or2_20 1233 33
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/inPi_dly_0/genblk1.delayLine[2][11] 1559 40
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/genblk1.outBuff_0/inQ_r[18] 1419 34
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/cmplx_0/genblk1.cmplx18_0/half_0/genblk1.dly_d/genblk1.delayLine[0][0] 1236 37
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[47][6] 961 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[4][11] 2069 16
set_location PF_DSP_FLOW_DEMO_TOP_0/UART_IF_0/OEN_RNO_1 1225 15
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.poBuf/genblk1.memQ/PolarFire_uram.uram_0/OR2_rD[14] 1449 36
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/inPr_dly_0/genblk1.delayLine[2][10] 1332 37
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[126][7] 1294 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/inBuf_rA_0/mask1_shft_stage_10_i 1268 42
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[47][7] 960 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[56][9] 1131 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/rTimer_dly2/genblk1.delayLine[0][4] 1288 40
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/outQ[16] 1459 33
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/outP[12] 1416 43
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[6][1] 2132 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[59][3] 669 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[122][9] 2118 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/inQr_w[4] 1309 45
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[5][12] 2039 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[2][14] 2049 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/preBflySw_0/rightP_r[6] 1321 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/inBuf_rA_0/mask2_r[3] 1269 43
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/preBflySw_0/leftQ_r[25] 1557 34
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[58][5] 1167 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[108][2] 2050 25
set_location PF_DSP_FLOW_DEMO_TOP_0/UART_IF_0/DATA_OUT_11_0_2[7] 1429 15
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[50][9] 639 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[40][12] 1008 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[25][10] 565 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[31][5] 684 16
set_location PF_DSP_FLOW_DEMO_TOP_0/UART_IF_0/RAM_REN_RNO 1442 15
set_location PF_DSP_FLOW_DEMO_TOP_0/FILTERCONTROL_FSM_0/COEF_RADDR[6] 1075 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FILTERCONTROL_FSM_0/DATA_I_VALID 1246 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/preBflySw_0/leftQ_r[31] 1579 34
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/startFFT_g4_dly_0/genblk1.delayLine[0] 1296 37
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[63][9] 1274 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[119][12] 2100 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[3][10] 1770 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[50][1] 624 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/TAP_CHAIN[63].genblk1.muladd_0/FIR_DP_reg[26] 1450 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/postBflySw_0/muxQ_w[23] 1529 36
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.piBuf/wQ_w[13] 1429 33
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/genblk1.outBuff_0/outBuf_1/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R0C1/R_ADDR_5_inst 1378 28
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[95][3] 1796 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[4][8] 434 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/genblk1.outBuff_0/inP_r[9] 1399 10
set_location PF_DSP_FLOW_DEMO_TOP_0/UART_IF_0/WDATA_0_RNIQH5D 1219 15
set_location PF_DSP_FLOW_DEMO_TOP_0/UART_IF_0/rfsm_srsts_0_a3_0_3_0[6] 1032 15
set_location PF_COREUART_0_0/PF_COREUART_0_0/make_CLOCK_GEN/genblk1.baud_cntr_lm_0[0] 1233 27
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/genblk1.outBuff_0/outBuf_1/PolarFire_uram.uram_0/OR2_rD[26] 1526 27
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[38][0] 773 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[119][2] 2203 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/postBflySw_0/muxQ_w[15] 1431 39
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[14][6] 1922 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[6][8] 367 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[49][14] 1020 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.poBuf/genblk1.memP/PolarFire_uram.uram_0/OR2_rD[7] 1283 27
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[2][12] 478 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/genblk1.outBuff_0/inP_r[13] 1436 28
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[36][6] 1130 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.poBuf/genblk1.memQ/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R1C0/R_ADDR_1_inst 1297 28
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/rw_dly_lastStage/genblk1.delayLine[7] 1309 43
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/inPr_w[12] 1450 36
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/genblk1.outBuff_0/outBuf_0/PolarFire_uram.uram_0/CFG2_BLKZ0[0] 973 24
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/preBflySw_0/muxQ_w[1] 1326 27
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/genblk1.outBuff_0/outBuf_1/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R0C1/R_ADDR_4_inst 1372 28
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/inBuf_wA_0/bflyA[3] 1347 34
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/inPi_dly_0/genblk1.delayLine[2][6] 1402 46
set_location PF_DSP_FLOW_DEMO_TOP_0/FILTERCONTROL_FSM_0/fsm_nss_i[0] 1245 15
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/inPi_dly_0/genblk1.delayLine[3][6] 1500 43
set_location PF_DSP_FLOW_DEMO_TOP_0/UART_IF_0/DATA_OUT_11_RNO[2] 1400 15
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/genblk1.outBuff_0/outBuf_1/PolarFire_uram.uram_0/OR2_rD[15] 1377 27
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[61][10] 1214 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[32][10] 1286 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/preBflySw_0/muxP_w[7] 1332 27
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[105][3] 2031 25
set_location PF_DSP_FLOW_DEMO_TOP_0/UART_IF_0/WDATA[5] 1184 16
set_location PF_DSP_FLOW_DEMO_TOP_0/UART_IF_0/DATA_OUT_11_0_1[7] 1427 15
set_location PF_COREUART_0_0/PF_COREUART_0_0/make_TX/tx_byte[3] 1357 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[28][13] 649 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[32][12] 1264 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/wStage_r_5[2] 1276 33
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[47][9] 745 19
set_location PF_DSP_FLOW_DEMO_TOP_0/UART_IF_0/COEF_WADDR[6] 1118 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[116][9] 2155 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[43][9] 887 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[68][8] 1350 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[1][10] 528 28
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/postBflySw_0/muxQ_w[31] 1532 36
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[99][2] 1884 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[29][1] 467 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[47][6] 744 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/genblk1.outBuff_0/outPQ[19] 1413 24
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/postBflySw_0/leftQ_r[8] 1415 40
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[60][8] 469 16
set_location PF_DSP_FLOW_DEMO_TOP_0/UART_IF_0/DATA_WADDR[3] 1056 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[5][9] 2090 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/inPr_dly_0/genblk1.delayLine[2][12] 1421 43
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/genblk1.outBuff_0/inP_r[8] 1402 10
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[43][6] 875 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.poBuf/genblk1.memP/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R1C0/BLK_EN_inst 1273 28
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[93][1] 1774 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[99][12] 1908 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[44][8] 912 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[70][10] 1393 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[121][5] 2153 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[105][10] 2017 16
set_location PF_DSP_FLOW_DEMO_TOP_0/UART_IF_0/un1_rx_en_2_sqmuxa_i_a2 1193 15
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[63][2] 515 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[18][3] 1788 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[106][7] 2032 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[35][3] 1166 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[98][12] 1905 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[55][1] 1116 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.poBuf/genblk1.memQ/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R0C2/R_ADDR_4_inst 1584 28
set_location PF_COREUART_0_0/PF_COREUART_0_0/make_CLOCK_GEN/genblk1.baud_cntr_lm_0[9] 1252 27
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[125][1] 1560 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/genblk1.outBuff_0/inP_r[1] 1383 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[0]_1_sqmuxa_i_rep2 1256 18
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.poBuf/genblk1.memQ/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R1C1/BLK_EN_inst 1442 28
set_location PF_DSP_FLOW_DEMO_TOP_0/UART_IF_0/R_ADDR[10] 1462 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[6][14] 504 16
set_location PF_DSP_FLOW_DEMO_TOP_0/UART_IF_0/rfsm_RNI1OL01[10] 1302 18
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/outQ[25] 1557 33
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[104][13] 1953 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/preOutBuf_wEn_1_sqmuxa_1_0_a2 1310 42
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[58][7] 1153 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[17][1] 458 13
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[117][7] 2157 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[16][1] 1854 19
set_location PF_DSP_FLOW_DEMO_TOP_0/UART_IF_0/WDATA[9] 1210 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/twidLUT_1/twidLUT_0/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R1C0/R_ADDR_3_inst 1190 28
set_location PF_DSP_FLOW_DEMO_TOP_0/UART_IF_0/rfsmce[6] 1204 12
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/preBflySw_0/leftQ_r[12] 1460 34
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[29][1] 1380 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[12][10] 1987 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[15][5] 1890 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/genblk1.outBuff_0/inP_r[20] 1415 28
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[38][3] 805 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[121][15] 2040 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[82][12] 1609 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.poBuf/genblk1.memP/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R1C1/R_ADDR_1_inst 1452 34
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[53][4] 1081 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/genblk1.outBuff_0/outD[2] 1417 7
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[25][7] 564 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/TAP_CHAIN[63].genblk1.muladd_0/FIR_DP_reg[29] 1498 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[31][3] 1311 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[12][12] 1986 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[34][1] 1201 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[40][11] 852 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[120][12] 2083 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.poBuf/wP_w[14] 1454 27
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[7][3] 2099 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[36][8] 1129 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/lut_0/T_1_00_0_31_0_.m157_1_0 1236 39
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/rw_dly_lastStage/genblk1.delayLine[6] 1311 43
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.poBuf/wP_w[23] 1575 33
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/cmplx_0/rndHr_0/outp[15] 1387 43
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/genblk1.outBuff_0/wA_r[1] 1359 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.poBuf/genblk1.memP/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R1C2/BLK_EN_inst 1573 34
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.piBuf/genblk1.memP/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R1C0/R_ADDR_0_inst 1309 28
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[61][7] 501 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/postBflySw_0/muxP_w[28] 1545 36
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[11][5] 1985 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[36][9] 783 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/genblk1.outBuff_0/outBuf_0/PolarFire_uram.uram_0/OR2_rD[12] 1397 27
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[51][10] 1074 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[60][5] 713 13
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[100][6] 1921 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[114][0] 2119 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[38][2] 804 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.piBuf/genblk1.memP/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R1C2/R_ADDR_5_inst 1596 37
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/inBuf_ldA_0/ldCount/Q_0_sqmuxa_3_0_4 1358 36
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.piBuf/wQ_w[16] 1421 33
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[100][5] 1896 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/inPr_w[2] 1313 39
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/inPi_dly_0/genblk1.delayLine[3][10] 1502 40
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[13][9] 373 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[93][15] 1812 25
set_location PF_COREUART_0_0/PF_COREUART_0_0/tx_hold_reg[0] 1370 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[62][15] 1236 19
set_location PF_DSP_FLOW_DEMO_TOP_0/UART_IF_0/DATA_WADDR[1] 1054 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/rdFFTtimer_0/rA_timer/Q_lm_0[8] 1299 39
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[9][3] 383 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FILTERCONTROL_FSM_0/FIR_WR_ADDR[7] 1180 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/preBflySw_0/outP[7] 1334 28
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/twidLUT_1/twidLUT_0/PolarFire_uram.uram_0/CFG2_BLKZ0[1] 1250 36
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[88][1] 1695 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/genblk1.outBuff_0/outBuf_1/PolarFire_uram.uram_0/OR2_rD[18] 1369 27
set_location PF_COREUART_0_0/PF_COREUART_0_0/make_CLOCK_GEN/genblk1.baud_cntr_lm_0[8] 1255 27
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[123][5] 2133 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[10][10] 362 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.poBuf/wP_w[18] 1458 27
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/genblk1.outBuff_0/outBuf_1/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R1C2/R_ADDR_1_inst 1500 28
set_location PF_DSP_FLOW_DEMO_TOP_0/UART_IF_0/rfsm_RNO[2] 1030 15
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[66][3] 1315 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[117][4] 2191 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/inPi_dly_0/genblk1.delayLine[2][8] 1571 40
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.poBuf/genblk1.memQ/PolarFire_uram.uram_0/OR2_rD[1] 1302 33
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[66][7] 1295 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/inPi_dly_0/genblk1.delayLine[3][8] 1567 40
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[2][0] 466 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/postBflySw_0/muxP_w[9] 1395 39
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[7][5] 1837 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/wTimer_dly_2/genblk1.delayLine[1][4] 1381 37
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[24][5] 555 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/inPr_w[7] 1323 39
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/outP[29] 1513 37
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.poBuf/genblk1.memQ/PolarFire_uram.uram_0/OR2_rD[15] 1450 33
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[71][3] 1404 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/preBflySw_0/muxQ_w[9] 1339 39
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[77][10] 1525 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[102][0] 1945 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[117][3] 2153 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/inPr_dly_0/genblk1.delayLine[0][6] 1344 40
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/inBuf_wA_0/offsetPQ_r1[2] 1337 34
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[28][14] 648 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/cmplx_0/genblk1.cmplx18_0/half_0/genblk1.dly_d/genblk1.delayLine[0][10] 1258 37
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[53][9] 1077 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[11][2] 383 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/slowClock_0/divider[2] 1255 46
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.poBuf/genblk1.memP/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R1C0/R_ADDR_4_inst 1272 28
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/inPi_dly_0/genblk1.delayLine[1][13] 1554 37
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[90][15] 1752 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/lut_0/T_1_00_0_31_0_.N_204_i 1228 39
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/twid_wA_0/preRstAfterInit 1256 43
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[2][8] 2055 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.poBuf/genblk1.memQ/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R0C0/R_ADDR_3_inst 1296 34
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[109][4] 2048 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/outQ[4] 1308 39
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/postBflySw_0/outP[15] 1475 28
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.piBuf/genblk1.memP/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R1C1/R_ADDR_2_inst 1485 34
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[22][2] 1598 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/outP[1] 1328 27
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[92][10] 1777 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/datai_re_r[5] 1417 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/lut_0/T_1_00_0_31_0_.m32 1190 42
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/postBflySw_0/muxP_w[20] 1473 36
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.piBuf/wQ_w[2] 1410 24
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[95][2] 1834 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[25][1] 588 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[16][9] 1836 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/rTimer_dly2/genblk1.delayLine[1][1] 1297 43
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/inPi_dly_0/genblk1.delayLine[0][0] 1482 40
set_location PF_DSP_FLOW_DEMO_TOP_0/UART_IF_0/DATA_OUT_11_0_2_0[5] 1436 15
set_location PF_DSP_FLOW_DEMO_TOP_0/UART_IF_0/R_ADDR[8] 1468 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[52][15] 1075 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.poBuf/genblk1.memP/PolarFire_uram.uram_0/OR2_rD[19] 1486 33
set_location PF_DSP_FLOW_DEMO_TOP_0/UART_IF_0/DATA_WADDR[10] 1063 16
set_location PF_COREUART_0_0/PF_COREUART_0_0/make_TX/xmit_state[1] 1212 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[80][5] 1549 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/preBflySw_0/outQ[27] 1548 28
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[15][3] 1865 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/datai_re_r[11] 1438 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/outQ[26] 1571 33
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/preBflySw_0/leftQ_r[20] 1432 37
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[90][9] 1730 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[27][14] 1467 19
set_location PF_DSP_FLOW_DEMO_TOP_0/UART_IF_0/COEF_WEN_RNO 1021 15
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[119][13] 2101 13
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/outBufA_0/bit_dly_0/genblk1.delayLine[0]_3 1386 39
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.piBuf/wP_w[24] 1586 33
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[10][7] 2052 16
set_location PF_DSP_FLOW_DEMO_TOP_0/UART_IF_0/rfsm_RNO[13] 1197 15
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[60][14] 1189 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/inQi_w[15] 1499 42
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[20][0] 1694 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[17][10] 441 25
set_location PF_DSP_FLOW_DEMO_TOP_0/UART_IF_0/DATA_WADDR[2] 1055 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.poBuf/wP_w[15] 1474 27
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[11][3] 2019 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/outBufA_0/bit_dly_2/genblk1.delayLine[0]_RNI9G7E3 1380 39
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.poBuf/wP_w[26] 1577 36
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[59][6] 1187 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[98][6] 1913 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/genblk1.outBuff_0/outPQ[4] 1423 6
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/inBuf_wA_0/mask2_r[2] 1321 34
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/twidLUT_1/twidLUT_0/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R1C0/BLK_EN_inst 1194 28
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.piBuf/wEn_Q 1498 33
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/wTimer_dly_2/genblk1.delayLine[0][2] 1320 37
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[5][11] 1941 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[86][2] 1644 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.poBuf/genblk1.memP/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R0C1/R_ADDR_1_inst 1476 28
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[47][2] 960 25
set_location PF_DSP_FLOW_DEMO_TOP_0/UART_IF_0/DATA_OUT_11[0] 1416 15
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[24][15] 625 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[48][4] 985 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[24][13] 624 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/twid_wA_0/slowTimer/Q[4] 1253 43
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/lut_0/T_1_00_31_0_.N_40_i 1169 42
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/lut_0/T_1_00_31_0_.m223 1166 42
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/cmplx_0/genblk1.cmplx18_0/half_1/genblk1.dly_c/genblk1.delayLine[0][6] 1324 46
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[96][5] 1798 19
set_location reset_sync_0/reset_sync_0/un1_PLL_POWERDOWN_B_i 1728 3
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[42][11] 888 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.poBuf/genblk1.memQ/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R0C0/R_ADDR_2_inst 1297 34
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.piBuf/wP_w[28] 1605 36
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[2][13] 2006 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[30][13] 696 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.poBuf/genblk1.memQ/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R1C0/R_ADDR_5_inst 1296 28
set_location PF_COREUART_0_0/PF_COREUART_0_0/make_RX/receive_full_int 1331 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/inBuf_wA_0/offsetPQ_r2[6] 1351 34
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[56][8] 1128 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[33][11] 722 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/preBflySw_0/muxP_w[25] 1555 33
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/inPi_dly_0/genblk1.delayLine[1][6] 1397 46
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[125][7] 1862 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/genblk1.outBuff_0/outBuf_1/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R0C0/R_ADDR_2_inst 1418 10
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/outBuf_rA_r[1] 1387 37
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[26][15] 662 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[107][13] 2004 28
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.piBuf/genblk1.memQ/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R0C2/R_ADDR_3_inst 1561 34
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.piBuf/wEn_P 1496 33
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[96][12] 1866 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/inPr_dly_0/genblk1.delayLine[0][8] 1341 40
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[43][14] 913 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[53][13] 555 25
set_location CFG0_GND_INST 1344 27
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[6][0] 2094 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[97][15] 1872 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[31][10] 1329 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[80][9] 1574 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/outQ[6] 1394 43
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[24][8] 1326 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/genblk1.outBuff_0/inQ_r[29] 1502 34
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[0][0] 829 16
set_location PF_DSP_FLOW_DEMO_TOP_0/UART_IF_0/R_ADDR_lm_0[4] 1485 15
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[6][2] 2069 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[65][14] 1309 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[61][9] 1213 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[68][1] 1344 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[110][10] 2100 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[50][14] 1045 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/cmplx_0/rndHr_0/outp[9] 1381 43
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[26][9] 600 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[1][7] 2088 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[66][0] 1309 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[33][9] 721 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/postBflySw_0/outQ[21] 1461 37
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[20][6] 1678 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[32][13] 720 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[20][3] 1693 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/outBufA_0/bit_dly_0/genblk1.delayLine[2]_3 1356 39
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[34][7] 1177 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/genblk1.outBuff_0/inQ_r[21] 1420 34
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[118][0] 2194 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/inBuf_rA_0/mask1_shft_stage_5 1289 42
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/outBufA_0/un1_last_readout 1381 39
set_location PF_DSP_FLOW_DEMO_TOP_0/FILTERCONTROL_FSM_0/COEF_RADDR[5] 1074 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/outP[22] 1566 36
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.piBuf/genblk1.memQ/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R1C1/BLK_EN_inst 1412 28
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/postBflySw_0/outQ[15] 1431 40
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.piBuf/wP_w[11] 1433 27
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.piBuf/genblk1.wA_r[6] 1499 34
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[63][3] 1237 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[49][6] 1010 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[19][0] 1714 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[63][7] 1273 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[49][7] 1009 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[117][14] 2067 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/inBuf_rA_0/timer_r[0] 1298 43
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[11][10] 2025 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/rdFFTtimer_0/fftRd_done_r 1293 37
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.piBuf/genblk1.memP/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R0C1/R_ADDR_2_inst 1489 28
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[34][0] 1169 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[115][9] 2186 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[8][8] 1942 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/rdFFTtimer_0/rLastStage_r_3 1289 36
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[4][3] 428 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[28][10] 1420 25
set_location PF_DSP_FLOW_DEMO_TOP_0/UART_IF_0/DATA_OUT[2] 1401 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[63][1] 522 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.piBuf/wP_w[25] 1587 33
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[32][11] 1285 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[46][9] 782 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/rdFFTtimer_0/rA_timer/Q[8] 1299 40
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[6][3] 400 25
set_location PF_DSP_FLOW_DEMO_TOP_0/UART_IF_0/OEN_RNO 1224 15
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/rw_dly_lastStage/genblk1.delayLine[5]_3 1315 42
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/preBflySw_0/muxP_w[10] 1334 36
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[47][14] 760 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[100][11] 1920 19
set_location PF_COREUART_0_0/PF_COREUART_0_0/make_TX/tx_byte[1] 1356 16
set_location PF_DSP_FLOW_DEMO_TOP_0/UART_IF_0/OEN_RNO_2 1228 15
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[57][8] 568 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[46][6] 781 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/genblk1.outBuff_0/outBuf_0/PolarFire_uram.uram_0/OR2_rD[31] 1619 33
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/preBflySw_0/muxP_w[23] 1571 36
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[91][1] 1777 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[75][15] 1500 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[105][7] 2016 16
set_location PF_COREUART_0_0/PF_COREUART_0_0/make_CLOCK_GEN/genblk1.make_baud_cntr.baud_clock_int_17_0_a2 1228 27
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/inPi_dly_0/genblk1.delayLine[1][11] 1550 40
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[53][8] 516 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/outp_ready_r 1364 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[55][14] 1115 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[7][0] 414 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/inQr_w[5] 1315 45
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[55][6] 1116 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/lut_0/T_1_00_0_31_0_.m103 1202 36
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.poBuf/genblk1.memP/PolarFire_uram.uram_0/OR2_rD[21] 1466 33
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/un1_bflyRiskOV_w_1 1434 42
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[64][5] 1248 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/genblk1.outBuff_0/outD[0] 1416 7
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/inPi_dly_0/genblk1.delayLine[1][8] 1560 40
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[61][13] 1247 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/lut_0/T_1_00_31_0_.m59_2_0 1227 39
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[3][6] 2139 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/genblk1.outBuff_0/outBuf_0/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R1C2/R_ADDR_5_inst 1608 28
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[51][4] 1052 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/cmplx_0/rndHi_0/outp[11] 1494 43
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[89][10] 1728 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/un1_twid_wEn 1302 36
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/inPi_dly_0/genblk1.delayLine[2][10] 1501 40
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/preBflySw_0/outQ[23] 1561 37
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[66][6] 1320 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/preBflySw_0/muxQ_w[17] 1416 39
set_location PF_DSP_FLOW_DEMO_TOP_0/UART_IF_0/rfsm_srsts_i_a3_0_4[10] 1296 18
set_location PF_DSP_FLOW_DEMO_TOP_0/FILTERCONTROL_FSM_0/FILTER_COMPLETE 1244 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[22][14] 538 28
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/inPi_dly_0/genblk1.delayLine[2][12] 1523 43
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[12][11] 1992 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[39][10] 1032 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[51][14] 630 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/cmplx_0/rndHi_0/outp[14] 1497 43
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/outQ[19] 1503 43
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[37][1] 768 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FILTERCONTROL_FSM_0/FFT_WADDR[7] 1255 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/preBflySw_0/muxQ_w[25] 1558 33
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/inBuf_rA_0/mask2_r_RNO[0] 1270 39
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/lut_0/T_1_00_0_31_0_.m256_2_1 1202 39
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[62][10] 594 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/postBflySw_0/leftQ_r[29] 1437 37
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[27][8] 637 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[11][9] 391 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[62][12] 529 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[3][4] 2053 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[56][2] 1128 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[15][15] 507 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[102][3] 1944 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/genblk1.outBuff_0/outBuf_0/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R0C2/R_ADDR_4_inst 1605 28
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[27][12] 636 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/inPi_dly_0/genblk1.delayLine[0][10] 1548 40
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[83][2] 1596 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/un1_bflyRiskOV_w_0 1432 42
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[61][3] 672 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[4][14] 515 13
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[114][7] 2155 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/postBflySw_0/muxQ_w[19] 1452 36
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[93][5] 1788 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[67][14] 1332 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/postBflySw_0/muxP_w[17] 1474 36
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/outBufA_0/bit_dly_0/genblk1.delayLine[1]_3 1358 39
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[65][12] 1308 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[19][1] 458 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/lut_0/T_1_00_31_0_.m41 1245 42
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.piBuf/genblk1.memQ/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R1C0/R_ADDR_1_inst 1349 28
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/smFft_run 1306 37
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[53][8] 1070 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[42][12] 896 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/lut_0/T_1_00_31_0_.m96_1_2 1215 42
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/lut_0/T_1_00_0_31_0_.m137_i 1232 42
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.piBuf/genblk1.memQ/PolarFire_uram.uram_0/OR2_rD[19] 1409 33
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[19][10] 1728 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/postBflySw_0/muxQ_w[24] 1533 36
set_location PF_DSP_FLOW_DEMO_TOP_0/FILTERCONTROL_FSM_0/COEF_RD_ENABLE 1060 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/twidLUT_1/twidLUT_0/PolarFire_uram.uram_0/OR2_rD[15] 1237 36
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[51][13] 1056 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.piBuf/genblk1.memP/PolarFire_uram.uram_0/OR2_rD[28] 1597 33
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[24][0] 554 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[51][9] 1043 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[122][1] 2090 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/preBflySw_0/outP[8] 1328 40
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/preBflySw_0/outP[12] 1451 37
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/genblk1.outBuff_0/outPQ[12] 1399 27
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[45][6] 918 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.piBuf/wP_w[4] 1406 24
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/autoScale_0/upScale 1352 43
set_location PF_DSP_FLOW_DEMO_TOP_0/UART_IF_0/DATA_WADDR[0] 1053 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[45][7] 944 19
set_location PF_DSP_FLOW_DEMO_TOP_0/UART_IF_0/rfsm_srsts_i_a2[12] 1274 15
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/wTimer_0/Q[3] 1312 37
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/preBflySw_0/outP[26] 1566 34
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[17][0] 457 13
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/rdFFTtimer_0/bit_dly_4/genblk1.delayLine[1] 1389 40
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/smPong_RNIL8S3 1421 27
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/inBuf_wA_0/addrP_w[5] 1312 33
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.poBuf/wP_w[31] 1590 33
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[48][10] 699 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/rdFFTtimer_0/stage_timer/Q_n3_i_o2 1291 33
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/lut_0/T_1_00_0_31_0_.m97_1 1190 39
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[78][15] 1536 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[0]_1_sqmuxa_i 1260 18
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/postBflySw_0/muxQ_w[0] 1404 36
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/outBuf_wA_r[6] 974 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/twid_rA_0/stage_tick[0] 1281 37
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[88][8] 1717 19
set_location PF_COREUART_0_0/PF_COREUART_0_0/make_CLOCK_GEN/genblk1.baud_cntr_one_RNO 1232 27
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[76][0] 1496 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[114][4] 2160 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/preBflySw_0/outP[15] 1455 40
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[23][9] 528 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[23][12] 612 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[63][0] 1236 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[50][11] 638 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[52][0] 1045 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[12][4] 1968 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[36][6] 780 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.poBuf/wQ_w[10] 1394 24
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/genblk1.outBuff_0/outBuf_0/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R0C2/R_ADDR_2_inst 1606 34
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[74][12] 1476 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/genblk1.outBuff_0/outD[7] 1398 7
set_location PF_DSP_FLOW_DEMO_TOP_0/UART_IF_0/WDATA[14] 1235 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/inBuf_wA_0/bflyA[0] 1344 34
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/inBuf_ldA_0/ldCount/Q_lm_0[2] 1356 36
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/twidLUT_1/twidLUT_0/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R1C2/BLK_EN_inst 1241 34
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[8][14] 1936 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[74][4] 1445 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/rdFFTtimer_0/rA_timer/Q[0] 1294 43
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/preBflySw_0/muxQ_w[23] 1561 36
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[119][15] 2076 13
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[76][9] 1500 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[111][13] 2047 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FILTERCONTROL_FSM_0/COEF_RADDR[0] 1069 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[114][3] 2122 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[23][14] 1608 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[88][0] 1692 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[57][14] 1152 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[30][10] 672 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/rw_dly_lastStage/genblk1.delayLine[0] 1310 43
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[55][12] 1119 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[3][15] 2035 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[24][12] 1572 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[52][4] 547 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/inPi_w[8] 1563 39
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/postBflySw_0/muxQ_w[13] 1428 36
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[18][5] 427 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[21][15] 1668 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[112][12] 2054 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[54][6] 519 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[87][6] 1704 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[120][2] 2175 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[2][9] 2097 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FILTERCONTROL_FSM_0/fsm_ns_4_0_.m38_i_i 1240 15
set_location reset_sync_0/reset_sync_0/dff_4 1704 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[20][9] 1716 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[85][13] 1656 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[118][15] 2100 13
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/inBuf_wA_0/mask1_r[2] 1331 34
set_location PF_DSP_FLOW_DEMO_TOP_0/UART_IF_0/rfsm[8] 1252 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/outBufA_0/outBuf_rA_0/Q[3] 1388 37
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/postBflySw_0/leftQ_r[14] 1436 43
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[18][15] 544 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[26][13] 634 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[8][12] 2058 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/genblk1.outBuff_0/inP_r[17] 1434 28
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[101][6] 1944 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/postBflySw_0/rightP_r[6] 1397 37
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[59][0] 673 16
set_location PF_COREUART_0_0/PF_COREUART_0_0/make_CLOCK_GEN/genblk1.make_baud_cntr.baud_clock_int36 1230 27
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[77][11] 1524 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/outQ[21] 1505 43
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[38][5] 1044 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/postBflySw_0/leftQ_r[20] 1500 40
set_location PF_DSP_FLOW_DEMO_TOP_0/UART_IF_0/un1_DATA_OUT_0_sqmuxa_i_a3_0_RNITH122 1296 15
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[97][0] 1860 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[14][12] 504 28
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[109][2] 2085 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[101][5] 1932 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[116][2] 2177 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.poBuf/wA_w[6] 1497 33
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[78][8] 1536 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/twidLUT_1/twidLUT_0/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R1C0/R_ADDR_2_inst 1188 28
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[37][7] 807 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[17][7] 475 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/genblk1.outBuff_0/wA_r[6] 973 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.piBuf/wQ_w[7] 1380 33
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/genblk1.outBuff_0/outPQ[13] 1398 27
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/rw_dly_lastStage/genblk1.delayLine[8]_3 1319 42
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/twid_rA_0/twid_rA_0.tA_w_9_RNO_0 1277 36
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/twidLUT_1/twidLUT_0/PolarFire_uram.uram_0/OR2_rD[25] 1258 33
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.piBuf/genblk1.memP/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R0C1/BLK_EN_inst 1488 28
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[21][11] 1656 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/lut_0/T_1_00_31_0_.m59_2_1 1231 33
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[89][15] 1738 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[20][4] 468 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FILTERCONTROL_FSM_0/FFT_I_VALID_RNO 1221 15
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/postBflySw_0/muxP_w[8] 1400 39
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/genblk1.outBuff_0/outBuf_0/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R0C1/R_ADDR_3_inst 1380 28
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[22][3] 485 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.poBuf/genblk1.wA_r[1] 1369 34
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[17][3] 456 13
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[15][1] 461 13
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/inBuf_ldA_0/ldCount/un1_rst 1350 36
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[50][7] 637 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[93][10] 1812 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[63][6] 1272 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/rdFFTtimer_0/bit_dly_5/genblk1.delayLine[1]_3 1364 39
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/postBflySw_0/outP[1] 1389 28
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.piBuf/genblk1.memQ/PolarFire_uram.uram_0/OR2_rD[31] 1580 33
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[35][12] 1164 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.poBuf/genblk1.memQ/PolarFire_uram.uram_0/OR2_rD[4] 1309 39
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[31][9] 684 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[81][14] 1585 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[21][11] 489 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/genblk1.outBuff_0/outBuf_1/PolarFire_uram.uram_0/OR2_rD[22] 1520 27
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[49][2] 996 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/postBflySw_0/muxP_w[30] 1543 36
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[7][10] 379 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[24][4] 1548 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[90][4] 1752 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[52][9] 563 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/genblk1.outBuff_0/outBuf_0/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R1C1/R_ADDR_4_inst 1391 28
set_location PF_DSP_FLOW_DEMO_TOP_0/FILTERCONTROL_FSM_0/FILTER_COMPLETE_RNO 1237 15
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[37][10] 792 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/preBflySw_0/muxP_w[2] 1327 27
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/preBflySw_0/outP[19] 1479 37
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/preBflySw_0/outQ[2] 1331 28
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[52][1] 548 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[30][4] 661 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[103][6] 1992 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.piBuf/genblk1.memP/PolarFire_uram.uram_0/OR2_rD[31] 1573 33
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/twid_wA_0/preRstAfterInit_2 1257 42
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[53][2] 1080 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[17][11] 433 13
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[124][4] 2120 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/twidLUT_1/twidLUT_0/PolarFire_uram.uram_0/OR2_rD[13] 1224 33
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[3][0] 425 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/inBuf_rA_0/mask2_r[0] 1270 40
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[103][5] 1968 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[61][3] 1212 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[49][2] 662 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/twid_rA_0/timer_tick_RNITLDV[3] 1273 36
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[17][8] 430 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.poBuf/genblk1.memQ/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R1C1/R_ADDR_3_inst 1441 28
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[61][7] 1212 19
set_location PF_COREUART_0_0/PF_COREUART_0_0/make_TX/tx_byte[0] 1366 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[3][13] 2012 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[60][6] 463 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/inPi_dly_0/genblk1.delayLine[1][14] 1546 37
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/inBuf_ldA_0/loadOver_w_i_0 1347 36
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/rw_dly_lastStage/genblk1.delayLine[1]_3 1312 42
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/genblk1.outBuff_0/outPQ[9] 1395 6
set_location PF_DSP_FLOW_DEMO_TOP_0/UART_IF_0/WDATA[8] 1187 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[118][7] 2158 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[15][12] 1920 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/genblk1.outBuff_0/inQ_r[25] 1534 34
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[48][0] 696 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/postBflySw_0/rightP_r[31] 1586 34
set_location PF_DSP_FLOW_DEMO_TOP_0/UART_IF_0/DATA_OUT_11_0_1[2] 1397 15
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[70][6] 1392 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[27][6] 486 25
set_location PF_DSP_FLOW_DEMO_TOP_0/UART_IF_0/rfsm_srsts_i_a3_0_6[10] 1449 15
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/inPi_dly_0/genblk1.delayLine[0][7] 1568 40
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[122][7] 2121 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.poBuf/genblk1.memP/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R1C2/R_ADDR_3_inst 1583 34
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[72][7] 1441 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[68][11] 1356 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[43][14] 898 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/lut_0/T_1_0_Or2_31 1190 33
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.poBuf/genblk1.memQ/PolarFire_uram.uram_0/OR2_rD[9] 1334 39
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[44][12] 864 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[98][3] 1862 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/rdFFTtimer_0/bit_dly_3/genblk1.delayLine[0]_3_0_a2 1293 39
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/outP[19] 1480 33
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[56][8] 595 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[61][10] 477 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/preBflySw_0/muxP_w[3] 1292 27
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.poBuf/genblk1.memP/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R0C2/R_ADDR_1_inst 1549 28
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/lut_0/T_1_00_0_31_0_.m272_1_0 1214 42
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[60][12] 1188 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/twidLUT_1/twidLUT_0/PolarFire_uram.uram_0/OR2_rD[11] 1270 33
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[41][15] 948 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[5][15] 2075 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/preBflySw_0/rightP_r[31] 1577 34
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[17][6] 1824 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[62][8] 529 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/preBflySw_0/leftQ_r[30] 1556 37
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[114][11] 2150 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/inBuf_ldA_0/ldCount/Q[1] 1361 37
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/preBflySw_0/outQ[16] 1463 34
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/genblk1.outBuff_0/outBuf_0/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R1C1/R_ADDR_2_inst 1423 28
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[13][6] 1957 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/preBflySw_0/rightP_r[11] 1449 34
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/outP[0] 1311 27
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/TAP_CHAIN[63].genblk1.muladd_0/FIR_DP_reg[14] 1524 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[9][15] 422 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[73][0] 1452 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[1][14] 1932 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/lut_0/T_1_00_31_0_.N_37_i 1166 39
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/inBuf_rA_0/addrP_w[1] 1290 42
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/lut_0/T_1_00_0_31_0_.m188 1180 42
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[77][5] 1500 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/genblk1.outBuff_0/outBuf_1/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R0C0/R_ADDR_5_inst 1417 10
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[33][6] 720 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[35][5] 1168 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[8][9] 2091 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.piBuf/wA_w[2] 1358 33
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[118][4] 2207 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/lut_0/T_1_00_0_31_0_.m36 1179 42
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/twidLUT_1/twidLUT_0/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R1C1/R_ADDR_3_inst 1212 28
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[114][14] 2134 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[84][10] 1620 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.poBuf/genblk1.memQ/PolarFire_uram.uram_0/OR2_rD[2] 1306 27
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/genblk1.outBuff_0/outPQ[20] 1404 27
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[1][8] 524 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.piBuf/genblk1.memP/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R1C0/R_ADDR_3_inst 1308 28
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.poBuf/genblk1.memQ/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R1C1/R_ADDR_2_inst 1440 28
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/genblk1.outBuff_0/outBuf_0/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R1C0/R_ADDR_0_inst 1409 7
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[115][12] 2124 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[113][14] 2111 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[46][8] 932 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[12][4] 376 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/inPi_dly_0/genblk1.delayLine[2][1] 1485 40
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[73][9] 1452 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[40][1] 840 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/genblk1.outBuff_0/wA_r[5] 1404 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.poBuf/genblk1.memP/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R0C0/R_ADDR_5_inst 1284 28
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.piBuf/wQ_w[10] 1400 24
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/genblk1.outBuff_0/outBuf_1/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R0C0/R_ADDR_4_inst 1416 10
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/outQ[20] 1504 43
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[31][5] 1316 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/inPi_dly_0/genblk1.delayLine[3][1] 1487 40
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[40][4] 984 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/twidLUT_1/twidLUT_0/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R0C0/R_ADDR_5_inst 1213 28
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[79][13] 1548 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/preBflySw_0/muxP_w[6] 1321 24
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/outQ_1_axb_0_i_0 1476 42
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[41][11] 950 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[64][11] 1284 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/inPr_dly_0/genblk1.delayLine[3][11] 1335 37
set_location PF_DSP_FLOW_DEMO_TOP_0/UART_IF_0/rfsm_srsts_i_a3_0_0[5] 1198 15
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[118][3] 2138 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[42][0] 876 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/genblk1.outBuff_0/inP_r[10] 1403 10
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[62][5] 509 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[87][13] 1692 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[81][2] 1560 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[62][11] 523 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[112][9] 2134 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[1]_1_sqmuxa_0_a4_i_fast_RNIIM1I_1 1326 18
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[97][7] 1875 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[28][7] 1416 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[58][11] 1152 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/genblk1.outBuff_0/outD[16] 1459 28
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[82][7] 1612 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[81][12] 1584 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[58][1] 1164 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.poBuf/genblk1.memQ/PolarFire_uram.uram_0/OR2_rD[22] 1565 33
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[91][5] 1776 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/outBufA_0/outBuf_rA_0/Q_lm_0[0] 1387 39
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/twidLUT_1/twidLUT_0/PolarFire_uram.uram_0/OR2_rD[23] 1271 33
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[45][2] 912 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[106][4] 2013 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[50][12] 1044 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/preBflySw_0/rightP_r[3] 1292 28
set_location PF_DSP_FLOW_DEMO_TOP_0/UART_IF_0/R_ADDR_lm_0[1] 1481 15
set_location PF_DSP_FLOW_DEMO_TOP_0/UART_IF_0/rfsm_nss_i_0_a2[0] 1281 18
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[51][8] 1078 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[29][15] 1365 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[24][11] 1572 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[49][10] 1008 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/postBflySw_0/outP[13] 1435 37
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[28][7] 646 19
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/inBuf_wA_0/offsetPQ_r2[2] 1335 34
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.piBuf/wQ_w[6] 1399 24
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[92][8] 1776 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[102][7] 1956 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[37][1] 1094 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/preBflySw_0/rightP_r[26] 1568 34
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[17][6] 474 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[101][15] 1932 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/inPi_dly_0/genblk1.delayLine[3][14] 1523 37
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/lut_0/T_1_00_0_31_0_.m196_2 1178 42
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.piBuf/genblk1.memP/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R0C2/R_ADDR_2_inst 1596 28
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/lut_0/T_1_00_0_31_0_.m154 1238 33
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[33][1] 1224 25
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/twidLUT_1/rA_r[6] 1260 34
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.piBuf/genblk1.memQ/PolarFire_uram.uram_0/OR2_rD[5] 1322 33
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/preBflySw_0/leftQ_r[17] 1407 34
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[39][1] 828 19
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[100][12] 1931 25
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/coeffreg[3][3] 2034 16
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/outBufA_0/outBuf_rA_0/Q_lm_0[5] 1393 39
set_location PF_COREUART_0_0/PF_COREUART_0_0/make_TX/xmit_bit_sel[3] 1218 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[117][1] 2128 16
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/sample_data[19][13] 540 28
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.poBuf/genblk1.memP/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R0C2/RAM64x12_PHYS_0 1536 32
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.piBuf/genblk1.memQ/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R0C0/RAM64x12_PHYS_0 1332 32
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/genblk1.outBuff_0/outBuf_0/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R0C0/RAM64x12_PHYS_0 1404 5
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.piBuf/genblk1.memQ/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R1C1/RAM64x12_PHYS_0 1416 32
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/twidLUT_1/twidLUT_0/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R1C0/RAM64x12_PHYS_0 1188 32
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/genblk1.outBuff_0/outBuf_1/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R1C0/RAM64x12_PHYS_0 1428 5
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/genblk1.outBuff_0/outBuf_1/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R1C1/RAM64x12_PHYS_0 1368 32
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/genblk1.outBuff_0/outBuf_1/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R0C2/RAM64x12_PHYS_0 1512 32
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.piBuf/genblk1.memQ/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R0C2/RAM64x12_PHYS_0 1560 32
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.piBuf/genblk1.memP/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R1C0/RAM64x12_PHYS_0 1308 32
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/cmplx_0/genblk1.cmplx18_0/half_1/mx_0/g5_macc.macc_0/MACC_PHYS_INST 1380 50
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.poBuf/genblk1.memP/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R1C0/RAM64x12_PHYS_0 1260 32
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/genblk1.outBuff_0/outBuf_1/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R1C2/RAM64x12_PHYS_0 1500 32
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_FIR_IN_BUF/PF_TPSRAM_1_0/PF_TPSRAM_1_PF_TPSRAM_1_0_PF_TPSRAM_R0C0 1056 14
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/genblk1.outBuff_0/outBuf_0/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R1C0/RAM64x12_PHYS_0 1392 5
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/genblk1.outBuff_0/outBuf_0/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R1C1/RAM64x12_PHYS_0 1392 32
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/genblk1.outBuff_0/outBuf_0/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R0C2/RAM64x12_PHYS_0 1608 32
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.poBuf/genblk1.memQ/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R0C0/RAM64x12_PHYS_0 1284 32
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.piBuf/genblk1.memQ/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R1C0/RAM64x12_PHYS_0 1344 32
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.piBuf/genblk1.memP/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R0C1/RAM64x12_PHYS_0 1488 32
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.poBuf/genblk1.memQ/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R1C1/RAM64x12_PHYS_0 1440 32
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/genblk1.outBuff_0/outBuf_1/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R0C1/RAM64x12_PHYS_0 1356 32
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/genblk1.outBuff_0/outBuf_0/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R1C2/RAM64x12_PHYS_0 1620 32
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/cmplx_0/genblk1.cmplx18_0/half_0/mx_0/g5_macc.macc_0/MACC_PHYS_INST 1308 50
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.poBuf/genblk1.memP/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R0C1/RAM64x12_PHYS_0 1464 32
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.poBuf/genblk1.memQ/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R0C2/RAM64x12_PHYS_0 1584 32
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.piBuf/genblk1.memP/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R1C2/RAM64x12_PHYS_0 1632 32
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_FIR_OUT_BUF/PF_TPSRAM_2_0/PF_TPSRAM_2_PF_TPSRAM_2_0_PF_TPSRAM_R0C0 1416 14
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.poBuf/genblk1.memP/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R1C2/RAM64x12_PHYS_0 1572 32
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_FFT_RE_BUF/PF_TPSRAM_4_0/PF_TPSRAM_4_PF_TPSRAM_4_0_PF_TPSRAM_R0C0 1380 14
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COEF_BUF/PF_TPSRAM_0_0/PF_TPSRAM_0_PF_TPSRAM_0_0_PF_TPSRAM_R0C0 1020 14
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/genblk1.outBuff_0/outBuf_0/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R0C1/RAM64x12_PHYS_0 1380 32
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.piBuf/genblk1.memQ/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R0C1/RAM64x12_PHYS_0 1404 32
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/twidLUT_1/twidLUT_0/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R0C0/RAM64x12_PHYS_0 1200 32
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/twidLUT_1/twidLUT_0/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R1C1/RAM64x12_PHYS_0 1212 32
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.poBuf/genblk1.memQ/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R1C0/RAM64x12_PHYS_0 1296 32
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.piBuf/genblk1.memQ/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R1C2/RAM64x12_PHYS_0 1524 32
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/TAP_CHAIN[0].genblk1.mul_0/un2_out1_mulonly_0[34:0]/MACC_PHYS_INST 432 50
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_FFT_IM_BUF/PF_TPSRAM_3_0/PF_TPSRAM_3_PF_TPSRAM_3_0_PF_TPSRAM_R0C0 1452 14
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/twidLUT_1/twidLUT_0/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R0C2/RAM64x12_PHYS_0 1248 32
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/twidLUT_1/twidLUT_0/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R1C2/RAM64x12_PHYS_0 1236 32
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.poBuf/genblk1.memQ/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R0C1/RAM64x12_PHYS_0 1428 32
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.piBuf/genblk1.memP/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R0C0/RAM64x12_PHYS_0 1320 32
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.piBuf/genblk1.memP/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R1C1/RAM64x12_PHYS_0 1476 32
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/genblk1.outBuff_0/outBuf_1/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R0C0/RAM64x12_PHYS_0 1416 5
set_location PF_DSP_FLOW_DEMO_TOP_0/FIR_RTL_0/TAP_CHAIN[1].genblk1.muladd_0/un1_dout_muladd_0[34:0]/MACC_PHYS_INST 144 23
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.poBuf/genblk1.memP/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R0C0/RAM64x12_PHYS_0 1272 32
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.poBuf/genblk1.memP/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R1C1/RAM64x12_PHYS_0 1452 32
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.poBuf/genblk1.memQ/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R1C2/RAM64x12_PHYS_0 1548 32
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/twidLUT_1/twidLUT_0/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R0C1/RAM64x12_PHYS_0 1224 32
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/inBuf_0/genblk1.piBuf/genblk1.memP/PolarFire_uram.uram_0/PF_COREFFT_PF_COREFFT_0_uram_g5_R0C2/RAM64x12_PHYS_0 1596 32
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/outP_1_cry_0 1500 36
set_location PF_DSP_FLOW_DEMO_TOP_0/FILTERCONTROL_FSM_0/COEF_RADDR_cry_cy[0] 1068 15
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/un3_outP_cry_0 1404 42
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/cmplx_0/rndHi_0/outp_int_s_1_457 1482 42
set_location PF_DSP_FLOW_DEMO_TOP_0/FILTERCONTROL_FSM_0/fsm_i_RNIM2OE_0[0] 1172 15
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/inBuf_rA_0/bflyA_w_cry_0_0 1272 42
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/inBuf_wA_0/bflyA_w_cry_0_0 1344 33
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/outQ_1_cry_0 1500 42
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/twid_wA_0/slowTimer/Q_cry_cy[0] 1248 42
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/outBufA_0/outBuf_rA_0/Q_s_453 1389 36
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/wTimer_0/Q_cry_cy[0] 1308 36
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/inBuf_ldA_0/ldCount/Q_s_454 1371 36
set_location PF_DSP_FLOW_DEMO_TOP_0/UART_IF_0/rfsm_RNITPEP_0[8] 1052 15
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/cmplx_0/rndHr_0/outp_int_s_1_456 1371 42
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/un5_outQ_cry_0 1388 42
set_location PF_COREUART_0_0/PF_COREUART_0_0/make_CLOCK_GEN/genblk1.baud_cntr_cry[0] 1235 27
set_location PF_DSP_FLOW_DEMO_TOP_0/UART_IF_0/rfsm_RNITPEP[8] 1111 15
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/rdFFTtimer_0/rA_timer/Q_s_455 1296 42
set_location PF_DSP_FLOW_DEMO_TOP_0/UART_IF_0/R_ADDR_s_452 1470 15
set_location PF_DSP_FLOW_DEMO_TOP_0/FILTERCONTROL_FSM_0/fsm_i_RNIM2OE[0] 1247 15
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/lut_0/T_1_00_0_31_0_.m146_1_0_wmux 1176 39
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/lut_0/T_1_00_0_31_0_.m59_1_0_wmux 1215 39
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/lut_0/T_1_00_0_31_0_.m272_2_1_1_0_wmux 1224 36
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/lut_0/T_1_00_0_31_0_.m196_1_0_0_wmux 1188 42
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/lut_0/T_1_00_0_31_0_.m75_1_0_wmux 1212 36
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/lut_0/T_1_00_31_0_.m95_1_0_wmux 1191 36
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/lut_0/T_1_00_31_0_.m29_1_0_wmux 1212 33
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/lut_0/T_1_00_31_0_.m105_1_0_wmux 1203 36
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/lut_0/T_1_00_0_31_0_.m92_1_0_wmux 1167 42
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/lut_0/T_1_00_0_31_0_.m34_1_0_wmux 1191 33
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/lut_0/T_1_00_31_0_.m47_1_0_wmux 1164 42
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/lut_0/T_1_00_0_31_0_.m186_1_0_0_wmux 1188 39
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/lut_0/T_1_00_0_31_0_.m212_1_0_wmux 1227 42
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/lut_0/T_1_00_31_0_.m253_1_0_wmux 1188 36
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/lut_0/T_1_00_31_0_.m171_1_0_wmux 1164 39
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/lut_0/T_1_00_0_31_0_.m236_1_0_wmux 1200 36
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/lut_0/T_1_00_31_0_.m65_1_0_wmux 1224 42
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/lut_0/T_1_00_0_31_0_.m129_1_0_wmux 1212 42
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/lut_0/T_1_00_0_31_0_.m97_2_1_1_1_wmux 1224 39
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/lut_0/T_1_00_31_0_.m189_2_1_1_0_wmux 1176 42
set_location PF_COREUART_0_0/PF_COREUART_0_0/make_TX/xmit_sel.tx_2_u_i_m2_2_1_0_wmux 1356 15
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/lut_0/T_1_00_31_0_.m19_1_0_wmux 1176 36
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/lut_0/T_1_00_31_0_.m59_1_0_wmux 1212 39
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/lut_0/T_1_00_31_0_.m84_1_0_wmux 1200 39
set_location PF_ccc_0_0/PF_ccc_0_0/clkint_0/U0_RGB1_RGB0 1741 39
set_location PF_ccc_0_0/PF_ccc_0_0/clkint_0/U0_RGB1_RGB1 1747 39
set_location PF_ccc_0_0/PF_ccc_0_0/clkint_0/U0_RGB1_RGB2 576 12
set_location PF_ccc_0_0/PF_ccc_0_0/clkint_0/U0_RGB1_RGB3 582 12
set_location PF_ccc_0_0/PF_ccc_0_0/clkint_0/U0_RGB1_RGB4 1741 12
set_location PF_ccc_0_0/PF_ccc_0_0/clkint_0/U0_RGB1_RGB5 1747 12
set_location PF_ccc_0_0/PF_ccc_0_0/clkint_0/U0_GB0 1164 163
set_location PF_COREUART_0_0/PF_COREUART_0_0/make_CLOCK_GEN/genblk1.baud_cntr_cry[0]_CC_0 1235 29
set_location PF_COREUART_0_0/PF_COREUART_0_0/make_CLOCK_GEN/genblk1.baud_cntr_cry[0]_CC_1 1236 29
set_location PF_DSP_FLOW_DEMO_TOP_0/FILTERCONTROL_FSM_0/COEF_RADDR_cry_cy[0]_CC_0 1068 17
set_location PF_DSP_FLOW_DEMO_TOP_0/FILTERCONTROL_FSM_0/fsm_i_RNIM2OE[0]_CC_0 1247 17
set_location PF_DSP_FLOW_DEMO_TOP_0/FILTERCONTROL_FSM_0/fsm_i_RNIM2OE[0]_CC_1 1248 17
set_location PF_DSP_FLOW_DEMO_TOP_0/FILTERCONTROL_FSM_0/fsm_i_RNIM2OE_0[0]_CC_0 1172 17
set_location PF_DSP_FLOW_DEMO_TOP_0/FILTERCONTROL_FSM_0/fsm_i_RNIM2OE_0[0]_CC_1 1176 17
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/cmplx_0/rndHi_0/outp_int_s_1_457_CC_0 1482 44
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/cmplx_0/rndHi_0/outp_int_s_1_457_CC_1 1488 44
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/cmplx_0/rndHr_0/outp_int_s_1_456_CC_0 1371 44
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/cmplx_0/rndHr_0/outp_int_s_1_456_CC_1 1380 44
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/outP_1_cry_0_CC_0 1500 38
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/outP_1_cry_0_CC_1 1512 38
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/outQ_1_cry_0_CC_0 1500 44
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/outQ_1_cry_0_CC_1 1512 44
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/un3_outP_cry_0_CC_0 1404 44
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/un3_outP_cry_0_CC_1 1416 44
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/un5_outQ_cry_0_CC_0 1388 44
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/bfly_0/un5_outQ_cry_0_CC_1 1392 44
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/inBuf_ldA_0/ldCount/Q_s_454_CC_0 1371 38
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/inBuf_rA_0/bflyA_w_cry_0_0_CC_0 1272 44
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/inBuf_wA_0/bflyA_w_cry_0_0_CC_0 1344 35
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/outBufA_0/outBuf_rA_0/Q_s_453_CC_0 1389 38
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/outBufA_0/outBuf_rA_0/Q_s_453_CC_1 1392 38
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/rdFFTtimer_0/rA_timer/Q_s_455_CC_0 1296 44
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/twid_wA_0/slowTimer/Q_cry_cy[0]_CC_0 1248 44
set_location PF_DSP_FLOW_DEMO_TOP_0/PF_COREFFT_0/PF_COREFFT_0/genblk1.DUT_INPLACE/sm_0/wTimer_0/Q_cry_cy[0]_CC_0 1308 38
set_location PF_DSP_FLOW_DEMO_TOP_0/UART_IF_0/rfsm_RNITPEP[8]_CC_0 1111 17
set_location PF_DSP_FLOW_DEMO_TOP_0/UART_IF_0/rfsm_RNITPEP[8]_CC_1 1116 17
set_location PF_DSP_FLOW_DEMO_TOP_0/UART_IF_0/rfsm_RNITPEP_0[8]_CC_0 1052 17
set_location PF_DSP_FLOW_DEMO_TOP_0/UART_IF_0/rfsm_RNITPEP_0[8]_CC_1 1056 17
set_location PF_DSP_FLOW_DEMO_TOP_0/UART_IF_0/R_ADDR_s_452_CC_0 1470 17
set_location PF_DSP_FLOW_DEMO_TOP_0/UART_IF_0/R_ADDR_s_452_CC_1 1476 17
