# Creating SmartDesign "top"
set sd_name {top}
create_smartdesign -sd_name ${sd_name}

# Disable auto promotion of pins of type 'pad'
auto_promote_pad_pins -promote_all 0

# Create top level Scalar Ports
sd_create_scalar_port -sd_name ${sd_name} -port_name {ARST_N} -port_direction {IN}
sd_create_scalar_port -sd_name ${sd_name} -port_name {LANE0_RXD_N} -port_direction {IN} -port_is_pad {1}
sd_create_scalar_port -sd_name ${sd_name} -port_name {LANE0_RXD_P} -port_direction {IN} -port_is_pad {1}
sd_create_scalar_port -sd_name ${sd_name} -port_name {REF_CLK_PAD_N_0} -port_direction {IN} -port_is_pad {1}
sd_create_scalar_port -sd_name ${sd_name} -port_name {REF_CLK_PAD_P_0} -port_direction {IN} -port_is_pad {1}
sd_create_scalar_port -sd_name ${sd_name} -port_name {RX} -port_direction {IN}

sd_create_scalar_port -sd_name ${sd_name} -port_name {LANE0_TXD_N} -port_direction {OUT} -port_is_pad {1}
sd_create_scalar_port -sd_name ${sd_name} -port_name {LANE0_TXD_P} -port_direction {OUT} -port_is_pad {1}
sd_create_scalar_port -sd_name ${sd_name} -port_name {TX} -port_direction {OUT}


# Create top level Bus Ports
sd_create_bus_port -sd_name ${sd_name} -port_name {SEL_IN} -port_direction {IN} -port_range {[3:0]}

sd_create_bus_port -sd_name ${sd_name} -port_name {LED_OUT} -port_direction {OUT} -port_range {[7:0]}


# Add CLKINT_0 instance
sd_instantiate_macro -sd_name ${sd_name} -macro_name {CLKINT} -instance_name {CLKINT_0}



# Add Core_JESD_TX_0 instance
sd_instantiate_component -sd_name ${sd_name} -component_name {Core_JESD_TX} -instance_name {Core_JESD_TX_0}
sd_mark_pins_unused -sd_name ${sd_name} -pin_names {Core_JESD_TX_0:TX_STATE}
sd_mark_pins_unused -sd_name ${sd_name} -pin_names {Core_JESD_TX_0:SOF}
sd_mark_pins_unused -sd_name ${sd_name} -pin_names {Core_JESD_TX_0:SOMF}



# Add CoreJESD204BRX_0 instance
sd_instantiate_component -sd_name ${sd_name} -component_name {CORE_JESD_RX} -instance_name {CoreJESD204BRX_0}
sd_mark_pins_unused -sd_name ${sd_name} -pin_names {CoreJESD204BRX_0:SOF_0}
sd_mark_pins_unused -sd_name ${sd_name} -pin_names {CoreJESD204BRX_0:SOMF_0}
sd_mark_pins_unused -sd_name ${sd_name} -pin_names {CoreJESD204BRX_0:RX_STATE_0}



# Add DATA_GENERATOR_0 instance
sd_instantiate_component -sd_name ${sd_name} -component_name {DATA_GENERATOR} -instance_name {DATA_GENERATOR_0}



# Add DATA_HANDLE_0 instance
sd_instantiate_component -sd_name ${sd_name} -component_name {DATA_HANDLE} -instance_name {DATA_HANDLE_0}



# Add ERR_GEN_0 instance
sd_instantiate_hdl_module -sd_name ${sd_name} -hdl_module_name {ERR_GEN} -hdl_file {hdl\err_gen.v} -instance_name {ERR_GEN_0}



# Add Init_Monitor_0_0 instance
sd_instantiate_component -sd_name ${sd_name} -component_name {Init_Monitor_0} -instance_name {Init_Monitor_0_0}
sd_mark_pins_unused -sd_name ${sd_name} -pin_names {Init_Monitor_0_0:PCIE_INIT_DONE}
sd_mark_pins_unused -sd_name ${sd_name} -pin_names {Init_Monitor_0_0:USRAM_INIT_DONE}
sd_mark_pins_unused -sd_name ${sd_name} -pin_names {Init_Monitor_0_0:SRAM_INIT_DONE}
sd_mark_pins_unused -sd_name ${sd_name} -pin_names {Init_Monitor_0_0:USRAM_INIT_FROM_SNVM_DONE}
sd_mark_pins_unused -sd_name ${sd_name} -pin_names {Init_Monitor_0_0:USRAM_INIT_FROM_UPROM_DONE}
sd_mark_pins_unused -sd_name ${sd_name} -pin_names {Init_Monitor_0_0:USRAM_INIT_FROM_SPI_DONE}
sd_mark_pins_unused -sd_name ${sd_name} -pin_names {Init_Monitor_0_0:SRAM_INIT_FROM_SNVM_DONE}
sd_mark_pins_unused -sd_name ${sd_name} -pin_names {Init_Monitor_0_0:SRAM_INIT_FROM_UPROM_DONE}
sd_mark_pins_unused -sd_name ${sd_name} -pin_names {Init_Monitor_0_0:SRAM_INIT_FROM_SPI_DONE}
sd_mark_pins_unused -sd_name ${sd_name} -pin_names {Init_Monitor_0_0:AUTOCALIB_DONE}



# Add LED_DEBUG_BLK_0 instance
sd_instantiate_hdl_module -sd_name ${sd_name} -hdl_module_name {LED_DEBUG_BLK} -hdl_file {hdl\led_block.v} -instance_name {LED_DEBUG_BLK_0}



# Add PF_CLK_DIV_C0_0 instance
sd_instantiate_component -sd_name ${sd_name} -component_name {PF_CLK_DIV_C0} -instance_name {PF_CLK_DIV_C0_0}



# Add PF_OSC_0_0 instance
sd_instantiate_component -sd_name ${sd_name} -component_name {PF_OSC_0} -instance_name {PF_OSC_0_0}



# Add PF_TPSRAM_C0_0 instance
sd_instantiate_component -sd_name ${sd_name} -component_name {PF_TPSRAM_C0} -instance_name {PF_TPSRAM_C0_0}



# Add PF_TPSRAM_C1_0 instance
sd_instantiate_component -sd_name ${sd_name} -component_name {PF_TPSRAM_C1} -instance_name {PF_TPSRAM_C1_0}



# Add PF_TX_PLL_0_0 instance
sd_instantiate_component -sd_name ${sd_name} -component_name {PF_TX_PLL_0} -instance_name {PF_TX_PLL_0_0}
sd_mark_pins_unused -sd_name ${sd_name} -pin_names {PF_TX_PLL_0_0:CLK_125}



# Add PF_XCVR_0 instance
sd_instantiate_component -sd_name ${sd_name} -component_name {PF_XCVR_0} -instance_name {PF_XCVR_0}
sd_connect_pins_to_constant -sd_name ${sd_name} -pin_names {PF_XCVR_0:LANE0_TX_DISPFNC} -value {GND}
sd_connect_pins_to_constant -sd_name ${sd_name} -pin_names {PF_XCVR_0:LANE0_LOS} -value {GND}



# Add PF_XCVR_REF_CLK_0_0 instance
sd_instantiate_component -sd_name ${sd_name} -component_name {PF_XCVR_REF_CLK_0} -instance_name {PF_XCVR_REF_CLK_0_0}



# Add prbs_checker_0 instance
sd_instantiate_hdl_module -sd_name ${sd_name} -hdl_module_name {prbs_checker} -hdl_file {hdl\prbs_checker.v} -instance_name {prbs_checker_0}



# Add reset_syn_0 instance
sd_instantiate_component -sd_name ${sd_name} -component_name {reset_syn} -instance_name {reset_syn_0}
sd_connect_pins_to_constant -sd_name ${sd_name} -pin_names {reset_syn_0:SS_BUSY} -value {GND}
sd_connect_pins_to_constant -sd_name ${sd_name} -pin_names {reset_syn_0:FF_US_RESTORE} -value {GND}
sd_mark_pins_unused -sd_name ${sd_name} -pin_names {reset_syn_0:PLL_POWERDOWN_B}



# Add reset_synchronizer_0 instance
sd_instantiate_hdl_module -sd_name ${sd_name} -hdl_module_name {reset_synchronizer} -hdl_file {hdl\reset_synchronizer.v} -instance_name {reset_synchronizer_0}



# Add scalar net connections
sd_connect_pins -sd_name ${sd_name} -pin_names {"ARST_N" "reset_syn_0:EXT_RST_N" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"CLKINT_0:A" "PF_XCVR_REF_CLK_0_0:FAB_REF_CLK" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"CLKINT_0:Y" "DATA_HANDLE_0:CLK" "PF_TPSRAM_C0_0:R_CLK" "PF_TPSRAM_C1_0:R_CLK" "reset_syn_0:CLK" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"CoreJESD204BRX_0:ALIGNED" "DATA_HANDLE_0:ALIGNED" "LED_DEBUG_BLK_0:ALIGNED" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"CoreJESD204BRX_0:CGS_ERR" "DATA_HANDLE_0:CGS_ERR" "LED_DEBUG_BLK_0:CGS_ERR" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"CoreJESD204BRX_0:EPCS_0_RX_CLK" "CoreJESD204BRX_0:LANE_CLK" "LED_DEBUG_BLK_0:CLK_IN" "PF_TPSRAM_C0_0:W_CLK" "PF_TPSRAM_C1_0:W_CLK" "PF_XCVR_0:LANE0_RX_CLK_R" "prbs_checker_0:clk" "reset_synchronizer_0:clock" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"CoreJESD204BRX_0:EPCS_0_RX_VAL" "DATA_HANDLE_0:EPCS_0_RX_VAL" "LED_DEBUG_BLK_0:EPCS_0_RX_VAL" "PF_XCVR_0:LANE0_RX_VAL" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"CoreJESD204BRX_0:LINK_CD_ERR" "DATA_HANDLE_0:LINK_CD_ERR" "LED_DEBUG_BLK_0:LINK_CD_ERR" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"CoreJESD204BRX_0:RESET_N" "Core_JESD_TX_0:RESET_N" "PF_XCVR_0:LANE0_PMA_ARST_N" "reset_syn_0:FABRIC_RESET_N" "reset_synchronizer_0:reset" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"CoreJESD204BRX_0:RX_RESET_N" "LED_DEBUG_BLK_0:EPCS_0_RX_RESET_N" "PF_XCVR_0:LANE0_PCS_ARST_N" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"CoreJESD204BRX_0:SYNC_N" "Core_JESD_TX_0:SYNC_N" "DATA_HANDLE_0:SYNC_N" "LED_DEBUG_BLK_0:SYNC_N" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"CoreJESD204BRX_0:UCC_ERR" "DATA_HANDLE_0:UCC_ERR" "LED_DEBUG_BLK_0:UCC_ERR" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"Core_JESD_TX_0:EPCS_0_TX_CLK" "Core_JESD_TX_0:LANE_CLK" "DATA_GENERATOR_0:clk" "ERR_GEN_0:clk" "PF_XCVR_0:LANE0_TX_CLK_R" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"Core_JESD_TX_0:EPCS_0_TX_STABLE" "LED_DEBUG_BLK_0:INIT_DONE" "PF_XCVR_0:LANE0_TX_CLK_STABLE" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"DATA_GENERATOR_0:err_en" "DATA_HANDLE_0:ERR_EN" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"DATA_GENERATOR_0:prbs_wave_sel" "DATA_HANDLE_0:P_W_SEL" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"DATA_GENERATOR_0:reset_n" "DATA_HANDLE_0:RESET_N" "ERR_GEN_0:reset_n" "LED_DEBUG_BLK_0:RESET_N" "prbs_checker_0:reset_n" "reset_synchronizer_0:reset_sync" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"DATA_HANDLE_0:DATA_ERR" "prbs_checker_0:o_bad" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"DATA_HANDLE_0:DATA_WEN" "PF_TPSRAM_C0_0:W_EN" "PF_TPSRAM_C1_0:W_EN" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"DATA_HANDLE_0:LINK_ERR_EN" "ERR_GEN_0:line_err_en" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"DATA_HANDLE_0:RX" "RX" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"DATA_HANDLE_0:TX" "TX" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"Init_Monitor_0_0:BANK_4_VDDI_STATUS" "reset_syn_0:BANK_x_VDDI_STATUS" "reset_syn_0:BANK_y_VDDI_STATUS" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"Init_Monitor_0_0:DEVICE_INIT_DONE" "reset_syn_0:INIT_DONE" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"Init_Monitor_0_0:FABRIC_POR_N" "reset_syn_0:FPGA_POR_N" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"Init_Monitor_0_0:XCVR_INIT_DONE" "PF_XCVR_0:CTRL_ARST_N" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"LANE0_RXD_N" "PF_XCVR_0:LANE0_RXD_N" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"LANE0_RXD_P" "PF_XCVR_0:LANE0_RXD_P" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"LANE0_TXD_N" "PF_XCVR_0:LANE0_TXD_N" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"LANE0_TXD_P" "PF_XCVR_0:LANE0_TXD_P" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"LED_DEBUG_BLK_0:EPCS_0_READY" "PF_XCVR_0:LANE0_RX_READY" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"LED_DEBUG_BLK_0:EPCS_0_RX_IDLE" "PF_XCVR_0:LANE0_RX_IDLE" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"PF_CLK_DIV_C0_0:CLK_IN" "PF_OSC_0_0:RCOSC_160MHZ_GL" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"PF_CLK_DIV_C0_0:CLK_OUT" "PF_XCVR_0:CTRL_CLK" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"PF_TX_PLL_0_0:PLL_LOCK" "reset_syn_0:PLL_LOCK" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"PF_TX_PLL_0_0:REF_CLK" "PF_XCVR_0:LANE0_CDR_REF_CLK_0" "PF_XCVR_REF_CLK_0_0:REF_CLK" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"PF_XCVR_REF_CLK_0_0:REF_CLK_PAD_N" "REF_CLK_PAD_N_0" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"PF_XCVR_REF_CLK_0_0:REF_CLK_PAD_P" "REF_CLK_PAD_P_0" }

# Add bus net connections
sd_connect_pins -sd_name ${sd_name} -pin_names {"CoreJESD204BRX_0:DATA_OUT_0" "PF_TPSRAM_C1_0:W_DATA" "prbs_checker_0:prbs_data" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"CoreJESD204BRX_0:RX_CODE_VIOLATION_0" "DATA_HANDLE_0:NIT_ERR" "LED_DEBUG_BLK_0:NIT_ERR" "PF_XCVR_0:LANE0_RX_CODE_VIOLATION" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"CoreJESD204BRX_0:RX_DATA_0" "PF_XCVR_0:LANE0_RX_DATA" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"CoreJESD204BRX_0:RX_DISP_ERR_0" "DATA_HANDLE_0:DISP_ERR" "LED_DEBUG_BLK_0:DISP_ERR" "PF_XCVR_0:LANE0_RX_DISPARITY_ERROR" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"CoreJESD204BRX_0:RX_K_0" "PF_XCVR_0:LANE0_8B10B_RX_K" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"Core_JESD_TX_0:DATA_IN_0" "DATA_GENERATOR_0:data_out" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"Core_JESD_TX_0:TX_DATA_0" "ERR_GEN_0:tx_data_in" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"Core_JESD_TX_0:TX_K_0" "ERR_GEN_0:tx_k_in" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"DATA_GENERATOR_0:prbs_sel" "DATA_GENERATOR_0:wave_sel" "DATA_HANDLE_0:PRBS_SEL" "prbs_checker_0:prbs_sel" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"DATA_HANDLE_0:DATA_WADDR" "PF_TPSRAM_C0_0:W_ADDR" "PF_TPSRAM_C1_0:W_ADDR" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"DATA_HANDLE_0:DOUT_RDATA" "PF_TPSRAM_C1_0:R_DATA" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"DATA_HANDLE_0:ERR_NO" "prbs_checker_0:o_error" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"DATA_HANDLE_0:JESD_RDATA" "PF_TPSRAM_C0_0:R_DATA" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"DATA_HANDLE_0:R_ADDR" "PF_TPSRAM_C0_0:R_ADDR" "PF_TPSRAM_C1_0:R_ADDR" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"DATA_HANDLE_0:STATUS_OUT" "PF_TPSRAM_C0_0:W_DATA" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"ERR_GEN_0:tx_data_out" "PF_XCVR_0:LANE0_TX_DATA" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"ERR_GEN_0:tx_k_out" "PF_XCVR_0:LANE0_8B10B_TX_K" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"LED_DEBUG_BLK_0:LED_OUT" "LED_OUT" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"LED_DEBUG_BLK_0:SEL_IN" "SEL_IN" }

# Add bus interface net connections
sd_connect_pins -sd_name ${sd_name} -pin_names {"PF_TX_PLL_0_0:CLKS_TO_XCVR" "PF_XCVR_0:CLKS_FROM_TXPLL_0" }

# Re-enable auto promotion of pins of type 'pad'
auto_promote_pad_pins -promote_all 1
# Save the SmartDesign 
save_smartdesign -sd_name ${sd_name}
# Generate SmartDesign "top"
generate_component -component_name ${sd_name}
