# Exporting core MAC_to_AXIS to TCL
# Exporting Create HDL core command for module MAC_to_AXIS
create_hdl_core -file {hdl/MAC_to_AXIS.v} -module {MAC_to_AXIS} -library {work} -package {}
# Exporting BIF information of  HDL core command for module MAC_to_AXIS
hdl_core_add_bif -hdl_core_name {MAC_to_AXIS} -bif_definition {AXI4Stream:AMBA:AMBA4:master} -bif_name {AXI4S_INITR} -signal_map {\
"TVALID:AXI4S_RX_TVALID" \
"TREADY:AXI4S_RX_TREADY" \
"TDATA:AXI4S_RX_TDATA" \
"TKEEP:AXI4S_RX_TKEEP" \
"TLAST:AXI4S_RX_TLAST" }
hdl_core_add_bif -hdl_core_name {MAC_to_AXIS} -bif_definition {AXI4Stream:AMBA:AMBA4:slave} -bif_name {AXI4S_TRGT} -signal_map {\
"TVALID:AXI4S_TX_TVALID" \
"TREADY:AXI4S_TX_TREADY" \
"TDATA:AXI4S_TX_TDATA" \
"TKEEP:AXI4S_TX_TKEEP" \
"TLAST:AXI4S_TX_TLAST" }
