
****************************************************************
                LIBERO SoC and BOARD VERSIONS
****************************************************************

This application is tested with following Libero and board versions.

Libero SoC          --  Version: Libero SoC  v2025.1
FlashproExpress     --  Version: Libero SoC  v2025.1 
Board	            --  Polarfire Evaluation kit

******************************************
     DESIGN FILES DIRECTORY STRUCTURE
******************************************


 mpf_AN5466_df
    |
    |
    |        
    |---GUI
    |
    |---hw 
    | 	  |
    | 	  |----common
    | 	  |    |---common.tcl
    | 	  |
    | 	  |----src
    | 	  |     |---components
    | 	  |     |---constraints
    | 	  |     |---hdl
    | 	  |     |---stimulus
    | 	  |     |---1_create_design.tcl
    | 	  |     |---2_constrain_design.tcl
    | 	  |     |---4_implement_design.tcl
    | 	  |     |---5_program_design.tcl
    | 	  |
    | 	  |----script.tcl
    | 	  |----TCL_Script_readme.txt
    |	  |
    |     |---JAPLL_Configuration
    |     |     |----japll_params.tcl
    |     |
    |
    |---Programming_File
    |
    |---SmartDebug_File
    |
    |---Readme.txt
    
GUI
--------------------
This folder contains GUI installation files used in the project

HW
--------------------
This folder contains hardware design files used in the Libero to create the project. This design contains design files for 8b10b, 64b66b,PMA, PMA_bitslip, Smartbert design.

Programming_File
--------------------
This folder contains programming job file for the project

SmartDebug_File
--------------------
This folder contains the SmartDebug FPGA Array data file for the project





