# Microsemi Physical design constraints file

# Version: v12.6 12.900.20.24

# Design Name: PF_10GESMC 

# Input Netlist Format: EDIF 

# Family: PolarFire , Die: MPF300T , Package: FCG1152 , Speed grade: -1 

# Date generated: Mon Aug 16 09:33:20 2021 


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# Local clock constraints
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# Region constraints
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# Core cell constraints
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set_location -inst_name CLOCK_RESET_GEN_0/PF_TX_PLL0_0/PF_TX_PLL0_0/txpll_isnt_0 -fixed true -x 2460 -y 320
set_location -inst_name CLOCK_RESET_GEN_0/PF_XCVR_REFCLK_0/PF_XCVR_REFCLK_0/I_IO -fixed true -x 2467 -y 371
set_location -inst_name XCVR_CORE10GMAC_SUBSYSTEM_0/PF_XCVR_ERM_C0_0/I_XCVR/LANE0 -fixed true -x 2460 -y 344
