# Exporting core axi_inf_map to TCL
# Exporting Create HDL core command for module axi_inf_map
create_hdl_core -file {hdl/axi_inf_map.vhd} -module {axi_inf_map} -library {work} -package {}
# Exporting BIF information of  HDL core command for module axi_inf_map
hdl_core_add_bif -hdl_core_name {axi_inf_map} -bif_definition {AXI4Stream:AMBA:AMBA4:slave} -bif_name {input_inf} -signal_map {\
"TVALID:TVALID_I" \
"TDATA:TDATA_I" \
"TKEEP:TKEEP_I" \
"TUSER:TUSER_I" \
"TLAST:TLAST_I" \
"TSTRB:TSTRB_I" }
hdl_core_add_bif -hdl_core_name {axi_inf_map} -bif_definition {AXI4Stream:AMBA:AMBA4:master} -bif_name {output_inf} -signal_map {\
"TVALID:TVALID_O" \
"TDATA:TDATA_O" \
"TSTRB:TSTRB_O" \
"TKEEP:TKEEP_O" \
"TLAST:TLAST_O" \
"TUSER:TUSER_O" }
