src/platform/drivers/fpga_ip/CoreUARTapb/core_uart_apb.o: \
 ../src/platform/drivers/fpga_ip/CoreUARTapb/core_uart_apb.c \
 ../src/platform/drivers/fpga_ip/CoreUARTapb/coreuartapb_regs.h \
 ../src/platform/drivers/fpga_ip/CoreUARTapb/core_uart_apb.h \
 C:\Work_Folder_Akhil\Q3_2024_2025\Arena_finalizing\PolarFire\AN5270_PIP\New_Softconsole\mpf_an5270_v2025p1_df\src\platform/hal/hal.h \
 C:\Work_Folder_Akhil\Q3_2024_2025\Arena_finalizing\PolarFire\AN5270_PIP\New_Softconsole\mpf_an5270_v2025p1_df\src\platform/hal/cpu_types.h \
 C:\Work_Folder_Akhil\Q3_2024_2025\Arena_finalizing\PolarFire\AN5270_PIP\New_Softconsole\mpf_an5270_v2025p1_df\src\platform/hal/hw_reg_access.h \
 C:\Work_Folder_Akhil\Q3_2024_2025\Arena_finalizing\PolarFire\AN5270_PIP\New_Softconsole\mpf_an5270_v2025p1_df\src\platform/hal/hal_assert.h

../src/platform/drivers/fpga_ip/CoreUARTapb/coreuartapb_regs.h:

../src/platform/drivers/fpga_ip/CoreUARTapb/core_uart_apb.h:

C:\Work_Folder_Akhil\Q3_2024_2025\Arena_finalizing\PolarFire\AN5270_PIP\New_Softconsole\mpf_an5270_v2025p1_df\src\platform/hal/hal.h:

C:\Work_Folder_Akhil\Q3_2024_2025\Arena_finalizing\PolarFire\AN5270_PIP\New_Softconsole\mpf_an5270_v2025p1_df\src\platform/hal/cpu_types.h:

C:\Work_Folder_Akhil\Q3_2024_2025\Arena_finalizing\PolarFire\AN5270_PIP\New_Softconsole\mpf_an5270_v2025p1_df\src\platform/hal/hw_reg_access.h:

C:\Work_Folder_Akhil\Q3_2024_2025\Arena_finalizing\PolarFire\AN5270_PIP\New_Softconsole\mpf_an5270_v2025p1_df\src\platform/hal/hal_assert.h:
