# Exporting core AXI4S_SLAVE_SYNC to TCL
# Exporting Create HDL core command for module AXI4S_SLAVE_SYNC
create_hdl_core -file {hdl/AXI4S_SLAVE_SYNC.vhd} -module {AXI4S_SLAVE_SYNC} -library {work} -package {}
# Exporting BIF information of  HDL core command for module AXI4S_SLAVE_SYNC
hdl_core_add_bif -hdl_core_name {AXI4S_SLAVE_SYNC} -bif_definition {AXI4Stream:AMBA:AMBA4:slave} -bif_name {BIF_1} -signal_map {\
"TVALID:TVALID_I" \
"TDATA:TDATA_I" \
"TLAST:TLAST_I" }
