# Creating SmartDesign "BaseR_TOP"
set sd_name {BaseR_TOP}
create_smartdesign -sd_name ${sd_name}

# Disable auto promotion of pins of type 'pad'
auto_promote_pad_pins -promote_all 0

# Create top level Scalar Ports
sd_create_scalar_port -sd_name ${sd_name} -port_name {LANE0_RXD_N} -port_direction {IN} -port_is_pad {1}
sd_create_scalar_port -sd_name ${sd_name} -port_name {LANE0_RXD_P} -port_direction {IN} -port_is_pad {1}
sd_create_scalar_port -sd_name ${sd_name} -port_name {REF_CLK_PAD_N} -port_direction {IN} -port_is_pad {1}
sd_create_scalar_port -sd_name ${sd_name} -port_name {REF_CLK_PAD_P} -port_direction {IN} -port_is_pad {1}

sd_create_scalar_port -sd_name ${sd_name} -port_name {LANE0_TXD_N} -port_direction {OUT} -port_is_pad {1}
sd_create_scalar_port -sd_name ${sd_name} -port_name {LANE0_TXD_P} -port_direction {OUT} -port_is_pad {1}



# Add AND2_0 instance
sd_instantiate_macro -sd_name ${sd_name} -macro_name {AND2} -instance_name {AND2_0}
sd_invert_pins -sd_name ${sd_name} -pin_names {AND2_0:B}



# Add Core10GBaseR_PHY_C0_0 instance
sd_instantiate_component -sd_name ${sd_name} -component_name {Core10GBaseR_PHY_C0} -instance_name {Core10GBaseR_PHY_C0_0}
sd_mark_pins_unused -sd_name ${sd_name} -pin_names {Core10GBaseR_PHY_C0_0:O_PMA49_TX_GRBX_HDR_EN}
sd_mark_pins_unused -sd_name ${sd_name} -pin_names {Core10GBaseR_PHY_C0_0:O_PMA49_TX_GRBX_DATA_EN}
sd_mark_pins_unused -sd_name ${sd_name} -pin_names {Core10GBaseR_PHY_C0_0:TX_DB_DETECT}
sd_mark_pins_unused -sd_name ${sd_name} -pin_names {Core10GBaseR_PHY_C0_0:TX_SB_CORRECT}
sd_mark_pins_unused -sd_name ${sd_name} -pin_names {Core10GBaseR_PHY_C0_0:RX_DB_DETECT}
sd_mark_pins_unused -sd_name ${sd_name} -pin_names {Core10GBaseR_PHY_C0_0:RX_SB_CORRECT}



# Add CORE10GMAC0_0 instance
sd_instantiate_component -sd_name ${sd_name} -component_name {CORE10GMAC0} -instance_name {CORE10GMAC0_0}
sd_invert_pins -sd_name ${sd_name} -pin_names {CORE10GMAC0_0:I_SYS_TX_SRESET}
sd_invert_pins -sd_name ${sd_name} -pin_names {CORE10GMAC0_0:I_SYS_RX_SRESET}
sd_mark_pins_unused -sd_name ${sd_name} -pin_names {CORE10GMAC0_0:O_CORE_TX_SRESET}
sd_mark_pins_unused -sd_name ${sd_name} -pin_names {CORE10GMAC0_0:O_CORE_RX_SRESET}
sd_mark_pins_unused -sd_name ${sd_name} -pin_names {CORE10GMAC0_0:O_SYS_MAC_TX_FAULT}
sd_mark_pins_unused -sd_name ${sd_name} -pin_names {CORE10GMAC0_0:O_SYS_MAC_TX_ERR_BUS_PROTOCOL}
sd_mark_pins_unused -sd_name ${sd_name} -pin_names {CORE10GMAC0_0:O_SYS_MAC_TX_ERR_FIFO_OVERFLOW}
sd_mark_pins_unused -sd_name ${sd_name} -pin_names {CORE10GMAC0_0:O_SYS_MAC_TX_ERR_FIFO_UNDERRUN}
sd_mark_pins_unused -sd_name ${sd_name} -pin_names {CORE10GMAC0_0:O_SYS_MAC_RX_ERR_FIFO_OVERFLOW}
sd_connect_pins_to_constant -sd_name ${sd_name} -pin_names {CORE10GMAC0_0:I_CFG_RS_TX_FAULT_EN} -value {GND}
sd_connect_pins_to_constant -sd_name ${sd_name} -pin_names {CORE10GMAC0_0:I_CFG_RS_TX_FAULT_LOCAL} -value {GND}
sd_connect_pins_to_constant -sd_name ${sd_name} -pin_names {CORE10GMAC0_0:I_CFG_RS_TX_FAULT_REMOTE} -value {GND}
sd_connect_pins_to_constant -sd_name ${sd_name} -pin_names {CORE10GMAC0_0:I_CFG_RS_TX_IDLE} -value {GND}
sd_invert_pins -sd_name ${sd_name} -pin_names {CORE10GMAC0_0:I_RS_RX_SRESET}
sd_mark_pins_unused -sd_name ${sd_name} -pin_names {CORE10GMAC0_0:O_RS_RX_FAULT_LOCAL}
sd_mark_pins_unused -sd_name ${sd_name} -pin_names {CORE10GMAC0_0:O_RS_RX_FAULT_REMOTE}
sd_mark_pins_unused -sd_name ${sd_name} -pin_names {CORE10GMAC0_0:O_SYS_MAC_TX_STATS_VECTOR}
sd_mark_pins_unused -sd_name ${sd_name} -pin_names {CORE10GMAC0_0:O_SYS_MAC_RX_STATS_VECTOR}
sd_mark_pins_unused -sd_name ${sd_name} -pin_names {CORE10GMAC0_0:O_SYS_MAC_RX_PREAMBLE}



# Add COREABC_C0_0 instance
sd_instantiate_component -sd_name ${sd_name} -component_name {COREABC_C0} -instance_name {COREABC_C0_0}
sd_mark_pins_unused -sd_name ${sd_name} -pin_names {COREABC_C0_0:PRESETN}
sd_mark_pins_unused -sd_name ${sd_name} -pin_names {COREABC_C0_0:IO_OUT}



# Add COREAPB30_0 instance
sd_instantiate_component -sd_name ${sd_name} -component_name {COREAPB30} -instance_name {COREAPB30_0}



# Add FiFo_wrapper_Top_0 instance
sd_instantiate_hdl_module -sd_name ${sd_name} -hdl_module_name {FiFo_wrapper_Top} -hdl_file {hdl\FiFo_wrapper_Top.v} -instance_name {FiFo_wrapper_Top_0}



# Add mac_tx_mux instance
sd_instantiate_hdl_module -sd_name ${sd_name} -hdl_module_name {mac_tx_mux} -hdl_file {hdl\mac_tx_mux.v} -instance_name {mac_tx_mux}



# Add pckt_generator_checker_0 instance
sd_instantiate_hdl_module -sd_name ${sd_name} -hdl_module_name {pckt_generator_checker} -hdl_file {hdl\pckt_generator_checker.v} -instance_name {pckt_generator_checker_0}
sd_connect_pins_to_constant -sd_name ${sd_name} -pin_names {pckt_generator_checker_0:PWRITE_IN} -value {GND}
sd_connect_pins_to_constant -sd_name ${sd_name} -pin_names {pckt_generator_checker_0:PENABLE_IN} -value {GND}
sd_connect_pins_to_constant -sd_name ${sd_name} -pin_names {pckt_generator_checker_0:PSEL_IN} -value {GND}
sd_mark_pins_unused -sd_name ${sd_name} -pin_names {pckt_generator_checker_0:PREADY_OUT}
sd_connect_pins_to_constant -sd_name ${sd_name} -pin_names {pckt_generator_checker_0:INTERRUPT_IN} -value {GND}
sd_mark_pins_unused -sd_name ${sd_name} -pin_names {pckt_generator_checker_0:PKT_RX_READY_OUT}
sd_connect_pins_to_constant -sd_name ${sd_name} -pin_names {pckt_generator_checker_0:PADDR_IN} -value {GND}
sd_connect_pins_to_constant -sd_name ${sd_name} -pin_names {pckt_generator_checker_0:PWDATA_IN} -value {GND}
sd_mark_pins_unused -sd_name ${sd_name} -pin_names {pckt_generator_checker_0:PRDATA_OUT}
sd_connect_pins_to_constant -sd_name ${sd_name} -pin_names {pckt_generator_checker_0:PKT_RX_MOD_IN} -value {GND}
sd_connect_pins_to_constant -sd_name ${sd_name} -pin_names {pckt_generator_checker_0:ERR_TYPE_IN} -value {GND}
sd_connect_pins_to_constant -sd_name ${sd_name} -pin_names {pckt_generator_checker_0:RX_STAT_IN} -value {GND}
sd_mark_pins_unused -sd_name ${sd_name} -pin_names {pckt_generator_checker_0:PKT_TX_MOD_OUT}



# Add PF_CCC0_0 instance
sd_instantiate_component -sd_name ${sd_name} -component_name {PF_CCC0} -instance_name {PF_CCC0_0}



# Add PF_CLK_DIV_C0_0 instance
sd_instantiate_component -sd_name ${sd_name} -component_name {PF_CLK_DIV_C0} -instance_name {PF_CLK_DIV_C0_0}



# Add PF_OSC_C0_0 instance
sd_instantiate_component -sd_name ${sd_name} -component_name {PF_OSC_C0} -instance_name {PF_OSC_C0_0}



# Add PF_POWER_INIT_0 instance
sd_instantiate_component -sd_name ${sd_name} -component_name {PF_POWER_INIT} -instance_name {PF_POWER_INIT_0}
sd_mark_pins_unused -sd_name ${sd_name} -pin_names {PF_POWER_INIT_0:PCIE_INIT_DONE}
sd_mark_pins_unused -sd_name ${sd_name} -pin_names {PF_POWER_INIT_0:USRAM_INIT_DONE}
sd_mark_pins_unused -sd_name ${sd_name} -pin_names {PF_POWER_INIT_0:SRAM_INIT_DONE}
sd_mark_pins_unused -sd_name ${sd_name} -pin_names {PF_POWER_INIT_0:USRAM_INIT_FROM_SNVM_DONE}
sd_mark_pins_unused -sd_name ${sd_name} -pin_names {PF_POWER_INIT_0:USRAM_INIT_FROM_UPROM_DONE}
sd_mark_pins_unused -sd_name ${sd_name} -pin_names {PF_POWER_INIT_0:USRAM_INIT_FROM_SPI_DONE}
sd_mark_pins_unused -sd_name ${sd_name} -pin_names {PF_POWER_INIT_0:SRAM_INIT_FROM_SNVM_DONE}
sd_mark_pins_unused -sd_name ${sd_name} -pin_names {PF_POWER_INIT_0:SRAM_INIT_FROM_UPROM_DONE}
sd_mark_pins_unused -sd_name ${sd_name} -pin_names {PF_POWER_INIT_0:SRAM_INIT_FROM_SPI_DONE}
sd_mark_pins_unused -sd_name ${sd_name} -pin_names {PF_POWER_INIT_0:AUTOCALIB_DONE}



# Add PF_TX_PLL0_0 instance
sd_instantiate_component -sd_name ${sd_name} -component_name {PF_TX_PLL0} -instance_name {PF_TX_PLL0_0}
sd_mark_pins_unused -sd_name ${sd_name} -pin_names {PF_TX_PLL0_0:PLL_LOCK}



# Add PF_XCVR_ERM_C0_0 instance
sd_instantiate_component -sd_name ${sd_name} -component_name {PF_XCVR_ERM_C0} -instance_name {PF_XCVR_ERM_C0_0}
sd_connect_pins_to_constant -sd_name ${sd_name} -pin_names {PF_XCVR_ERM_C0_0:LANE0_PMA_ARST_N} -value {VCC}
sd_mark_pins_unused -sd_name ${sd_name} -pin_names {PF_XCVR_ERM_C0_0:LANE0_RX_IDLE}
sd_mark_pins_unused -sd_name ${sd_name} -pin_names {PF_XCVR_ERM_C0_0:LANE0_RX_BYPASS_DATA}
sd_mark_pins_unused -sd_name ${sd_name} -pin_names {PF_XCVR_ERM_C0_0:LANE0_STATUS_HI_BER}
sd_connect_pins_to_constant -sd_name ${sd_name} -pin_names {PF_XCVR_ERM_C0_0:LANE0_LOS} -value {GND}
sd_mark_pins_unused -sd_name ${sd_name} -pin_names {PF_XCVR_ERM_C0_0:LANE0_RX_READY}



# Add PF_XCVR_REFCLK_0 instance
sd_instantiate_component -sd_name ${sd_name} -component_name {PF_XCVR_REFCLK} -instance_name {PF_XCVR_REFCLK_0}



# Add PRSTN_SYNC_0 instance
sd_instantiate_component -sd_name ${sd_name} -component_name {PRSTN_SYNC} -instance_name {PRSTN_SYNC_0}
sd_connect_pins_to_constant -sd_name ${sd_name} -pin_names {PRSTN_SYNC_0:BANK_x_VDDI_STATUS} -value {VCC}
sd_connect_pins_to_constant -sd_name ${sd_name} -pin_names {PRSTN_SYNC_0:BANK_y_VDDI_STATUS} -value {VCC}
sd_connect_pins_to_constant -sd_name ${sd_name} -pin_names {PRSTN_SYNC_0:SS_BUSY} -value {GND}
sd_connect_pins_to_constant -sd_name ${sd_name} -pin_names {PRSTN_SYNC_0:FF_US_RESTORE} -value {GND}
sd_mark_pins_unused -sd_name ${sd_name} -pin_names {PRSTN_SYNC_0:PLL_POWERDOWN_B}



# Add RX_PHY_RST_SYNC instance
sd_instantiate_component -sd_name ${sd_name} -component_name {RX_PHY_SYNC} -instance_name {RX_PHY_RST_SYNC}
sd_connect_pins_to_constant -sd_name ${sd_name} -pin_names {RX_PHY_RST_SYNC:BANK_x_VDDI_STATUS} -value {VCC}
sd_connect_pins_to_constant -sd_name ${sd_name} -pin_names {RX_PHY_RST_SYNC:BANK_y_VDDI_STATUS} -value {VCC}
sd_connect_pins_to_constant -sd_name ${sd_name} -pin_names {RX_PHY_RST_SYNC:PLL_LOCK} -value {VCC}
sd_connect_pins_to_constant -sd_name ${sd_name} -pin_names {RX_PHY_RST_SYNC:SS_BUSY} -value {GND}
sd_connect_pins_to_constant -sd_name ${sd_name} -pin_names {RX_PHY_RST_SYNC:FF_US_RESTORE} -value {GND}
sd_mark_pins_unused -sd_name ${sd_name} -pin_names {RX_PHY_RST_SYNC:PLL_POWERDOWN_B}



# Add RX_SYS_RST_SYNC instance
sd_instantiate_component -sd_name ${sd_name} -component_name {RX_SYS_RST} -instance_name {RX_SYS_RST_SYNC}
sd_connect_pins_to_constant -sd_name ${sd_name} -pin_names {RX_SYS_RST_SYNC:BANK_x_VDDI_STATUS} -value {VCC}
sd_connect_pins_to_constant -sd_name ${sd_name} -pin_names {RX_SYS_RST_SYNC:BANK_y_VDDI_STATUS} -value {VCC}
sd_connect_pins_to_constant -sd_name ${sd_name} -pin_names {RX_SYS_RST_SYNC:SS_BUSY} -value {GND}
sd_connect_pins_to_constant -sd_name ${sd_name} -pin_names {RX_SYS_RST_SYNC:FF_US_RESTORE} -value {GND}
sd_mark_pins_unused -sd_name ${sd_name} -pin_names {RX_SYS_RST_SYNC:PLL_POWERDOWN_B}



# Add TX_PHY_RST_SYNC instance
sd_instantiate_component -sd_name ${sd_name} -component_name {TX_PHY_SYNC} -instance_name {TX_PHY_RST_SYNC}
sd_connect_pins_to_constant -sd_name ${sd_name} -pin_names {TX_PHY_RST_SYNC:BANK_x_VDDI_STATUS} -value {VCC}
sd_connect_pins_to_constant -sd_name ${sd_name} -pin_names {TX_PHY_RST_SYNC:BANK_y_VDDI_STATUS} -value {VCC}
sd_connect_pins_to_constant -sd_name ${sd_name} -pin_names {TX_PHY_RST_SYNC:PLL_LOCK} -value {VCC}
sd_connect_pins_to_constant -sd_name ${sd_name} -pin_names {TX_PHY_RST_SYNC:SS_BUSY} -value {GND}
sd_connect_pins_to_constant -sd_name ${sd_name} -pin_names {TX_PHY_RST_SYNC:FF_US_RESTORE} -value {GND}
sd_mark_pins_unused -sd_name ${sd_name} -pin_names {TX_PHY_RST_SYNC:PLL_POWERDOWN_B}



# Add TX_SYS_RST_SYNC instance
sd_instantiate_component -sd_name ${sd_name} -component_name {TX_SYS_RST} -instance_name {TX_SYS_RST_SYNC}
sd_connect_pins_to_constant -sd_name ${sd_name} -pin_names {TX_SYS_RST_SYNC:BANK_x_VDDI_STATUS} -value {VCC}
sd_connect_pins_to_constant -sd_name ${sd_name} -pin_names {TX_SYS_RST_SYNC:BANK_y_VDDI_STATUS} -value {VCC}
sd_connect_pins_to_constant -sd_name ${sd_name} -pin_names {TX_SYS_RST_SYNC:SS_BUSY} -value {GND}
sd_connect_pins_to_constant -sd_name ${sd_name} -pin_names {TX_SYS_RST_SYNC:FF_US_RESTORE} -value {GND}
sd_mark_pins_unused -sd_name ${sd_name} -pin_names {TX_SYS_RST_SYNC:PLL_POWERDOWN_B}



# Add scalar net connections
sd_connect_pins -sd_name ${sd_name} -pin_names {"AND2_0:A" "CORE10GMAC0_0:O_SYS_MAC_TX_RDY" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"AND2_0:B" "CORE10GMAC0_0:O_SYS_MAC_TX_FIFO_AF" "FiFo_wrapper_Top_0:i_sys_mac_tx_fifo_af" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"AND2_0:Y" "pckt_generator_checker_0:PKT_TX_FIFO_READY_IN" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"CORE10GMAC0_0:I_CORE_RX_CLK" "CORE10GMAC0_0:I_CORE_TX_CLK" "CORE10GMAC0_0:I_SYS_CLK" "Core10GBaseR_PHY_C0_0:I_XGMII_RXCLK" "Core10GBaseR_PHY_C0_0:I_XGMII_TXCLK" "FiFo_wrapper_Top_0:mtx_rx_clk" "PF_CCC0_0:OUT1_FABCLK_0" "RX_SYS_RST_SYNC:CLK" "TX_SYS_RST_SYNC:CLK" "pckt_generator_checker_0:SYSCLK_IN" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"CORE10GMAC0_0:I_RS_RX_SRESET" "CORE10GMAC0_0:I_SYS_RX_SRESET" "RX_SYS_RST_SYNC:FABRIC_RESET_N" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"CORE10GMAC0_0:I_SYS_MAC_TX_EN" "mac_tx_mux:mux_tx_en" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"CORE10GMAC0_0:I_SYS_MAC_TX_EOP" "mac_tx_mux:mux_tx_eop" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"CORE10GMAC0_0:I_SYS_MAC_TX_SOP" "mac_tx_mux:mux_tx_sop" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"CORE10GMAC0_0:I_SYS_TX_SRESET" "TX_SYS_RST_SYNC:FABRIC_RESET_N" "pckt_generator_checker_0:PRESET_N_IN" "pckt_generator_checker_0:SYSRST_N_IN" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"CORE10GMAC0_0:O_SYS_MAC_RX_EN" "FiFo_wrapper_Top_0:o_sys_mac_rx_en" "pckt_generator_checker_0:PKT_RX_VAL_IN" "pckt_generator_checker_0:RX_STAT_VLD_IN" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"CORE10GMAC0_0:O_SYS_MAC_RX_EOP" "FiFo_wrapper_Top_0:o_sys_mac_rx_eop" "pckt_generator_checker_0:PKT_RX_EOP_IN" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"CORE10GMAC0_0:O_SYS_MAC_RX_ERR" "pckt_generator_checker_0:PKT_RX_ERR_IN" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"CORE10GMAC0_0:O_SYS_MAC_RX_RDY" "FiFo_wrapper_Top_0:reset_n" "PRSTN_SYNC_0:EXT_RST_N" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"CORE10GMAC0_0:O_SYS_MAC_RX_SOP" "FiFo_wrapper_Top_0:o_sys_mac_rx_sop" "pckt_generator_checker_0:PKT_RX_SOP_IN" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"CORE10GMAC0_0:PCLK" "COREABC_C0_0:PCLK" "PF_CCC0_0:OUT0_FABCLK_0" "PRSTN_SYNC_0:CLK" "pckt_generator_checker_0:PCLK_IN" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"CORE10GMAC0_0:PRESETN" "COREABC_C0_0:NSYSRESET" "PRSTN_SYNC_0:FABRIC_RESET_N" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"Core10GBaseR_PHY_C0_0:I_PMA49_RX_GRBX_DATA_EN" "PF_XCVR_ERM_C0_0:LANE0_RX_DATA_VAL" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"Core10GBaseR_PHY_C0_0:I_PMA49_RX_GRBX_HDR_EN" "PF_XCVR_ERM_C0_0:LANE0_RX_HDR_VAL" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"Core10GBaseR_PHY_C0_0:I_PMA49_RX_GRBX_LOCK" "PF_XCVR_ERM_C0_0:LANE0_STATUS_LOCK" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"Core10GBaseR_PHY_C0_0:I_PMA49_RX_GRBX_SOS" "PF_XCVR_ERM_C0_0:LANE0_RX_SOS" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"Core10GBaseR_PHY_C0_0:I_RXCLK_RESETN" "RX_PHY_RST_SYNC:FABRIC_RESET_N" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"Core10GBaseR_PHY_C0_0:I_RX_CLK" "PF_XCVR_ERM_C0_0:LANE0_RX_CLK_R" "RX_PHY_RST_SYNC:CLK" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"Core10GBaseR_PHY_C0_0:I_TXCLK_RESETN" "TX_PHY_RST_SYNC:FABRIC_RESET_N" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"Core10GBaseR_PHY_C0_0:I_TX_CLK" "PF_XCVR_ERM_C0_0:LANE0_TX_CLK_G" "TX_PHY_RST_SYNC:CLK" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"Core10GBaseR_PHY_C0_0:O_PMA49_TX_GRBX_SOS" "PF_XCVR_ERM_C0_0:LANE0_TX_SOS" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"FiFo_wrapper_Top_0:i_sys_mac_tx_en" "mac_tx_mux:fifo_tx_en" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"FiFo_wrapper_Top_0:i_sys_mac_tx_eop" "mac_tx_mux:fifo_tx_eop" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"FiFo_wrapper_Top_0:i_sys_mac_tx_sop" "mac_tx_mux:fifo_tx_sop" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"LANE0_RXD_N" "PF_XCVR_ERM_C0_0:LANE0_RXD_N" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"LANE0_RXD_P" "PF_XCVR_ERM_C0_0:LANE0_RXD_P" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"LANE0_TXD_N" "PF_XCVR_ERM_C0_0:LANE0_TXD_N" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"LANE0_TXD_P" "PF_XCVR_ERM_C0_0:LANE0_TXD_P" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"PF_CCC0_0:PLL_LOCK_0" "PRSTN_SYNC_0:PLL_LOCK" "RX_SYS_RST_SYNC:PLL_LOCK" "TX_SYS_RST_SYNC:PLL_LOCK" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"PF_CCC0_0:REF_CLK_0" "PF_XCVR_REFCLK_0:FAB_REF_CLK" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"PF_CLK_DIV_C0_0:CLK_IN" "PF_OSC_C0_0:RCOSC_160MHZ_GL" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"PF_CLK_DIV_C0_0:CLK_OUT" "PF_XCVR_ERM_C0_0:CTRL_CLK" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"PF_POWER_INIT_0:DEVICE_INIT_DONE" "PRSTN_SYNC_0:INIT_DONE" "RX_PHY_RST_SYNC:INIT_DONE" "RX_SYS_RST_SYNC:INIT_DONE" "TX_PHY_RST_SYNC:INIT_DONE" "TX_SYS_RST_SYNC:INIT_DONE" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"PF_POWER_INIT_0:FABRIC_POR_N" "PRSTN_SYNC_0:FPGA_POR_N" "RX_PHY_RST_SYNC:FPGA_POR_N" "RX_SYS_RST_SYNC:FPGA_POR_N" "TX_PHY_RST_SYNC:FPGA_POR_N" "TX_SYS_RST_SYNC:FPGA_POR_N" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"PF_POWER_INIT_0:XCVR_INIT_DONE" "PF_XCVR_ERM_C0_0:CTRL_ARST_N" "PF_XCVR_ERM_C0_0:LANE0_PCS_ARST_N" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"PF_TX_PLL0_0:REF_CLK" "PF_XCVR_ERM_C0_0:LANE0_CDR_REF_CLK_0" "PF_XCVR_REFCLK_0:REF_CLK" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"PF_XCVR_ERM_C0_0:LANE0_RX_VAL" "RX_PHY_RST_SYNC:EXT_RST_N" "RX_SYS_RST_SYNC:EXT_RST_N" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"PF_XCVR_ERM_C0_0:LANE0_TX_CLK_STABLE" "TX_PHY_RST_SYNC:EXT_RST_N" "TX_SYS_RST_SYNC:EXT_RST_N" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"PF_XCVR_REFCLK_0:REF_CLK_PAD_N" "REF_CLK_PAD_N" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"PF_XCVR_REFCLK_0:REF_CLK_PAD_P" "REF_CLK_PAD_P" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"mac_tx_mux:pkt_tx_eop" "pckt_generator_checker_0:PKT_TX_EOP_OUT" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"mac_tx_mux:pkt_tx_sop" "pckt_generator_checker_0:PKT_TX_SOP_OUT" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"mac_tx_mux:pkt_tx_val" "pckt_generator_checker_0:PKT_TX_VAL_OUT" }

# Add bus net connections
sd_connect_pins -sd_name ${sd_name} -pin_names {"CORE10GMAC0_0:I_SYS_MAC_TX_BC" "mac_tx_mux:mux_tx_bc" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"CORE10GMAC0_0:I_SYS_MAC_TX_DATA" "mac_tx_mux:mux_tx_data" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"CORE10GMAC0_0:I_XGMII_RXC" "Core10GBaseR_PHY_C0_0:O_XGMII_TXC" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"CORE10GMAC0_0:I_XGMII_RXD" "Core10GBaseR_PHY_C0_0:O_XGMII_TXD" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"CORE10GMAC0_0:O_SYS_MAC_RX_BC" "FiFo_wrapper_Top_0:o_sys_mac_rx_bc" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"CORE10GMAC0_0:O_SYS_MAC_RX_DATA" "FiFo_wrapper_Top_0:o_sys_mac_rx_data" "pckt_generator_checker_0:PKT_RX_DATA_IN" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"CORE10GMAC0_0:O_SYS_MAC_RX_ERR_W" "pckt_generator_checker_0:PKT_RX_ERR_TYPE" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"CORE10GMAC0_0:O_XGMII_TXC" "Core10GBaseR_PHY_C0_0:I_XGMII_RXC" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"CORE10GMAC0_0:O_XGMII_TXD" "Core10GBaseR_PHY_C0_0:I_XGMII_RXD" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"Core10GBaseR_PHY_C0_0:I_PMA49_RX_GRBX_DATA" "PF_XCVR_ERM_C0_0:LANE0_RX_DATA" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"Core10GBaseR_PHY_C0_0:I_PMA49_RX_GRBX_HDR" "PF_XCVR_ERM_C0_0:LANE0_RX_HDR" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"Core10GBaseR_PHY_C0_0:O_PMA49_TX_GRBX_DATA" "PF_XCVR_ERM_C0_0:LANE0_TX_DATA" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"Core10GBaseR_PHY_C0_0:O_PMA49_TX_GRBX_HDR" "PF_XCVR_ERM_C0_0:LANE0_TX_HDR" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"FiFo_wrapper_Top_0:i_sys_mac_tx_bc" "mac_tx_mux:fifo_tx_bc" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"FiFo_wrapper_Top_0:i_sys_mac_tx_data" "mac_tx_mux:fifo_tx_data" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"mac_tx_mux:pkt_tx_data" "pckt_generator_checker_0:PKT_TX_DATA_OUT" }

# Add bus interface net connections
sd_connect_pins -sd_name ${sd_name} -pin_names {"CORE10GMAC0_0:APB_0" "COREAPB30_0:APBmslave0" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"COREABC_C0_0:APB3Initiator" "COREAPB30_0:APB3mmaster" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"PF_TX_PLL0_0:CLKS_TO_XCVR" "PF_XCVR_ERM_C0_0:CLKS_FROM_TXPLL_0" }

# Re-enable auto promotion of pins of type 'pad'
auto_promote_pad_pins -promote_all 1
# Save the SmartDesign 
save_smartdesign -sd_name ${sd_name}
# Generate SmartDesign "BaseR_TOP"
generate_component -component_name ${sd_name}
