# Import source files

import_files -hdl_source {./src/hdl/FiFo_wrapper_Top.v}
import_files -hdl_source {./src/hdl/pckt_generator_checker.v}
import_files -hdl_source {./src/hdl/mac_tx_mux.v}

build_design_hierarchy 

# Create, configure and generate core components
source ./src/components/Core10GBaseR_PHY_C0.tcl
source ./src/components/COREABC_C0.tcl
source ./src/components/CORE10GMAC0.tcl
source ./src/components/COREAPB30.tcl
source ./src/components/corefifo_lpbk.tcl
source ./src/components/PF_CCC0.tcl
source ./src/components/PF_CLK_DIV_C0.tcl
source ./src/components/PF_OSC_C0.tcl
source ./src/components/PF_POWER_INIT.tcl
source ./src/components/PF_TX_PLL0.tcl
source ./src/components/PF_XCVR_ERM_C0.tcl
source ./src/components/PF_XCVR_REFCLK.tcl
source ./src/components/TX_SYS_RST.tcl
source ./src/components/RX_SYS_RST.tcl
source ./src/components/RX_PHY_SYNC.tcl
source ./src/components/TX_PHY_SYNC.tcl
source ./src/components/PRSTN_SYNC.tcl


# Generate SmartDesign Components

build_design_hierarchy 
source ./src/components/BaseR_TOP.tcl

file copy -force "./src/stimulus/wave.do" "../Libero_design/$Prjname/simulation/wave.do"

# Set top level module
build_design_hierarchy 
set_root -module {BaseR_TOP::work} 
build_design_hierarchy 
save_project
puts "Design generated successfully\n"
