# Creating SmartDesign "BASEKR_TOP"
set sd_name {BASEKR_TOP}
create_smartdesign -sd_name ${sd_name}

# Disable auto promotion of pins of type 'pad'
auto_promote_pad_pins -promote_all 0

# Create top level Scalar Ports
sd_create_scalar_port -sd_name ${sd_name} -port_name {LANE0_RXD_N} -port_direction {IN} -port_is_pad {1}
sd_create_scalar_port -sd_name ${sd_name} -port_name {LANE0_RXD_P} -port_direction {IN} -port_is_pad {1}
sd_create_scalar_port -sd_name ${sd_name} -port_name {REF_CLK_PAD_N} -port_direction {IN} -port_is_pad {1}
sd_create_scalar_port -sd_name ${sd_name} -port_name {REF_CLK_PAD_P} -port_direction {IN} -port_is_pad {1}
sd_create_scalar_port -sd_name ${sd_name} -port_name {TCK} -port_direction {IN}
sd_create_scalar_port -sd_name ${sd_name} -port_name {TDI} -port_direction {IN}
sd_create_scalar_port -sd_name ${sd_name} -port_name {TMS} -port_direction {IN}
sd_create_scalar_port -sd_name ${sd_name} -port_name {TRSTB} -port_direction {IN}
sd_create_scalar_port -sd_name ${sd_name} -port_name {UART_RX} -port_direction {IN}

sd_create_scalar_port -sd_name ${sd_name} -port_name {LANE0_TXD_N} -port_direction {OUT} -port_is_pad {1}
sd_create_scalar_port -sd_name ${sd_name} -port_name {LANE0_TXD_P} -port_direction {OUT} -port_is_pad {1}
sd_create_scalar_port -sd_name ${sd_name} -port_name {SIGNAL_DETECT} -port_direction {OUT}
sd_create_scalar_port -sd_name ${sd_name} -port_name {TDO} -port_direction {OUT}
sd_create_scalar_port -sd_name ${sd_name} -port_name {UART_TX} -port_direction {OUT}



# Add BASEKR_CMN instance
sd_instantiate_component -sd_name ${sd_name} -component_name {BASEKR_CMN_0} -instance_name {BASEKR_CMN}



# Add BASEKR_IP_0 instance
sd_instantiate_component -sd_name ${sd_name} -component_name {BASEKR_IP_0} -instance_name {BASEKR_IP_0}



# Add COREJTAGDEBUG instance
sd_instantiate_component -sd_name ${sd_name} -component_name {COREJTAGDEBUG_C1} -instance_name {COREJTAGDEBUG}



# Add CTRL_CLK_DIVIDER_0 instance
sd_instantiate_component -sd_name ${sd_name} -component_name {CTRL_CLK_DIVIDER} -instance_name {CTRL_CLK_DIVIDER_0}



# Add PF_INIT_MONITOR instance
sd_instantiate_component -sd_name ${sd_name} -component_name {PF_INIT_MONITOR_C2} -instance_name {PF_INIT_MONITOR}
sd_mark_pins_unused -sd_name ${sd_name} -pin_names {PF_INIT_MONITOR:PCIE_INIT_DONE}
sd_mark_pins_unused -sd_name ${sd_name} -pin_names {PF_INIT_MONITOR:USRAM_INIT_DONE}
sd_mark_pins_unused -sd_name ${sd_name} -pin_names {PF_INIT_MONITOR:SRAM_INIT_DONE}
sd_mark_pins_unused -sd_name ${sd_name} -pin_names {PF_INIT_MONITOR:USRAM_INIT_FROM_SNVM_DONE}
sd_mark_pins_unused -sd_name ${sd_name} -pin_names {PF_INIT_MONITOR:USRAM_INIT_FROM_UPROM_DONE}
sd_mark_pins_unused -sd_name ${sd_name} -pin_names {PF_INIT_MONITOR:USRAM_INIT_FROM_SPI_DONE}
sd_mark_pins_unused -sd_name ${sd_name} -pin_names {PF_INIT_MONITOR:SRAM_INIT_FROM_SNVM_DONE}
sd_mark_pins_unused -sd_name ${sd_name} -pin_names {PF_INIT_MONITOR:SRAM_INIT_FROM_UPROM_DONE}
sd_mark_pins_unused -sd_name ${sd_name} -pin_names {PF_INIT_MONITOR:SRAM_INIT_FROM_SPI_DONE}
sd_mark_pins_unused -sd_name ${sd_name} -pin_names {PF_INIT_MONITOR:AUTOCALIB_DONE}



# Add PF_OSC_INTERNAL instance
sd_instantiate_component -sd_name ${sd_name} -component_name {PF_OSC_C1_0} -instance_name {PF_OSC_INTERNAL}



# Add scalar net connections
sd_connect_pins -sd_name ${sd_name} -pin_names {"BASEKR_CMN:FABRIC_RESET_N" "BASEKR_IP_0:FABRIC_RESET_N" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"BASEKR_CMN:FAB_CLK_50M" "BASEKR_IP_0:FAB_CLK_50M" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"BASEKR_CMN:FPGA_POR_N" "PF_INIT_MONITOR:FABRIC_POR_N" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"BASEKR_CMN:INIT_DONE" "BASEKR_IP_0:DEVICE_INIT_DONE" "PF_INIT_MONITOR:DEVICE_INIT_DONE" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"BASEKR_CMN:REF_CLK_IN_156p25M" "BASEKR_IP_0:REF_CLK_156p25M" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"BASEKR_CMN:SYS_CLK_156p25M" "BASEKR_IP_0:SYS_CLK_156p25M" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"BASEKR_IP_0:LANE0_RXD_N" "LANE0_RXD_N" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"BASEKR_IP_0:LANE0_RXD_P" "LANE0_RXD_P" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"BASEKR_IP_0:LANE0_TXD_N" "LANE0_TXD_N" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"BASEKR_IP_0:LANE0_TXD_P" "LANE0_TXD_P" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"BASEKR_IP_0:REF_CLK_PAD_N" "REF_CLK_PAD_N" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"BASEKR_IP_0:REF_CLK_PAD_P" "REF_CLK_PAD_P" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"BASEKR_IP_0:SIGNAL_DETECT" "SIGNAL_DETECT" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"BASEKR_IP_0:TCK" "COREJTAGDEBUG:TGT_TCK_0" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"BASEKR_IP_0:TDI" "COREJTAGDEBUG:TGT_TDI_0" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"BASEKR_IP_0:TDO" "COREJTAGDEBUG:TGT_TDO_0" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"BASEKR_IP_0:TMS" "COREJTAGDEBUG:TGT_TMS_0" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"BASEKR_IP_0:TRSTB" "COREJTAGDEBUG:TGT_TRSTN_0" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"BASEKR_IP_0:UART_RX" "UART_RX" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"BASEKR_IP_0:UART_TX" "UART_TX" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"BASEKR_IP_0:XCVR_CTRL_ARSTN" "PF_INIT_MONITOR:XCVR_INIT_DONE" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"BASEKR_IP_0:XCVR_CTRL_CLK" "CTRL_CLK_DIVIDER_0:CLK_OUT" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"COREJTAGDEBUG:TCK" "TCK" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"COREJTAGDEBUG:TDI" "TDI" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"COREJTAGDEBUG:TDO" "TDO" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"COREJTAGDEBUG:TMS" "TMS" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"COREJTAGDEBUG:TRSTB" "TRSTB" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"CTRL_CLK_DIVIDER_0:CLK_IN" "PF_OSC_INTERNAL:RCOSC_160MHZ_GL" }


# Add bus interface net connections
sd_connect_pins -sd_name ${sd_name} -pin_names {"BASEKR_CMN:AHBmmaster0" "BASEKR_IP_0:AHBL_INITIATOR" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"BASEKR_CMN:AHBmslave1" "BASEKR_IP_0:AHBtarget" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"BASEKR_CMN:Q2_LANE0_DRI" "BASEKR_IP_0:LANE0_DRI_SLAVE" }

# Re-enable auto promotion of pins of type 'pad'
auto_promote_pad_pins -promote_all 1
# Save the SmartDesign 
save_smartdesign -sd_name ${sd_name}
# Generate SmartDesign "BASEKR_TOP"
generate_component -component_name ${sd_name}
