# Creating SmartDesign "UART_interface"
set sd_name {UART_interface}
create_smartdesign -sd_name ${sd_name}

# Disable auto promotion of pins of type 'pad'
auto_promote_pad_pins -promote_all 0

# Create top level Scalar Ports
sd_create_scalar_port -sd_name ${sd_name} -port_name {RX} -port_direction {IN}
sd_create_scalar_port -sd_name ${sd_name} -port_name {penable_i} -port_direction {IN}
sd_create_scalar_port -sd_name ${sd_name} -port_name {psel_i} -port_direction {IN}
sd_create_scalar_port -sd_name ${sd_name} -port_name {pwrite_i} -port_direction {IN}
sd_create_scalar_port -sd_name ${sd_name} -port_name {reset_i} -port_direction {IN}
sd_create_scalar_port -sd_name ${sd_name} -port_name {sel_4k_i} -port_direction {IN}
sd_create_scalar_port -sd_name ${sd_name} -port_name {sys_clk_i} -port_direction {IN}

sd_create_scalar_port -sd_name ${sd_name} -port_name {TX} -port_direction {OUT}
sd_create_scalar_port -sd_name ${sd_name} -port_name {cxp_send_host_cmd_intr_o} -port_direction {OUT}
sd_create_scalar_port -sd_name ${sd_name} -port_name {pready_o} -port_direction {OUT}
sd_create_scalar_port -sd_name ${sd_name} -port_name {pslverr_o} -port_direction {OUT}


# Create top level Bus Ports
sd_create_bus_port -sd_name ${sd_name} -port_name {paddr_i} -port_direction {IN} -port_range {[31:0]}
sd_create_bus_port -sd_name ${sd_name} -port_name {pwdata_i} -port_direction {IN} -port_range {[31:0]}

sd_create_bus_port -sd_name ${sd_name} -port_name {alpha_o} -port_direction {OUT} -port_range {[7:0]}
sd_create_bus_port -sd_name ${sd_name} -port_name {bconst_o} -port_direction {OUT} -port_range {[9:0]}
sd_create_bus_port -sd_name ${sd_name} -port_name {cxp_sid0_o} -port_direction {OUT} -port_range {[7:0]}
sd_create_bus_port -sd_name ${sd_name} -port_name {cxp_sid1_o} -port_direction {OUT} -port_range {[7:0]}
sd_create_bus_port -sd_name ${sd_name} -port_name {gconst_o} -port_direction {OUT} -port_range {[9:0]}
sd_create_bus_port -sd_name ${sd_name} -port_name {h_pan_c1_o} -port_direction {OUT} -port_range {[11:0]}
sd_create_bus_port -sd_name ${sd_name} -port_name {h_pan_c2_o} -port_direction {OUT} -port_range {[11:0]}
sd_create_bus_port -sd_name ${sd_name} -port_name {prdata_o} -port_direction {OUT} -port_range {[31:0]}
sd_create_bus_port -sd_name ${sd_name} -port_name {rconst_o} -port_direction {OUT} -port_range {[9:0]}
sd_create_bus_port -sd_name ${sd_name} -port_name {second_const_o} -port_direction {OUT} -port_range {[19:0]}
sd_create_bus_port -sd_name ${sd_name} -port_name {v_pan_c1_o} -port_direction {OUT} -port_range {[11:0]}
sd_create_bus_port -sd_name ${sd_name} -port_name {v_pan_c2_o} -port_direction {OUT} -port_range {[11:0]}


# Create top level Bus interface Ports
sd_create_bif_port -sd_name ${sd_name} -port_name {BIF_1} -port_bif_vlnv {AMBA:AMBA2:APB:r0p0} -port_bif_role {slave} -port_bif_mapping {\
"PADDR:paddr_i" \
"PSELx:psel_i" \
"PENABLE:penable_i" \
"PWRITE:pwrite_i" \
"PRDATA:prdata_o" \
"PWDATA:pwdata_i" \
"PREADY:pready_o" \
"PSLVERR:pslverr_o" } 

# Add addr_decoder_0 instance
sd_instantiate_hdl_module -sd_name ${sd_name} -hdl_module_name {addr_decoder} -hdl_file {hdl\addr_decoder.vhd} -instance_name {addr_decoder_0}
sd_create_pin_group -sd_name ${sd_name} -group_name {Group} -instance_name {addr_decoder_0} -pin_names {"pip_select_o" "v_shift_o" "h_shift_o" "step_o" "pip_mode_sel_o" "bayer_edge_sel_o" "frame_tcount_o" "ch_selector_o" }
sd_mark_pins_unused -sd_name ${sd_name} -pin_names {addr_decoder_0:pip_select_o}
sd_mark_pins_unused -sd_name ${sd_name} -pin_names {addr_decoder_0:bayer_edge_sel_o}
sd_mark_pins_unused -sd_name ${sd_name} -pin_names {addr_decoder_0:pip_mode_sel_o}
sd_mark_pins_unused -sd_name ${sd_name} -pin_names {addr_decoder_0:step_o}
sd_mark_pins_unused -sd_name ${sd_name} -pin_names {addr_decoder_0:h_shift_o}
sd_mark_pins_unused -sd_name ${sd_name} -pin_names {addr_decoder_0:v_shift_o}
sd_mark_pins_unused -sd_name ${sd_name} -pin_names {addr_decoder_0:h_pan_c1_o}
sd_mark_pins_unused -sd_name ${sd_name} -pin_names {addr_decoder_0:v_pan_c1_o}
sd_mark_pins_unused -sd_name ${sd_name} -pin_names {addr_decoder_0:h_pan_c2_o}
sd_mark_pins_unused -sd_name ${sd_name} -pin_names {addr_decoder_0:v_pan_c2_o}
sd_mark_pins_unused -sd_name ${sd_name} -pin_names {addr_decoder_0:ch_selector_o}
sd_mark_pins_unused -sd_name ${sd_name} -pin_names {addr_decoder_0:frame_tcount_o}



# Add apb3_if_0 instance
sd_instantiate_hdl_core -sd_name ${sd_name} -hdl_core_name {apb3_if} -instance_name {apb3_if_0}
# Exporting Parameters of instance apb3_if_0
sd_configure_core_instance -sd_name ${sd_name} -instance_name {apb3_if_0} -params {\
"g_APB3_IF_DATA_WIDTH:32" \
"g_CONST_WIDTH:12" }\
-validate_rules 0
sd_save_core_instance_config -sd_name ${sd_name} -instance_name {apb3_if_0}
sd_update_instance -sd_name ${sd_name} -instance_name {apb3_if_0}
sd_mark_pins_unused -sd_name ${sd_name} -pin_names {apb3_if_0:mode_o}
sd_mark_pins_unused -sd_name ${sd_name} -pin_names {apb3_if_0:alpha_o}
sd_mark_pins_unused -sd_name ${sd_name} -pin_names {apb3_if_0:step_o}



# Add COREUART_C0_0 instance
sd_instantiate_component -sd_name ${sd_name} -component_name {COREUART_C0} -instance_name {COREUART_C0_0}
sd_connect_pins_to_constant -sd_name ${sd_name} -pin_names {COREUART_C0_0:BIT8} -value {VCC}
sd_connect_pins_to_constant -sd_name ${sd_name} -pin_names {COREUART_C0_0:CSN} -value {GND}
sd_connect_pins_to_constant -sd_name ${sd_name} -pin_names {COREUART_C0_0:ODD_N_EVEN} -value {GND}
sd_mark_pins_unused -sd_name ${sd_name} -pin_names {COREUART_C0_0:OVERFLOW}
sd_connect_pins_to_constant -sd_name ${sd_name} -pin_names {COREUART_C0_0:PARITY_EN} -value {GND}
sd_mark_pins_unused -sd_name ${sd_name} -pin_names {COREUART_C0_0:PARITY_ERR}
sd_mark_pins_unused -sd_name ${sd_name} -pin_names {COREUART_C0_0:FRAMING_ERR}
sd_connect_pins_to_constant -sd_name ${sd_name} -pin_names {COREUART_C0_0:BAUD_VAL} -value {0000000000010}
sd_connect_pins_to_constant -sd_name ${sd_name} -pin_names {COREUART_C0_0:BAUD_VAL_FRACTION} -value {011}



# Add receive_data_0 instance
sd_instantiate_hdl_module -sd_name ${sd_name} -hdl_module_name {receive_data} -hdl_file {hdl\receive_data.vhd} -instance_name {receive_data_0}
sd_create_pin_slices -sd_name ${sd_name} -pin_name {receive_data_0:addr_o} -pin_slices {[7:0]}



# Add send_data_0 instance
sd_instantiate_hdl_module -sd_name ${sd_name} -hdl_module_name {send_data} -hdl_file {hdl\send_data.vhd} -instance_name {send_data_0}
sd_connect_pins_to_constant -sd_name ${sd_name} -pin_names {send_data_0:start_i} -value {GND}
sd_connect_pins_to_constant -sd_name ${sd_name} -pin_names {send_data_0:data_cha_i} -value {GND}
sd_connect_pins_to_constant -sd_name ${sd_name} -pin_names {send_data_0:data_chb_i} -value {GND}
sd_connect_pins_to_constant -sd_name ${sd_name} -pin_names {send_data_0:data_chc_i} -value {GND}
sd_connect_pins_to_constant -sd_name ${sd_name} -pin_names {send_data_0:data_chd_i} -value {GND}
sd_connect_pins_to_constant -sd_name ${sd_name} -pin_names {send_data_0:status_i} -value {GND}



# Add video_fifo_0 instance
sd_instantiate_hdl_core -sd_name ${sd_name} -hdl_core_name {video_fifo} -instance_name {video_fifo_0}
# Exporting Parameters of instance video_fifo_0
sd_configure_core_instance -sd_name ${sd_name} -instance_name {video_fifo_0} -params {\
"g_HALF_EMPTY_THRESHOLD:1280" \
"g_INPUT_VIDEO_DATA_BIT_WIDTH:32" \
"g_VIDEO_FIFO_AWIDTH:9" }\
-validate_rules 0
sd_save_core_instance_config -sd_name ${sd_name} -instance_name {video_fifo_0}
sd_update_instance -sd_name ${sd_name} -instance_name {video_fifo_0}
sd_mark_pins_unused -sd_name ${sd_name} -pin_names {video_fifo_0:wfull_o}
sd_mark_pins_unused -sd_name ${sd_name} -pin_names {video_fifo_0:wafull_o}
sd_mark_pins_unused -sd_name ${sd_name} -pin_names {video_fifo_0:rdata_rdy_o}
sd_mark_pins_unused -sd_name ${sd_name} -pin_names {video_fifo_0:raempty_o}
sd_mark_pins_unused -sd_name ${sd_name} -pin_names {video_fifo_0:rhempty_o}
sd_mark_pins_unused -sd_name ${sd_name} -pin_names {video_fifo_0:wdata_count_o}
sd_mark_pins_unused -sd_name ${sd_name} -pin_names {video_fifo_0:rdata_count_o}



# Add scalar net connections
sd_connect_pins -sd_name ${sd_name} -pin_names {"COREUART_C0_0:CLK" "addr_decoder_0:sys_clk_i" "apb3_if_0:pclk_i" "receive_data_0:sys_clk_i" "send_data_0:sys_clk_i" "sys_clk_i" "video_fifo_0:rclock_i" "video_fifo_0:wclock_i" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"COREUART_C0_0:OEN" "receive_data_0:oen_o" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"COREUART_C0_0:RESET_N" "addr_decoder_0:reset_i" "apb3_if_0:preset_i" "receive_data_0:reset_i" "reset_i" "send_data_0:reset_i" "video_fifo_0:rresetn_i" "video_fifo_0:wresetn_i" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"COREUART_C0_0:RX" "RX" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"COREUART_C0_0:RXRDY" "receive_data_0:rx_rdy_i" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"COREUART_C0_0:TX" "TX" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"COREUART_C0_0:TXRDY" "send_data_0:tx_rdy_i" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"COREUART_C0_0:WEN" "send_data_0:wen_o" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"addr_decoder_0:cxp_send_host_cmd_intr_o" "cxp_send_host_cmd_intr_o" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"addr_decoder_0:data_rdy_i" "receive_data_0:data_rdy_o" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"addr_decoder_0:sel_4k_i" "sel_4k_i" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"apb3_if_0:clr_xml_file_ready_i" "send_data_0:uart_fifo_ren_o" "video_fifo_0:ren_i" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"apb3_if_0:uart_fifo_wen_o" "video_fifo_0:wen_i" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"apb3_if_0:xml_file_ready_o" "send_data_0:xml_file_ready" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"send_data_0:uart_fifo_empty_i" "video_fifo_0:rempty_o" }

# Add bus net connections
sd_connect_pins -sd_name ${sd_name} -pin_names {"COREUART_C0_0:DATA_IN" "send_data_0:data_o" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"COREUART_C0_0:DATA_OUT" "receive_data_0:data_i" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"addr_decoder_0:addr_i" "receive_data_0:addr_o[7:0]" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"addr_decoder_0:alpha_o" "alpha_o" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"addr_decoder_0:bgain_o" "apb3_if_0:b_gain_i" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"addr_decoder_0:brightness_o" "apb3_if_0:brightness_i" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"addr_decoder_0:contrast_o" "apb3_if_0:contrast_i" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"addr_decoder_0:cxp_cmd_addr_o" "apb3_if_0:cxp_host_addr_i" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"addr_decoder_0:cxp_cmd_wdata_o" "apb3_if_0:cxp_host_wdata_i" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"addr_decoder_0:cxp_send_host_cmd_sel_o" "apb3_if_0:cxp_host_cmd_sel_i" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"addr_decoder_0:cxp_sid0_o" "cxp_sid0_o" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"addr_decoder_0:cxp_sid1_o" "cxp_sid1_o" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"addr_decoder_0:data_i" "receive_data_0:data_o" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"addr_decoder_0:ggain_o" "apb3_if_0:g_gain_i" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"addr_decoder_0:rgain_o" "apb3_if_0:r_gain_i" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"apb3_if_0:bconst_o" "bconst_o" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"apb3_if_0:gconst_o" "gconst_o" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"apb3_if_0:h_pan_c1_o" "h_pan_c1_o" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"apb3_if_0:h_pan_c2_o" "h_pan_c2_o" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"apb3_if_0:rconst_o" "rconst_o" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"apb3_if_0:second_const_o" "second_const_o" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"apb3_if_0:uart_fifo_wdata_o" "video_fifo_0:wdata_i" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"apb3_if_0:v_pan_c1_o" "v_pan_c1_o" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"apb3_if_0:v_pan_c2_o" "v_pan_c2_o" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"send_data_0:uart_fifo_data_i" "video_fifo_0:rdata_o" }

# Add bus interface net connections
sd_connect_pins -sd_name ${sd_name} -pin_names {"BIF_1" "apb3_if_0:BIF_1" }

# Re-enable auto promotion of pins of type 'pad'
auto_promote_pad_pins -promote_all 1
# Save the SmartDesign 
save_smartdesign -sd_name ${sd_name}
# Generate SmartDesign "UART_interface"
generate_component -component_name ${sd_name}
