module prbs_asic_gen(input atxclk,
                     input atxrstn,
                     input meso_lpbk,
                     input[19 : 0] arxdo,
                     input[79 : 0] custom_pattern,
                     input custom_sel,
                     input prbs_en,
                     input[1 : 0] prbs_typ,
                     input[4 : 0] prbs_txn,
                     output prbs_sel,
                     output[39 : 0] prbs_out);
  reg I;
  reg l;
  reg o;
  reg[1 : 0] i;
  reg I0l;
  reg l0l;
  always
    @(posedge atxclk or
      negedge atxrstn)
    begin
      if (!atxrstn)
        begin
          I <= 1'b0;
          l <= 1'b0;
          o <= 1'b0;
          i <= 2'b00;
          I0l <= 1'b0;
          l0l <= 1'b0;
        end
      else
        begin
          I <= prbs_en;
          l <= I;
          o <= l;
          if (l && !o)
            i <= prbs_typ;
          I0l <= custom_sel;
          l0l <= I0l;
        end
    end
  assign prbs_sel = o | l0l;
  reg[39 : 0] lI;
  reg[39 : 0] oI;
  reg[39 : 0] iI;
  reg[39 : 0] Ol;
  reg[39 : 0] Il;
  reg[39 : 0] ll;
  reg[39 : 0] ol;
  always
    @*
    begin: il
      integer O0,
              I0,
              l0,
              o0,
              i0,
              O1;
      oI = lI;
      iI = lI;
      Ol = lI;
      Il = lI;
      ll = lI;
      ol = lI;
      for (O0 = 0; O0 < 5; O0 = O0 + 1)
        begin: I1
          oI = { oI[38 : 0], oI[6] ^ oI[5] };
        end
      for (I0 = 0; I0 < 10; I0 = I0 + 1)
        begin: l1
          iI = { iI[38 : 0], iI[6] ^ iI[5] };
        end
      for (l0 = 0; l0 < 20; l0 = l0 + 1)
        begin: o1
          Ol = { Ol[38 : 0], Ol[6] ^ Ol[5] };
        end
      for (o0 = 0; o0 < 8; o0 = o0 + 1)
        begin: i1
          Il = { Il[38 : 0], Il[6] ^ Il[5] };
        end
      for (i0 = 0; i0 < 16; i0 = i0 + 1)
        begin: Oo
          ll = { ll[38 : 0], ll[6] ^ ll[5] };
        end
      for (O1 = 0; O1 < 40; O1 = O1 + 1)
        begin: Io
          ol = { ol[38 : 0], ol[6] ^ ol[5] };
        end
    end
  reg[39 : 0] lo;
  reg[39 : 0] oo;
  reg[39 : 0] io;
  reg[39 : 0] Oi;
  reg[39 : 0] Ii;
  always
    @*
    begin: li
      integer O0,
              I0,
              l0,
              o0,
              i0;
      lo = lI;
      oo = lI;
      io = lI;
      Oi = lI;
      Ii = lI;
      for (O0 = 0; O0 < 5; O0 = O0 + 1)
        begin: oi
          lo = { lo[29 : 0], lo[10] ^ lo[8] };
        end
      for (I0 = 0; I0 < 10; I0 = I0 + 1)
        begin: ii
          oo = { oo[29 : 0], oo[10] ^ oo[8] };
        end
      for (l0 = 0; l0 < 20; l0 = l0 + 1)
        begin: OOI
          io = { io[29 : 0], io[10] ^ io[8] };
        end
      for (o0 = 0; o0 < 8; o0 = o0 + 1)
        begin: IOI
          Oi = { Oi[29 : 0], Oi[10] ^ Oi[8] };
        end
      for (i0 = 0; i0 < 16; i0 = i0 + 1)
        begin: lOI
          Ii = { Ii[29 : 0], Ii[10] ^ Ii[8] };
        end
    end
  reg[39 : 0] oOI;
  reg[39 : 0] iOI;
  reg[39 : 0] OII;
  reg[39 : 0] III;
  reg[39 : 0] lII;
  always
    @*
    begin: oII
      integer O0,
              I0,
              l0,
              o0,
              i0;
      oOI = lI;
      iOI = lI;
      OII = lI;
      III = lI;
      lII = lI;
      for (O0 = 0; O0 < 5; O0 = O0 + 1)
        begin: iII
          oOI = { oOI[29 : 0], oOI[22] ^ oOI[17] };
        end
      for (I0 = 0; I0 < 10; I0 = I0 + 1)
        begin: OlI
          iOI = { iOI[29 : 0], iOI[22] ^ iOI[17] };
        end
      for (l0 = 0; l0 < 20; l0 = l0 + 1)
        begin: IlI
          OII = { OII[29 : 0], OII[22] ^ OII[17] };
        end
      for (o0 = 0; o0 < 8; o0 = o0 + 1)
        begin: llI
          III = { III[29 : 0], III[22] ^ III[17] };
        end
      for (i0 = 0; i0 < 16; i0 = i0 + 1)
        begin: olI
          lII = { lII[29 : 0], lII[22] ^ lII[17] };
        end
    end
  reg[39 : 0] ilI;
  reg[39 : 0] O0I;
  reg[39 : 0] I0I;
  reg[39 : 0] l0I;
  reg[39 : 0] o0I;
  always
    @*
    begin: i0I
      integer O0,
              I0,
              l0,
              o0,
              i0;
      ilI = lI;
      O0I = lI;
      I0I = lI;
      l0I = lI;
      o0I = lI;
      for (O0 = 0; O0 < 5; O0 = O0 + 1)
        begin: O1I
          ilI = { ilI[29 : 0], ilI[30] ^ ilI[27] };
        end
      for (I0 = 0; I0 < 10; I0 = I0 + 1)
        begin: I1I
          O0I = { O0I[29 : 0], O0I[30] ^ O0I[27] };
        end
      for (l0 = 0; l0 < 20; l0 = l0 + 1)
        begin: l1I
          I0I = { I0I[29 : 0], I0I[30] ^ I0I[27] };
        end
      for (o0 = 0; o0 < 8; o0 = o0 + 1)
        begin: o1I
          l0I = { l0I[29 : 0], l0I[30] ^ l0I[27] };
        end
      for (i0 = 0; i0 < 16; i0 = i0 + 1)
        begin: i1I
          o0I = { o0I[29 : 0], o0I[30] ^ o0I[27] };
        end
    end
  always
    @(posedge atxclk or
      negedge atxrstn)
    begin
      if (!atxrstn)
        begin
          lI <= { 40 { 1'b1 } };
        end
      else
        if (!o)
          begin
            lI <= { 40 { 1'b1 } };
          end
        else
          begin
            case (i)
              2'b00:
                begin
                  if (prbs_txn == 5'd4)
                    lI <= oI;
                  else
                    if (prbs_txn == 5'd7)
                      lI <= Il;
                    else
                      if (prbs_txn == 5'd9)
                        lI <= iI;
                      else
                        if (prbs_txn == 5'd15)
                          lI <= ll;
                        else
                          if (prbs_txn == 5'd3)
                            lI <= Ol;
                          else
                            lI <= ol;
                end
              2'b01:
                begin
                  if (prbs_txn == 5'd4)
                    lI <= lo;
                  else
                    if (prbs_txn == 5'd7)
                      lI <= Oi;
                    else
                      if (prbs_txn == 5'd9)
                        lI <= oo;
                      else
                        if (prbs_txn == 5'd15)
                          lI <= Ii;
                        else
                          lI <= io;
                end
              2'b10:
                begin
                  if (prbs_txn == 5'd4)
                    lI <= oOI;
                  else
                    if (prbs_txn == 5'd7)
                      lI <= III;
                    else
                      if (prbs_txn == 5'd9)
                        lI <= iOI;
                      else
                        if (prbs_txn == 5'd15)
                          lI <= lII;
                        else
                          lI <= OII;
                end
              2'b11:
                begin
                  if (prbs_txn == 5'd4)
                    lI <= ilI;
                  else
                    if (prbs_txn == 5'd7)
                      lI <= l0I;
                    else
                      if (prbs_txn == 5'd9)
                        lI <= O0I;
                      else
                        if (prbs_txn == 5'd15)
                          lI <= o0I;
                        else
                          lI <= I0I;
                end
              default:
                begin
                  lI <= { 40 { 1'b1 } };
                end
            endcase
          end
    end
  `ifdef O0l
    reg[6 : 0] l1l;
    reg[19 : 0] oo0;
    always
      @(posedge atxclk or
        negedge atxrstn)
      begin
        if (!atxrstn)
          begin
            l1l <= 7'h0;
            oo0 <= 20'd0;
          end
        else
          begin
            if ((l1l + prbs_txn) >= 79 || !l0l)
              l1l <= 7'h0;
            else
              l1l <= l1l + prbs_txn + 1'b1;
            case (l1l)
              7'd5:
                oo0 <= custom_pattern[24 : 05];
              7'd8:
                oo0 <= custom_pattern[27 : 08];
              7'd10:
                oo0 <= custom_pattern[29 : 10];
              7'd15:
                oo0 <= custom_pattern[34 : 15];
              7'd16:
                oo0 <= custom_pattern[35 : 16];
              7'd20:
                oo0 <= custom_pattern[39 : 20];
              7'd24:
                oo0 <= custom_pattern[43 : 24];
              7'd25:
                oo0 <= custom_pattern[44 : 25];
              7'd30:
                oo0 <= custom_pattern[49 : 30];
              7'd32:
                oo0 <= custom_pattern[51 : 32];
              7'd35:
                oo0 <= custom_pattern[54 : 35];
              7'd40:
                oo0 <= custom_pattern[59 : 40];
              7'd45:
                oo0 <= custom_pattern[64 : 45];
              7'd48:
                oo0 <= custom_pattern[67 : 48];
              7'd50:
                oo0 <= custom_pattern[69 : 50];
              7'd55:
                oo0 <= custom_pattern[74 : 55];
              7'd56:
                oo0 <= custom_pattern[75 : 56];
              7'd60:
                oo0 <= custom_pattern[79 : 60];
              7'd64:
                oo0 <= { 4'h0, custom_pattern[79 : 64] };
              7'd65:
                oo0 <= { 5'h0, custom_pattern[79 : 65] };
              7'd70:
                oo0 <= { 10'h0, custom_pattern[79 : 70] };
              7'd72:
                oo0 <= { 12'h0, custom_pattern[79 : 72] };
              7'd75:
                oo0 <= { 15'h0, custom_pattern[79 : 75] };
              default:
                oo0 <= custom_pattern[19 : 00];
            endcase
          end
      end
  `endif
  reg[39 : 0] IIl;
  always
    @*
    begin: ooI
      integer O0;
      for (O0 = 0; O0 < 40; O0 = O0 + 1)
        begin
          IIl[O0] = ~lI[39 - O0];
        end
    end
  reg[39 : 0] io0;
  always
    @(posedge atxclk or
      negedge atxrstn)
    begin
      if (!atxrstn)
        begin
          io0 <= 40'h0;
        end
      else
        begin
          `ifdef O0l
            io0 <= (meso_lpbk) ? arxdo : (l0l) ? oo0 : IIl;
          `else
            io0 <= (meso_lpbk) ? arxdo : IIl;
          `endif
        end
    end
  assign prbs_out = io0;
endmodule
