# Creating SmartDesign "top"
set sd_name {top}
create_smartdesign -sd_name ${sd_name}

# Disable auto promotion of pins of type 'pad'
auto_promote_pad_pins -promote_all 0

# Create top level Scalar Ports
sd_create_scalar_port -sd_name ${sd_name} -port_name {EXT_RST_N} -port_direction {IN}
sd_create_scalar_port -sd_name ${sd_name} -port_name {REF_CLK_0} -port_direction {IN} -port_is_pad {1}
sd_create_scalar_port -sd_name ${sd_name} -port_name {RX} -port_direction {IN}
sd_create_scalar_port -sd_name ${sd_name} -port_name {resetn_cntrl} -port_direction {IN}

sd_create_scalar_port -sd_name ${sd_name} -port_name {TX} -port_direction {OUT}


# Create top level Bus Ports
sd_create_bus_port -sd_name ${sd_name} -port_name {RESET_REASON} -port_direction {OUT} -port_range {[3:0]}
sd_create_bus_port -sd_name ${sd_name} -port_name {cntout} -port_direction {OUT} -port_range {[27:24]}


# Add AND2_0 instance
sd_instantiate_macro -sd_name ${sd_name} -macro_name {AND2} -instance_name {AND2_0}
sd_invert_pins -sd_name ${sd_name} -pin_names {AND2_0:B}



# Add AND3_0 instance
sd_instantiate_macro -sd_name ${sd_name} -macro_name {AND3} -instance_name {AND3_0}
sd_invert_pins -sd_name ${sd_name} -pin_names {AND3_0:A}



# Add binary_to_ascii_apb_0 instance
sd_instantiate_hdl_core -sd_name ${sd_name} -hdl_core_name {binary_to_ascii_apb} -instance_name {binary_to_ascii_apb_0}
# Exporting Parameters of instance binary_to_ascii_apb_0
sd_configure_core_instance -sd_name ${sd_name} -instance_name {binary_to_ascii_apb_0} -params {\
"idle:0" \
"read_write:1" \
"set_ready:2" }\
-validate_rules 0
sd_save_core_instance_config -sd_name ${sd_name} -instance_name {binary_to_ascii_apb_0}
sd_update_instance -sd_name ${sd_name} -instance_name {binary_to_ascii_apb_0}



# Add CLKBUF_0 instance
sd_instantiate_macro -sd_name ${sd_name} -macro_name {CLKBUF} -instance_name {CLKBUF_0}



# Add COREABC_C0_0 instance
sd_instantiate_component -sd_name ${sd_name} -component_name {COREABC_C0} -instance_name {COREABC_C0_0}
sd_create_pin_slices -sd_name ${sd_name} -pin_name {COREABC_C0_0:IO_IN} -pin_slices {[0:0]}
sd_create_pin_slices -sd_name ${sd_name} -pin_name {COREABC_C0_0:IO_IN} -pin_slices {[1:1]}
sd_invert_pins -sd_name ${sd_name} -pin_names {COREABC_C0_0:IO_IN[1:1]}
sd_create_pin_slices -sd_name ${sd_name} -pin_name {COREABC_C0_0:IO_IN} -pin_slices {[2:2]}
sd_create_pin_slices -sd_name ${sd_name} -pin_name {COREABC_C0_0:IO_IN} -pin_slices {[3:3]}
sd_create_pin_slices -sd_name ${sd_name} -pin_name {COREABC_C0_0:IO_OUT} -pin_slices {[0:0]}
sd_create_pin_slices -sd_name ${sd_name} -pin_name {COREABC_C0_0:IO_OUT} -pin_slices {[1:1]}



# Add CoreAPB3_C0_0 instance
sd_instantiate_component -sd_name ${sd_name} -component_name {CoreAPB3_C0} -instance_name {CoreAPB3_C0_0}



# Add CORERESET_PF_C0_0 instance
sd_instantiate_component -sd_name ${sd_name} -component_name {CORERESET_PF_C0} -instance_name {CORERESET_PF_C0_0}
sd_connect_pins_to_constant -sd_name ${sd_name} -pin_names {CORERESET_PF_C0_0:FF_US_RESTORE} -value {GND}
sd_mark_pins_unused -sd_name ${sd_name} -pin_names {CORERESET_PF_C0_0:PLL_POWERDOWN_B}



# Add CORERESET_PF_C1_0 instance
sd_instantiate_component -sd_name ${sd_name} -component_name {CORERESET_PF_C1} -instance_name {CORERESET_PF_C1_0}
sd_connect_pins_to_constant -sd_name ${sd_name} -pin_names {CORERESET_PF_C1_0:FF_US_RESTORE} -value {GND}
sd_mark_pins_unused -sd_name ${sd_name} -pin_names {CORERESET_PF_C1_0:PLL_POWERDOWN_B}



# Add CoreUARTapb_C0_0 instance
sd_instantiate_component -sd_name ${sd_name} -component_name {CoreUARTapb_C0} -instance_name {CoreUARTapb_C0_0}
sd_mark_pins_unused -sd_name ${sd_name} -pin_names {CoreUARTapb_C0_0:PARITY_ERR}
sd_mark_pins_unused -sd_name ${sd_name} -pin_names {CoreUARTapb_C0_0:OVERFLOW}
sd_mark_pins_unused -sd_name ${sd_name} -pin_names {CoreUARTapb_C0_0:FRAMING_ERR}



# Add counter28_0 instance
sd_instantiate_hdl_module -sd_name ${sd_name} -hdl_module_name {counter28} -hdl_file {hdl\counter.v} -instance_name {counter28_0}



# Add PF_CCC_C0_0 instance
sd_instantiate_component -sd_name ${sd_name} -component_name {PF_CCC_C0} -instance_name {PF_CCC_C0_0}



# Add PF_INIT_MONITOR_C0_0 instance
sd_instantiate_component -sd_name ${sd_name} -component_name {PF_INIT_MONITOR_C0} -instance_name {PF_INIT_MONITOR_C0_0}
sd_mark_pins_unused -sd_name ${sd_name} -pin_names {PF_INIT_MONITOR_C0_0:PCIE_INIT_DONE}
sd_mark_pins_unused -sd_name ${sd_name} -pin_names {PF_INIT_MONITOR_C0_0:USRAM_INIT_DONE}
sd_mark_pins_unused -sd_name ${sd_name} -pin_names {PF_INIT_MONITOR_C0_0:SRAM_INIT_DONE}
sd_mark_pins_unused -sd_name ${sd_name} -pin_names {PF_INIT_MONITOR_C0_0:XCVR_INIT_DONE}
sd_mark_pins_unused -sd_name ${sd_name} -pin_names {PF_INIT_MONITOR_C0_0:USRAM_INIT_FROM_SNVM_DONE}
sd_mark_pins_unused -sd_name ${sd_name} -pin_names {PF_INIT_MONITOR_C0_0:USRAM_INIT_FROM_UPROM_DONE}
sd_mark_pins_unused -sd_name ${sd_name} -pin_names {PF_INIT_MONITOR_C0_0:USRAM_INIT_FROM_SPI_DONE}
sd_mark_pins_unused -sd_name ${sd_name} -pin_names {PF_INIT_MONITOR_C0_0:SRAM_INIT_FROM_SNVM_DONE}
sd_mark_pins_unused -sd_name ${sd_name} -pin_names {PF_INIT_MONITOR_C0_0:SRAM_INIT_FROM_UPROM_DONE}
sd_mark_pins_unused -sd_name ${sd_name} -pin_names {PF_INIT_MONITOR_C0_0:SRAM_INIT_FROM_SPI_DONE}
sd_mark_pins_unused -sd_name ${sd_name} -pin_names {PF_INIT_MONITOR_C0_0:AUTOCALIB_DONE}



# Add PF_SYSTEM_SERVICES_C0_0 instance
sd_instantiate_component -sd_name ${sd_name} -component_name {PF_SYSTEM_SERVICES_C0} -instance_name {PF_SYSTEM_SERVICES_C0_0}
sd_mark_pins_unused -sd_name ${sd_name} -pin_names {PF_SYSTEM_SERVICES_C0_0:USR_CMD_ERROR}
sd_mark_pins_unused -sd_name ${sd_name} -pin_names {PF_SYSTEM_SERVICES_C0_0:SS_BUSY}
sd_mark_pins_unused -sd_name ${sd_name} -pin_names {PF_SYSTEM_SERVICES_C0_0:SYSSERV_INIT_REQ}



# Add PF_TAMPER_C0_0 instance
sd_instantiate_component -sd_name ${sd_name} -component_name {PF_TAMPER_C0} -instance_name {PF_TAMPER_C0_0}
sd_create_pin_slices -sd_name ${sd_name} -pin_name {PF_TAMPER_C0_0:RESET_REASON} -pin_slices {[3:0]}
sd_connect_pins_to_constant -sd_name ${sd_name} -pin_names {PF_TAMPER_C0_0:IO_DISABLE} -value {GND}
sd_connect_pins_to_constant -sd_name ${sd_name} -pin_names {PF_TAMPER_C0_0:SECURITY_LOCKDOWN} -value {GND}
sd_mark_pins_unused -sd_name ${sd_name} -pin_names {PF_TAMPER_C0_0:SLOW_CLOCK}
sd_connect_pins_to_constant -sd_name ${sd_name} -pin_names {PF_TAMPER_C0_0:CLEAR} -value {GND}
sd_mark_pins_unused -sd_name ${sd_name} -pin_names {PF_TAMPER_C0_0:FLAGS}



# Add scalar net connections
sd_connect_pins -sd_name ${sd_name} -pin_names {"AND2_0:A" "CORERESET_PF_C1_0:EXT_RST_N" "EXT_RST_N" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"AND2_0:B" "COREABC_C0_0:IO_OUT[0:0]" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"AND2_0:Y" "CORERESET_PF_C0_0:EXT_RST_N" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"AND3_0:A" "resetn_cntrl" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"AND3_0:B" "CORERESET_PF_C0_0:INIT_DONE" "CORERESET_PF_C1_0:INIT_DONE" "PF_INIT_MONITOR_C0_0:DEVICE_INIT_DONE" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"AND3_0:C" "COREABC_C0_0:IO_OUT[1:1]" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"AND3_0:Y" "PF_TAMPER_C0_0:RESET_DEVICE" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"CLKBUF_0:PAD" "REF_CLK_0" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"CLKBUF_0:Y" "PF_CCC_C0_0:REF_CLK_0" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"COREABC_C0_0:IO_IN[0:0]" "CoreUARTapb_C0_0:TXRDY" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"COREABC_C0_0:IO_IN[1:1]" "CORERESET_PF_C0_0:SS_BUSY" "CORERESET_PF_C1_0:SS_BUSY" "PF_SYSTEM_SERVICES_C0_0:USR_BUSY" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"COREABC_C0_0:IO_IN[2:2]" "CoreUARTapb_C0_0:RXRDY" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"COREABC_C0_0:IO_IN[3:3]" "PF_SYSTEM_SERVICES_C0_0:USR_RDVLD" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"COREABC_C0_0:NSYSRESET" "CORERESET_PF_C0_0:FABRIC_RESET_N" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"COREABC_C0_0:PCLK" "CORERESET_PF_C0_0:CLK" "CORERESET_PF_C1_0:CLK" "CoreUARTapb_C0_0:PCLK" "PF_CCC_C0_0:OUT0_FABCLK_0" "PF_SYSTEM_SERVICES_C0_0:CLK" "binary_to_ascii_apb_0:PCLK" "counter28_0:clk" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"COREABC_C0_0:PRESETN" "CoreUARTapb_C0_0:PRESETN" "PF_SYSTEM_SERVICES_C0_0:RESETN" "binary_to_ascii_apb_0:PRESETN" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"CORERESET_PF_C0_0:BANK_x_VDDI_STATUS" "CORERESET_PF_C0_0:BANK_y_VDDI_STATUS" "CORERESET_PF_C1_0:BANK_x_VDDI_STATUS" "CORERESET_PF_C1_0:BANK_y_VDDI_STATUS" "PF_INIT_MONITOR_C0_0:BANK_6_VDDI_STATUS" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"CORERESET_PF_C0_0:FPGA_POR_N" "CORERESET_PF_C1_0:FPGA_POR_N" "PF_INIT_MONITOR_C0_0:FABRIC_POR_N" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"CORERESET_PF_C0_0:PLL_LOCK" "CORERESET_PF_C1_0:PLL_LOCK" "PF_CCC_C0_0:PLL_LOCK_0" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"CORERESET_PF_C1_0:FABRIC_RESET_N" "counter28_0:nreset" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"CoreUARTapb_C0_0:RX" "RX" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"CoreUARTapb_C0_0:TX" "TX" }

# Add bus net connections
sd_connect_pins -sd_name ${sd_name} -pin_names {"PF_TAMPER_C0_0:RESET_REASON[3:0]" "RESET_REASON" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"cntout" "counter28_0:cntout" }

# Add bus interface net connections
sd_connect_pins -sd_name ${sd_name} -pin_names {"COREABC_C0_0:APB3Initiator" "CoreAPB3_C0_0:APB3mmaster" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"CoreAPB3_C0_0:APBmslave0" "binary_to_ascii_apb_0:BIF_1" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"CoreAPB3_C0_0:APBmslave1" "CoreUARTapb_C0_0:APB_bif" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"CoreAPB3_C0_0:APBmslave2" "PF_SYSTEM_SERVICES_C0_0:APBSlave" }

# Re-enable auto promotion of pins of type 'pad'
auto_promote_pad_pins -promote_all 1
# Save the SmartDesign 
save_smartdesign -sd_name ${sd_name}
# Generate SmartDesign "top"
generate_component -component_name ${sd_name}
