# Creating SmartDesign "PROC_SUBSYSTEM"
set sd_name {PROC_SUBSYSTEM}
create_smartdesign -sd_name ${sd_name}

# Disable auto promotion of pins of type 'pad'
auto_promote_pad_pins -promote_all 0

# Create top level Scalar Ports
sd_create_scalar_port -sd_name ${sd_name} -port_name {RX} -port_direction {IN}
sd_create_scalar_port -sd_name ${sd_name} -port_name {SPISDI} -port_direction {IN}
sd_create_scalar_port -sd_name ${sd_name} -port_name {TCK} -port_direction {IN}
sd_create_scalar_port -sd_name ${sd_name} -port_name {TDI} -port_direction {IN}
sd_create_scalar_port -sd_name ${sd_name} -port_name {TMS} -port_direction {IN}
sd_create_scalar_port -sd_name ${sd_name} -port_name {TRSTB} -port_direction {IN}
sd_create_scalar_port -sd_name ${sd_name} -port_name {crypto_clk} -port_direction {IN}
sd_create_scalar_port -sd_name ${sd_name} -port_name {crypto_resetn} -port_direction {IN}
sd_create_scalar_port -sd_name ${sd_name} -port_name {resetn} -port_direction {IN}
sd_create_scalar_port -sd_name ${sd_name} -port_name {sys_clk} -port_direction {IN}

sd_create_scalar_port -sd_name ${sd_name} -port_name {SPISCLKO} -port_direction {OUT}
sd_create_scalar_port -sd_name ${sd_name} -port_name {SPISDO} -port_direction {OUT}
sd_create_scalar_port -sd_name ${sd_name} -port_name {SPISS} -port_direction {OUT}
sd_create_scalar_port -sd_name ${sd_name} -port_name {TDO} -port_direction {OUT}
sd_create_scalar_port -sd_name ${sd_name} -port_name {TX} -port_direction {OUT}


# Create top level Bus Ports
sd_create_bus_port -sd_name ${sd_name} -port_name {GPIO_OUT} -port_direction {OUT} -port_range {[3:0]}


# Add Core_JTAG_Debug_0 instance
sd_instantiate_component -sd_name ${sd_name} -component_name {Core_JTAG_Debug} -instance_name {Core_JTAG_Debug_0}



# Add COREAHBL2AHBL_BRIDGE0_0 instance
sd_instantiate_component -sd_name ${sd_name} -component_name {COREAHBL2AHBL_BRIDGE0} -instance_name {COREAHBL2AHBL_BRIDGE0_0}



# Add COREAHBL2AHBL_BRIDGE1_0 instance
sd_instantiate_component -sd_name ${sd_name} -component_name {COREAHBL2AHBL_BRIDGE1} -instance_name {COREAHBL2AHBL_BRIDGE1_0}



# Add CoreAHBLite0_0 instance
sd_instantiate_component -sd_name ${sd_name} -component_name {CoreAHBLite0} -instance_name {CoreAHBLite0_0}
sd_connect_pins_to_constant -sd_name ${sd_name} -pin_names {CoreAHBLite0_0:REMAP_M0} -value {GND}
sd_mark_pins_unused -sd_name ${sd_name} -pin_names {CoreAHBLite0_0:AHBmslave0}



# Add LSRAM_0 instance
sd_instantiate_component -sd_name ${sd_name} -component_name {LSRAM} -instance_name {LSRAM_0}



# Add MIV_ESS_C0_0 instance
sd_instantiate_component -sd_name ${sd_name} -component_name {MIV_ESS_C0} -instance_name {MIV_ESS_C0_0}
sd_connect_pins_to_constant -sd_name ${sd_name} -pin_names {MIV_ESS_C0_0:GPIO_IN} -value {GND}
sd_mark_pins_unused -sd_name ${sd_name} -pin_names {MIV_ESS_C0_0:GPIO_INT}
sd_mark_pins_unused -sd_name ${sd_name} -pin_names {MIV_ESS_C0_0:SPI_IRQ}



# Add MIV_RV32_C0_0 instance
sd_instantiate_component -sd_name ${sd_name} -component_name {MIV_RV32_C0} -instance_name {MIV_RV32_C0_0}
sd_connect_pins_to_constant -sd_name ${sd_name} -pin_names {MIV_RV32_C0_0:TIME_COUNT_IN} -value {GND}
sd_mark_pins_unused -sd_name ${sd_name} -pin_names {MIV_RV32_C0_0:EXT_RESETN}
sd_mark_pins_unused -sd_name ${sd_name} -pin_names {MIV_RV32_C0_0:JTAG_TDO_DR}
sd_connect_pins_to_constant -sd_name ${sd_name} -pin_names {MIV_RV32_C0_0:EXT_IRQ} -value {GND}
sd_connect_pins_to_constant -sd_name ${sd_name} -pin_names {MIV_RV32_C0_0:TMR_IRQ} -value {GND}



# Add PF_CRYPTO_proc_0 instance
sd_instantiate_component -sd_name ${sd_name} -component_name {PF_CRYPTO_proc} -instance_name {PF_CRYPTO_proc_0}
sd_connect_pins_to_constant -sd_name ${sd_name} -pin_names {PF_CRYPTO_proc_0:PURGE} -value {GND}
sd_connect_pins_to_constant -sd_name ${sd_name} -pin_names {PF_CRYPTO_proc_0:START} -value {GND}
sd_mark_pins_unused -sd_name ${sd_name} -pin_names {PF_CRYPTO_proc_0:BUSY}
sd_connect_pins_to_constant -sd_name ${sd_name} -pin_names {PF_CRYPTO_proc_0:STALL} -value {GND}
sd_mark_pins_unused -sd_name ${sd_name} -pin_names {PF_CRYPTO_proc_0:COMPLETE}
sd_mark_pins_unused -sd_name ${sd_name} -pin_names {PF_CRYPTO_proc_0:ALARM}
sd_mark_pins_unused -sd_name ${sd_name} -pin_names {PF_CRYPTO_proc_0:BUS_ERROR}
sd_mark_pins_unused -sd_name ${sd_name} -pin_names {PF_CRYPTO_proc_0:DLL_LOCK}



# Add PF_SYSTEM_SERVICES_C0_0 instance
sd_instantiate_component -sd_name ${sd_name} -component_name {PF_SYSTEM_SERVICES_C0} -instance_name {PF_SYSTEM_SERVICES_C0_0}
sd_mark_pins_unused -sd_name ${sd_name} -pin_names {PF_SYSTEM_SERVICES_C0_0:USR_CMD_ERROR}
sd_mark_pins_unused -sd_name ${sd_name} -pin_names {PF_SYSTEM_SERVICES_C0_0:USR_BUSY}
sd_mark_pins_unused -sd_name ${sd_name} -pin_names {PF_SYSTEM_SERVICES_C0_0:SS_BUSY}
sd_mark_pins_unused -sd_name ${sd_name} -pin_names {PF_SYSTEM_SERVICES_C0_0:USR_RDVLD}
sd_mark_pins_unused -sd_name ${sd_name} -pin_names {PF_SYSTEM_SERVICES_C0_0:SYSSERV_INIT_REQ}



# Add SRAM_Buffer_0 instance
sd_instantiate_component -sd_name ${sd_name} -component_name {SRAM_Buffer} -instance_name {SRAM_Buffer_0}



# Add scalar net connections
sd_connect_pins -sd_name ${sd_name} -pin_names {"COREAHBL2AHBL_BRIDGE0_0:HCLK_M0" "COREAHBL2AHBL_BRIDGE1_0:HCLK_S0" "PF_CRYPTO_proc_0:HCLK" "crypto_clk" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"COREAHBL2AHBL_BRIDGE0_0:HCLK_S0" "COREAHBL2AHBL_BRIDGE1_0:HCLK_M0" "CoreAHBLite0_0:HCLK" "LSRAM_0:ACLK" "MIV_ESS_C0_0:PCLK" "MIV_RV32_C0_0:CLK" "PF_SYSTEM_SERVICES_C0_0:CLK" "SRAM_Buffer_0:HCLK" "sys_clk" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"COREAHBL2AHBL_BRIDGE0_0:HRESETN_M0" "COREAHBL2AHBL_BRIDGE1_0:HRESETN_S0" "PF_CRYPTO_proc_0:HRESETN" "crypto_resetn" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"COREAHBL2AHBL_BRIDGE0_0:HRESETN_S0" "COREAHBL2AHBL_BRIDGE1_0:HRESETN_M0" "CoreAHBLite0_0:HRESETN" "LSRAM_0:ARESETN" "MIV_ESS_C0_0:PRESETN" "MIV_RV32_C0_0:RESETN" "PF_SYSTEM_SERVICES_C0_0:RESETN" "SRAM_Buffer_0:HRESETN" "resetn" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"Core_JTAG_Debug_0:TCK" "TCK" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"Core_JTAG_Debug_0:TDI" "TDI" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"Core_JTAG_Debug_0:TDO" "TDO" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"Core_JTAG_Debug_0:TGT_TCK_0" "MIV_RV32_C0_0:JTAG_TCK" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"Core_JTAG_Debug_0:TGT_TDI_0" "MIV_RV32_C0_0:JTAG_TDI" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"Core_JTAG_Debug_0:TGT_TDO_0" "MIV_RV32_C0_0:JTAG_TDO" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"Core_JTAG_Debug_0:TGT_TMS_0" "MIV_RV32_C0_0:JTAG_TMS" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"Core_JTAG_Debug_0:TGT_TRSTN_0" "MIV_RV32_C0_0:JTAG_TRSTN" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"Core_JTAG_Debug_0:TMS" "TMS" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"Core_JTAG_Debug_0:TRSTB" "TRSTB" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"MIV_ESS_C0_0:SPI_SCK" "SPISCLKO" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"MIV_ESS_C0_0:SPI_SDI" "SPISDI" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"MIV_ESS_C0_0:SPI_SDO" "SPISDO" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"MIV_ESS_C0_0:SPI_SS" "SPISS" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"MIV_ESS_C0_0:UART_RX" "RX" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"MIV_ESS_C0_0:UART_TX" "TX" }

# Add bus net connections
sd_connect_pins -sd_name ${sd_name} -pin_names {"GPIO_OUT" "MIV_ESS_C0_0:GPIO_OUT" }

# Add bus interface net connections
sd_connect_pins -sd_name ${sd_name} -pin_names {"COREAHBL2AHBL_BRIDGE0_0:AHBL_MSlave" "PF_CRYPTO_proc_0:AHB_SLAVE" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"COREAHBL2AHBL_BRIDGE0_0:AHBL_Slave" "CoreAHBLite0_0:AHBmslave2" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"COREAHBL2AHBL_BRIDGE1_0:AHBL_MMaster" "PF_CRYPTO_proc_0:AHB_MASTER" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"COREAHBL2AHBL_BRIDGE1_0:AHBL_Master" "CoreAHBLite0_0:AHBmmaster1" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"CoreAHBLite0_0:AHBmmaster0" "MIV_RV32_C0_0:AHBL_INITIATOR" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"CoreAHBLite0_0:AHBmslave1" "SRAM_Buffer_0:AHBSlaveInterface" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"LSRAM_0:AXI4_Slave" "MIV_RV32_C0_0:AXI4_M_TARGET" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"MIV_ESS_C0_0:APB_0_mINITIATOR" "MIV_RV32_C0_0:APB_INITIATOR" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"MIV_ESS_C0_0:APB_3_mTARGET" "PF_SYSTEM_SERVICES_C0_0:APBSlave" }

# Re-enable auto promotion of pins of type 'pad'
auto_promote_pad_pins -promote_all 1
# Save the SmartDesign 
save_smartdesign -sd_name ${sd_name}
# Generate SmartDesign "PROC_SUBSYSTEM"
generate_component -component_name ${sd_name}
