# Import source files
file copy -force "./src/softconsole/miv-rv32-ccm-services.hex" "./$Prjname/miv-rv32-ccm-services.hex"

#Sourcing the Tcl files for creating individual components under the top level
source ./src/components/CCC_0.tcl 
source ./src/components/CORERESET_PF_C0.tcl 
source ./src/components/CORERESET_PF_C1.tcl 
source ./src/components/COREAHBL2AHBL_BRIDGE0.tcl 
source ./src/components/COREAHBL2AHBL_BRIDGE1.tcl 
source ./src/components/CoreAHBLite0.tcl 
source ./src/components/Core_JTAG_Debug.tcl 
source ./src/components/LSRAM.tcl 
source ./src/components/MIV_ESS_C0.tcl 
source ./src/components/MIV_RV32_C0.tcl 
source ./src/components/PF_CRYPTO_proc.tcl 
source ./src/components/PF_SYSTEM_SERVICES_C0.tcl 
source ./src/components/SRAM_Buffer.tcl 
source ./src/components/pf_init_done.tcl 
build_design_hierarchy 

# Generate SmartDesign Components
source ./src/components/PROC_SUBSYSTEM.tcl
build_design_hierarchy 
source ./src/components/top.tcl
build_design_hierarchy 

# Set top level module
build_design_hierarchy 
set_root -module {top::work} 

save_project
puts "Design generated successfully\n"